prim_ops.c

uboot1.3.0 for s3c2440, 支持nand flash启动

	res = (d >> cnt) & mask;
	if (cnt != 1)
	    res |= (d << (33 - cnt));
	if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
	    res |= 1 << (32 - cnt);
	}
	CONDITIONAL_SET_FLAG(cf, F_CF);
	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)),
				 F_OF);
	}
    }
    return res;
}

/****************************************************************************
REMARKS:
Implements the ROL instruction and side effects.
****************************************************************************/
u8 rol_byte(u8 d, u8 s)
{
    unsigned int res, cnt, mask;

    /* rotate left */
    /*
       s is the rotate distance.  It varies from 0 - 8.
       d is the byte object rotated.

       have

       CF  B_7 ... B_0

       The new rotate is done mod 8.
       Much simpler than the "rcl" or "rcr" operations.

       IF n > 0
       1) B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_(0)
       2) B_(n-1) .. B_(0) <-  b_(7) .. b_(8-n)
     */
    res = d;
    if ((cnt = s % 8) != 0) {
	/* B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_(0) */
	res = (d << cnt);

	/* B_(n-1) .. B_(0) <-	b_(7) .. b_(8-n) */
	mask = (1 << cnt) - 1;
	res |= (d >> (8 - cnt)) & mask;

	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
	/* OVERFLOW is set *IFF* s==1, then it is the
	   xor of CF and the most significant bit.  Blecck. */
	CONDITIONAL_SET_FLAG(s == 1 &&
			     XOR2((res & 0x1) + ((res >> 6) & 0x2)),
			     F_OF);
    } if (s != 0) {
	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
    }
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the ROL instruction and side effects.
****************************************************************************/
u16 rol_word(u16 d, u8 s)
{
    unsigned int res, cnt, mask;

    res = d;
    if ((cnt = s % 16) != 0) {
	res = (d << cnt);
	mask = (1 << cnt) - 1;
	res |= (d >> (16 - cnt)) & mask;
	CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
	CONDITIONAL_SET_FLAG(s == 1 &&
			     XOR2((res & 0x1) + ((res >> 14) & 0x2)),
			     F_OF);
    } if (s != 0) {
	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
    }
    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the ROL instruction and side effects.
****************************************************************************/
u32 rol_long(u32 d, u8 s)
{
    u32 res, cnt, mask;

    res = d;
    if ((cnt = s % 32) != 0) {
	res = (d << cnt);
	mask = (1 << cnt) - 1;
	res |= (d >> (32 - cnt)) & mask;
	CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
	CONDITIONAL_SET_FLAG(s == 1 &&
			     XOR2((res & 0x1) + ((res >> 30) & 0x2)),
			     F_OF);
    } if (s != 0) {
	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
    }
    return res;
}

/****************************************************************************
REMARKS:
Implements the ROR instruction and side effects.
****************************************************************************/
u8 ror_byte(u8 d, u8 s)
{
    unsigned int res, cnt, mask;

    /* rotate right */
    /*
       s is the rotate distance.  It varies from 0 - 8.
       d is the byte object rotated.

       have

       B_7 ... B_0

       The rotate is done mod 8.

       IF n > 0
       1) B_(8-(n+1)) .. B_(0)	<-  b_(7) .. b_(n)
       2) B_(7) .. B_(8-n) <-  b_(n-1) .. b_(0)
     */
    res = d;
    if ((cnt = s % 8) != 0) {		/* not a typo, do nada if cnt==0 */
	/* B_(7) .. B_(8-n) <-	b_(n-1) .. b_(0) */
	res = (d << (8 - cnt));

	/* B_(8-(n+1)) .. B_(0)	 <-  b_(7) .. b_(n) */
	mask = (1 << (8 - cnt)) - 1;
	res |= (d >> (cnt)) & mask;

	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
	/* OVERFLOW is set *IFF* s==1, then it is the
	   xor of the two most significant bits.  Blecck. */
	CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF);
    } else if (s != 0) {
	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
    }
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the ROR instruction and side effects.
****************************************************************************/
u16 ror_word(u16 d, u8 s)
{
    unsigned int res, cnt, mask;

    res = d;
    if ((cnt = s % 16) != 0) {
	res = (d << (16 - cnt));
	mask = (1 << (16 - cnt)) - 1;
	res |= (d >> (cnt)) & mask;
	CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
	CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF);
    } else if (s != 0) {
	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
    }
    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the ROR instruction and side effects.
****************************************************************************/
u32 ror_long(u32 d, u8 s)
{
    u32 res, cnt, mask;

    res = d;
    if ((cnt = s % 32) != 0) {
	res = (d << (32 - cnt));
	mask = (1 << (32 - cnt)) - 1;
	res |= (d >> (cnt)) & mask;
	CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
	CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF);
    } else if (s != 0) {
	/* set the new carry flag, Note that it is the low order
	   bit of the result!!!				      */
	CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
    }
    return res;
}

/****************************************************************************
REMARKS:
Implements the SHL instruction and side effects.
****************************************************************************/
u8 shl_byte(u8 d, u8 s)
{
    unsigned int cnt, res, cf;

    if (s < 8) {
	cnt = s % 8;

	/* last bit shifted out goes into carry flag */
	if (cnt > 0) {
	    res = d << cnt;
	    cf = d & (1 << (8 - cnt));
	    CONDITIONAL_SET_FLAG(cf, F_CF);
	    set_szp_flags_8((u8)res);
	} else {
	    res = (u8) d;
	}

	if (cnt == 1) {
	    /* Needs simplification. */
	    CONDITIONAL_SET_FLAG(
				    (((res & 0x80) == 0x80) ^
				     (ACCESS_FLAG(F_CF) != 0)),
	    /* was (M.x86.R_FLG&F_CF)==F_CF)), */
				    F_OF);
	} else {
	    CLEAR_FLAG(F_OF);
	}
    } else {
	res = 0;
	CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF);
	CLEAR_FLAG(F_OF);
	CLEAR_FLAG(F_SF);
	SET_FLAG(F_PF);
	SET_FLAG(F_ZF);
    }
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the SHL instruction and side effects.
****************************************************************************/
u16 shl_word(u16 d, u8 s)
{
    unsigned int cnt, res, cf;

    if (s < 16) {
	cnt = s % 16;
	if (cnt > 0) {
	    res = d << cnt;
	    cf = d & (1 << (16 - cnt));
	    CONDITIONAL_SET_FLAG(cf, F_CF);
	    set_szp_flags_16((u16)res);
	} else {
	    res = (u16) d;
	}

	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG(
				    (((res & 0x8000) == 0x8000) ^
				     (ACCESS_FLAG(F_CF) != 0)),
				    F_OF);
	} else {
	    CLEAR_FLAG(F_OF);
	}
    } else {
	res = 0;
	CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
	CLEAR_FLAG(F_OF);
	CLEAR_FLAG(F_SF);
	SET_FLAG(F_PF);
	SET_FLAG(F_ZF);
    }
    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the SHL instruction and side effects.
****************************************************************************/
u32 shl_long(u32 d, u8 s)
{
    unsigned int cnt, res, cf;

    if (s < 32) {
	cnt = s % 32;
	if (cnt > 0) {
	    res = d << cnt;
	    cf = d & (1 << (32 - cnt));
	    CONDITIONAL_SET_FLAG(cf, F_CF);
	    set_szp_flags_32((u32)res);
	} else {
	    res = d;
	}
	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
				  (ACCESS_FLAG(F_CF) != 0)), F_OF);
	} else {
	    CLEAR_FLAG(F_OF);
	}
    } else {
	res = 0;
	CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
	CLEAR_FLAG(F_OF);
	CLEAR_FLAG(F_SF);
	SET_FLAG(F_PF);
	SET_FLAG(F_ZF);
    }
    return res;
}

/****************************************************************************
REMARKS:
Implements the SHR instruction and side effects.
****************************************************************************/
u8 shr_byte(u8 d, u8 s)
{
    unsigned int cnt, res, cf;

    if (s < 8) {
	cnt = s % 8;
	if (cnt > 0) {
	    cf = d & (1 << (cnt - 1));
	    res = d >> cnt;
	    CONDITIONAL_SET_FLAG(cf, F_CF);
	    set_szp_flags_8((u8)res);
	} else {
	    res = (u8) d;
	}

	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
	} else {
	    CLEAR_FLAG(F_OF);
	}
    } else {
	res = 0;
	CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF);
	CLEAR_FLAG(F_OF);
	CLEAR_FLAG(F_SF);
	SET_FLAG(F_PF);
	SET_FLAG(F_ZF);
    }
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the SHR instruction and side effects.
****************************************************************************/
u16 shr_word(u16 d, u8 s)
{
    unsigned int cnt, res, cf;

    if (s < 16) {
	cnt = s % 16;
	if (cnt > 0) {
	    cf = d & (1 << (cnt - 1));
	    res = d >> cnt;
	    CONDITIONAL_SET_FLAG(cf, F_CF);
	    set_szp_flags_16((u16)res);
	} else {
	    res = d;
	}

	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
	} else {
	    CLEAR_FLAG(F_OF);
	}
    } else {
	res = 0;
	CLEAR_FLAG(F_CF);
	CLEAR_FLAG(F_OF);
	SET_FLAG(F_ZF);
	CLEAR_FLAG(F_SF);
	CLEAR_FLAG(F_PF);
    }
    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the SHR instruction and side effects.
****************************************************************************/
u32 shr_long(u32 d, u8 s)
{
    unsigned int cnt, res, cf;

    if (s < 32) {
	cnt = s % 32;
	if (cnt > 0) {
	    cf = d & (1 << (cnt - 1));
	    res = d >> cnt;
	    CONDITIONAL_SET_FLAG(cf, F_CF);
	    set_szp_flags_32((u32)res);
	} else {
	    res = d;
	}
	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
	} else {
	    CLEAR_FLAG(F_OF);
	}
    } else {
	res = 0;
	CLEAR_FLAG(F_CF);
	CLEAR_FLAG(F_OF);
	SET_FLAG(F_ZF);
	CLEAR_FLAG(F_SF);
	CLEAR_FLAG(F_PF);
    }
    return res;
}

/****************************************************************************
REMARKS:
Implements the SAR instruction and side effects.
****************************************************************************/
u8 sar_byte(u8 d, u8 s)
{
    unsigned int cnt, res, cf, mask, sf;

    res = d;
    sf = d & 0x80;
    cnt = s % 8;
    if (cnt > 0 && cnt < 8) {
	mask = (1 << (8 - cnt)) - 1;
	cf = d & (1 << (cnt - 1));
	res = (d >> cnt) & mask;
	CONDITIONAL_SET_FLAG(cf, F_CF);
	if (sf) {
	    res |= ~mask;
	}
	set_szp_flags_8((u8)res);
    } else if (cnt >= 8) {
	if (sf) {
	    res = 0xff;
	    SET_FLAG(F_CF);
	    CLEAR_FLAG(F_ZF);
	    SET_FLAG(F_SF);
	    SET_FLAG(F_PF);
	} else {
	    res = 0;
	    CLEAR_FLAG(F_CF);
	    SET_FLAG(F_ZF);
	    CLEAR_FLAG(F_SF);
	    CLEAR_FLAG(F_PF);
	}
    }
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the SAR instruction and side effects.
****************************************************************************/
u16 sar_word(u16 d, u8 s)
{
    unsigned int cnt, res, cf, mask, sf;

    sf = d & 0x8000;
    cnt = s % 16;
    res = d;
    if (cnt > 0 && cnt < 16) {
	mask = (1 << (16 - cnt)) - 1;
	cf = d & (1 << (cnt - 1));
	res = (d >> cnt) & mask;
	CONDITIONAL_SET_FLAG(cf, F_CF);
	if (sf) {
	    res |= ~mask;
	}
	set_szp_flags_16((u16)res);
    } else if (cnt >= 16) {
	if (sf) {
	    res = 0xffff;
	    SET_FLAG(F_CF);
	    CLEAR_FLAG(F_ZF);
	    SET_FLAG(F_SF);
	    SET_FLAG(F_PF);
	} else {