prim_ops.c

uboot1.3.0 for s3c2440, 支持nand flash启动

    if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
	res += 6;
	SET_FLAG(F_AF);
    }
    if (res > 0x9F || ACCESS_FLAG(F_CF)) {
	res += 0x60;
	SET_FLAG(F_CF);
    }
    set_szp_flags_8((u8)res);
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the DAS instruction and side effects.
****************************************************************************/
u8 das_byte(u8 d)
{
    if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
	d -= 6;
	SET_FLAG(F_AF);
    }
    if (d > 0x9F || ACCESS_FLAG(F_CF)) {
	d -= 0x60;
	SET_FLAG(F_CF);
    }
    set_szp_flags_8(d);
    return d;
}

/****************************************************************************
REMARKS:
Implements the DEC instruction and side effects.
****************************************************************************/
u8 dec_byte(u8 d)
{
    u32 res;   /* all operands in native machine order */

    res = d - 1;
    set_szp_flags_8((u8)res);
    calc_borrow_chain(8, d, 1, res, 0);

    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the DEC instruction and side effects.
****************************************************************************/
u16 dec_word(u16 d)
{
    u32 res;   /* all operands in native machine order */

    res = d - 1;
    set_szp_flags_16((u16)res);
    calc_borrow_chain(16, d, 1, res, 0);

    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the DEC instruction and side effects.
****************************************************************************/
u32 dec_long(u32 d)
{
    u32 res;   /* all operands in native machine order */

    res = d - 1;

    set_szp_flags_32(res);
    calc_borrow_chain(32, d, 1, res, 0);

    return res;
}

/****************************************************************************
REMARKS:
Implements the INC instruction and side effects.
****************************************************************************/
u8 inc_byte(u8 d)
{
    u32 res;   /* all operands in native machine order */

    res = d + 1;
    set_szp_flags_8((u8)res);
    calc_carry_chain(8, d, 1, res, 0);

    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the INC instruction and side effects.
****************************************************************************/
u16 inc_word(u16 d)
{
    u32 res;   /* all operands in native machine order */

    res = d + 1;
    set_szp_flags_16((u16)res);
    calc_carry_chain(16, d, 1, res, 0);

    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the INC instruction and side effects.
****************************************************************************/
u32 inc_long(u32 d)
{
    u32 res;   /* all operands in native machine order */

    res = d + 1;
    set_szp_flags_32(res);
    calc_carry_chain(32, d, 1, res, 0);

    return res;
}

/****************************************************************************
REMARKS:
Implements the OR instruction and side effects.
****************************************************************************/
u8 or_byte(u8 d, u8 s)
{
    u8 res;    /* all operands in native machine order */

    res = d | s;
    no_carry_byte_side_eff(res);

    return res;
}

/****************************************************************************
REMARKS:
Implements the OR instruction and side effects.
****************************************************************************/
u16 or_word(u16 d, u16 s)
{
    u16 res;   /* all operands in native machine order */

    res = d | s;
    no_carry_word_side_eff(res);
    return res;
}

/****************************************************************************
REMARKS:
Implements the OR instruction and side effects.
****************************************************************************/
u32 or_long(u32 d, u32 s)
{
    u32 res;   /* all operands in native machine order */

    res = d | s;
    no_carry_long_side_eff(res);
    return res;
}

/****************************************************************************
REMARKS:
Implements the OR instruction and side effects.
****************************************************************************/
u8 neg_byte(u8 s)
{
    u8 res;

    CONDITIONAL_SET_FLAG(s != 0, F_CF);
    res = (u8)-s;
    set_szp_flags_8(res);
    calc_borrow_chain(8, 0, s, res, 0);

    return res;
}

/****************************************************************************
REMARKS:
Implements the OR instruction and side effects.
****************************************************************************/
u16 neg_word(u16 s)
{
    u16 res;

    CONDITIONAL_SET_FLAG(s != 0, F_CF);
    res = (u16)-s;
    set_szp_flags_16((u16)res);
    calc_borrow_chain(16, 0, s, res, 0);

    return res;
}

/****************************************************************************
REMARKS:
Implements the OR instruction and side effects.
****************************************************************************/
u32 neg_long(u32 s)
{
    u32 res;

    CONDITIONAL_SET_FLAG(s != 0, F_CF);
    res = (u32)-s;
    set_szp_flags_32(res);
    calc_borrow_chain(32, 0, s, res, 0);

    return res;
}

/****************************************************************************
REMARKS:
Implements the NOT instruction and side effects.
****************************************************************************/
u8 not_byte(u8 s)
{
    return ~s;
}

/****************************************************************************
REMARKS:
Implements the NOT instruction and side effects.
****************************************************************************/
u16 not_word(u16 s)
{
    return ~s;
}

/****************************************************************************
REMARKS:
Implements the NOT instruction and side effects.
****************************************************************************/
u32 not_long(u32 s)
{
    return ~s;
}

/****************************************************************************
REMARKS:
Implements the RCL instruction and side effects.
****************************************************************************/
u8 rcl_byte(u8 d, u8 s)
{
    unsigned int res, cnt, mask, cf;

    /* s is the rotate distance.  It varies from 0 - 8. */
    /* have

       CF  B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0

       want to rotate through the carry by "s" bits.  We could
       loop, but that's inefficient.  So the width is 9,
       and we split into three parts:

       The new carry flag   (was B_n)
       the stuff in B_n-1 .. B_0
       the stuff in B_7 .. B_n+1

       The new rotate is done mod 9, and given this,
       for a rotation of n bits (mod 9) the new carry flag is
       then located n bits from the MSB.  The low part is
       then shifted up cnt bits, and the high part is or'd
       in.  Using CAPS for new values, and lowercase for the
       original values, this can be expressed as:

       IF n > 0
       1) CF <-	 b_(8-n)
       2) B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_0
       3) B_(n-1) <- cf
       4) B_(n-2) .. B_0 <-  b_7 .. b_(8-(n-1))
     */
    res = d;
    if ((cnt = s % 9) != 0) {
	/* extract the new CARRY FLAG. */
	/* CF <-  b_(8-n)	      */
	cf = (d >> (8 - cnt)) & 0x1;

	/* get the low stuff which rotated
	   into the range B_7 .. B_cnt */
	/* B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_0  */
	/* note that the right hand side done by the mask */
	res = (d << cnt) & 0xff;

	/* now the high stuff which rotated around
	   into the positions B_cnt-2 .. B_0 */
	/* B_(n-2) .. B_0 <-  b_7 .. b_(8-(n-1)) */
	/* shift it downward, 7-(n-2) = 9-n positions.
	   and mask off the result before or'ing in.
	 */
	mask = (1 << (cnt - 1)) - 1;
	res |= (d >> (9 - cnt)) & mask;

	/* if the carry flag was set, or it in.	 */
	if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
	    /*	B_(n-1) <- cf */
	    res |= 1 << (cnt - 1);
	}
	/* set the new carry flag, based on the variable "cf" */
	CONDITIONAL_SET_FLAG(cf, F_CF);
	/* OVERFLOW is set *IFF* cnt==1, then it is the
	   xor of CF and the most significant bit.  Blecck. */
	/* parenthesized this expression since it appears to
	   be causing OF to be misset */
	CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)),
			     F_OF);

    }
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the RCL instruction and side effects.
****************************************************************************/
u16 rcl_word(u16 d, u8 s)
{
    unsigned int res, cnt, mask, cf;

    res = d;
    if ((cnt = s % 17) != 0) {
	cf = (d >> (16 - cnt)) & 0x1;
	res = (d << cnt) & 0xffff;
	mask = (1 << (cnt - 1)) - 1;
	res |= (d >> (17 - cnt)) & mask;
	if (ACCESS_FLAG(F_CF)) {
	    res |= 1 << (cnt - 1);
	}
	CONDITIONAL_SET_FLAG(cf, F_CF);
	CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)),
			     F_OF);
    }
    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the RCL instruction and side effects.
****************************************************************************/
u32 rcl_long(u32 d, u8 s)
{
    u32 res, cnt, mask, cf;

    res = d;
    if ((cnt = s % 33) != 0) {
	cf = (d >> (32 - cnt)) & 0x1;
	res = (d << cnt) & 0xffffffff;
	mask = (1 << (cnt - 1)) - 1;
	res |= (d >> (33 - cnt)) & mask;
	if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
	    res |= 1 << (cnt - 1);
	}
	CONDITIONAL_SET_FLAG(cf, F_CF);
	CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)),
			     F_OF);
    }
    return res;
}

/****************************************************************************
REMARKS:
Implements the RCR instruction and side effects.
****************************************************************************/
u8 rcr_byte(u8 d, u8 s)
{
    u32 res, cnt;
    u32 mask, cf, ocf = 0;

    /* rotate right through carry */
    /*
       s is the rotate distance.  It varies from 0 - 8.
       d is the byte object rotated.

       have

       CF  B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0

       The new rotate is done mod 9, and given this,
       for a rotation of n bits (mod 9) the new carry flag is
       then located n bits from the LSB.  The low part is
       then shifted up cnt bits, and the high part is or'd
       in.  Using CAPS for new values, and lowercase for the
       original values, this can be expressed as:

       IF n > 0
       1) CF <-	 b_(n-1)
       2) B_(8-(n+1)) .. B_(0)	<-  b_(7) .. b_(n)
       3) B_(8-n) <- cf
       4) B_(7) .. B_(8-(n-1)) <-  b_(n-2) .. b_(0)
     */
    res = d;
    if ((cnt = s % 9) != 0) {
	/* extract the new CARRY FLAG. */
	/* CF <-  b_(n-1)	       */
	if (cnt == 1) {
	    cf = d & 0x1;
	    /* note hackery here.  Access_flag(..) evaluates to either
	       0 if flag not set
	       non-zero if flag is set.
	       doing access_flag(..) != 0 casts that into either
	       0..1 in any representation of the flags register
	       (i.e. packed bit array or unpacked.)
	     */
	    ocf = ACCESS_FLAG(F_CF) != 0;
	} else
	    cf = (d >> (cnt - 1)) & 0x1;

	/* B_(8-(n+1)) .. B_(0)	 <-  b_(7) .. b_n  */
	/* note that the right hand side done by the mask
	   This is effectively done by shifting the
	   object to the right.	 The result must be masked,
	   in case the object came in and was treated
	   as a negative number.  Needed??? */

	mask = (1 << (8 - cnt)) - 1;
	res = (d >> cnt) & mask;

	/* now the high stuff which rotated around
	   into the positions B_cnt-2 .. B_0 */
	/* B_(7) .. B_(8-(n-1)) <-  b_(n-2) .. b_(0) */
	/* shift it downward, 7-(n-2) = 9-n positions.
	   and mask off the result before or'ing in.
	 */
	res |= (d << (9 - cnt));

	/* if the carry flag was set, or it in.	 */
	if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
	    /*	B_(8-n) <- cf */
	    res |= 1 << (8 - cnt);
	}
	/* set the new carry flag, based on the variable "cf" */
	CONDITIONAL_SET_FLAG(cf, F_CF);
	/* OVERFLOW is set *IFF* cnt==1, then it is the
	   xor of CF and the most significant bit.  Blecck. */
	/* parenthesized... */
	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)),
				 F_OF);
	}
    }
    return (u8)res;
}

/****************************************************************************
REMARKS:
Implements the RCR instruction and side effects.
****************************************************************************/
u16 rcr_word(u16 d, u8 s)
{
    u32 res, cnt;
    u32 mask, cf, ocf = 0;

    /* rotate right through carry */
    res = d;
    if ((cnt = s % 17) != 0) {
	if (cnt == 1) {
	    cf = d & 0x1;
	    ocf = ACCESS_FLAG(F_CF) != 0;
	} else
	    cf = (d >> (cnt - 1)) & 0x1;
	mask = (1 << (16 - cnt)) - 1;
	res = (d >> cnt) & mask;
	res |= (d << (17 - cnt));
	if (ACCESS_FLAG(F_CF)) {
	    res |= 1 << (16 - cnt);
	}
	CONDITIONAL_SET_FLAG(cf, F_CF);
	if (cnt == 1) {
	    CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)),
				 F_OF);
	}
    }
    return (u16)res;
}

/****************************************************************************
REMARKS:
Implements the RCR instruction and side effects.
****************************************************************************/
u32 rcr_long(u32 d, u8 s)
{
    u32 res, cnt;
    u32 mask, cf, ocf = 0;

    /* rotate right through carry */
    res = d;
    if ((cnt = s % 33) != 0) {
	if (cnt == 1) {
	    cf = d & 0x1;
	    ocf = ACCESS_FLAG(F_CF) != 0;
	} else
	    cf = (d >> (cnt - 1)) & 0x1;
	mask = (1 << (32 - cnt)) - 1;