main.c

QNX ADS BSP code for i.MX27 chips

/*
 * $QNXLicenseC: 
 * Copyright 2007, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $
 */


/*
 * Freescale MX21ADS Board with i.MX21 processor (ARM926 core)
 */

#include "startup.h"
#include <arm/mx21.h>


extern void init_qtime_mx21(void);
extern struct callout_rtn	reboot_mx21;

const struct callout_slot callouts[] = {
	{ CALLOUT_SLOT( reboot, _mx21) },
};

const struct debug_device debug_devices[] = {
	{ 	"mx1",
		{	"0x1000a000^0.0.44333333.16",	/* Use whatever boot loader baud rate */
		},
		init_mx1,
		put_mx1,
		{	&display_char_mx1,
			&poll_key_mx1,
			&break_detect_mx1,
		}
	},
};

static unsigned mx21_get_mpll(unsigned ref32k)
{
	uint64_t ref_clk, mfi, mfn, mfd, pd, mpll;

	if (in32(MX21_CRM_BASE + 0) & (1 << 16))	/* External high frequency clock selected */
		ref_clk = 26000000;
	else
		ref_clk = ref32k * 512;

	mfn = in32(0x10027004);
	pd  = (mfn >> 26) & 0x0F;
	mfd = (mfn >> 16) & 0x3FF;
	mfi = (mfn >> 10) & 0x0F;
	mfn = mfn & 0x3FF;

	mpll = (ref_clk * 2 * (mfi * (mfd + 1) + mfn)) / (mfd + 1) / (pd + 1);


	return ((unsigned)mpll);
}


#define	MX21ADS_CSPI1_ENABLE	(1 << 0)
#define	MX21ADS_CSPI2_ENABLE	(1 << 1)
#define	MX21ADS_CSPI3_ENABLE	(1 << 2)
#define	MX21ADS_I2C_ENABLE		(1 << 3)
#define	MX21ADS_USBG_ENABLE		(1 << 4)

/*
 * main()
 *	Startup program executing out of RAM
 *
 * 1. It gathers information about the system and places it in a structure
 *    called the system page. The kernel references this structure to
 *    determine everything it needs to know about the system. This structure
 *    is also available to user programs (read only if protection is on)
 *    via _syspage->.
 *
 * 2. It (optionally) turns on the MMU and starts the next program
 *    in the image file system.
 */
int
main(int argc, char **argv, char **envv)
{
	int		opt, options = 0;

	add_callout_array(callouts, sizeof(callouts));

	while ((opt = getopt(argc, argv, COMMON_OPTIONS_STRING "s:cU")) != -1) {
		switch (opt) {
			case 's':
				options |= 1 << (getsize(optarg, NULL) - 1);
				break;
			case 'c':
				options |= MX21ADS_I2C_ENABLE;
				break;
			case 'U':
				options |= MX21ADS_USBG_ENABLE;
				break;
			default:
				handle_common_option(opt);
				break;
		}
	}

	/*
	 * Initialise debugging output
	 */
	select_debug(debug_devices, sizeof(debug_devices));

	/*
	 * Collect information on all free RAM in the system
	 */
	init_raminfo();

	/*
	 * set CPU frequency
	 */
	if (cpu_freq == 0)
		cpu_freq = mx21_get_mpll(32768) / ((in32(MX21_CRM_BASE) >> 29) + 1);

	/*
	 * Remove RAM used by modules in the image
	 */
	alloc_ram(shdr->ram_paddr, shdr->ram_size, 1);
	if (shdr->flags1 & STARTUP_HDR_FLAGS1_VIRTUAL)
		init_mmu();

	init_intrinfo();
	init_qtime_mx21();
	init_cacheattr();
	init_cpuinfo();
	init_hwinfo();
	add_typed_string(_CS_MACHINE, "i.MX21ADS");

	/* Configure CSPI1 pins : PortD */
	if (options & MX21ADS_CSPI1_ENABLE) {
#define	CSPI1_PINS	(0x7F << 25)
		out32(0x10015320, in32(0x10015320) & ~CSPI1_PINS);	/* Mux function */
		out32(0x10015338, in32(0x10015338) & ~CSPI1_PINS);	/* Primary function */

		/* clock */
		out32(0x10027020, in32(0x10027020) | (1 << 4));
	}

	/* Configure CSPI2 pins : PortD */
	if (options & MX21ADS_CSPI2_ENABLE) {
#define	CSPI2_PINS	(0x3F << 19)
		out32(0x10015320, in32(0x10015320) & ~CSPI2_PINS);	/* Mux function */
		out32(0x10015338, in32(0x10015338) & ~CSPI2_PINS);	/* Primary function */

		/* clock */
		out32(0x10027020, in32(0x10027020) | (1 << 5));
	}

	/* Configure CSPI3 pins : PortE */
	if (options & MX21ADS_CSPI3_ENABLE) {
#define	CSPI3_PINS	(0x35 << 18)
		out32(0x10015420, in32(0x10015420) & ~CSPI3_PINS);	/* Mux function */
		out32(0x10015438, in32(0x10015438) |  CSPI3_PINS);	/* Alternate function */

		/* clock */
		out32(0x10027024, in32(0x10027024) | (1 << 23));
	}

	/* Configure USBG pins : PortC */
	if (options & MX21ADS_USBG_ENABLE) {
#define MX2HOST_PORT_B_MASK (1 << 23)
#define MX2HOST_PORT_C_MASK ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 13))
		out32(0x10015120, in32(0x10015120) & ~MX2HOST_PORT_B_MASK); /* Mux function */
		out32(0x10015138, in32(0x10015138) & ~MX2HOST_PORT_B_MASK); /* Primary function */

		out32(0x10015220, in32(0x10015220) & ~MX2HOST_PORT_C_MASK); /* Mux function */
		out32(0x10015238, in32(0x10015238) & ~MX2HOST_PORT_C_MASK); /* Primary function */

#define MX2HOST1_PORT_B_MASK  ((1 << 25) | (1 << 26) | (1 << 27) | (1 << 28) | (1 << 29) | (1 << 30) |(1 << 31))
		out32(0x10015120, in32(0x10015120) & ~MX2HOST1_PORT_B_MASK);    /* Mux function */
		out32(0x10015138, in32(0x10015138) & ~MX2HOST1_PORT_B_MASK);    /* Primary function */

#define MX2HOST2_PORT_D_MASK_AIN  ((1 << 21) | (1 << 22) | (1 << 23) |(1 << 24))
#define MX2HOST2_PORT_D_MASK_AOUT  ((1 << 19) | (1 << 20))
		out32(0x10015320, in32(0x10015320) | MX2HOST2_PORT_D_MASK_AIN |MX2HOST2_PORT_D_MASK_AOUT);  /* GPIO */
		//set as Input
		out32(0x10015300, in32(0x10015300) | ~(MX2HOST2_PORT_D_MASK_AIN)); //DDIR
		//set as output
		out32(0x10015300, in32(0x10015300) | (MX2HOST2_PORT_D_MASK_AOUT)); //DDIR
		//for MX2HOST2_PORT_D_MASK_AOUT set as OCRA for 19,20,26
		out32(0x10015308, in32(0x10015308) & ~((3 << (3 * 2)) | (3 << (4 * 2)) | (3 << (10 * 2))));
		//for MX2HOST2_PORT_D_MASK_AIN set as INCONFA for 21,22,23,24
		out32(0x10015310, in32(0x10015310) & ~((3 << (5 * 2)) | (3 << (6 * 2)) | (3 << (7 * 2)) | (3 << (8 * 2))));

		/* clock */
		out32(0x10027020, in32(0x10027020) | (1 << 14));
	}

	/* Configure I2C pins : PortD */
	if (options & MX21ADS_I2C_ENABLE) {
#define	I2C_PINS	(0x03 << 17)
		out32(0x10015320, in32(0x10015320) & ~I2C_PINS);	/* Mux function */
		out32(0x10015338, in32(0x10015328) & ~I2C_PINS);	/* Primary function */

		/* clock */
		out32(0x10027020, in32(0x10027020) | (1 << 12));
	}

	/* Enable clocks : GPIO, LCDC */
	out32(0x10027020, in32(0x10027020) | (1 << 11) | (1 << 26));

	/*
	 * Load bootstrap executables in the image file system and Initialise
	 * various syspage pointers. This must be the _last_ initialisation done
	 * before transferring control to the next program.
	 */
	init_system_private();

	/*
	 * This is handy for debugging a new version of the startup program.
	 * Commenting this line out will save a great deal of code.
	 */
	print_syspage();

	return 0;
}