imx21.h

QNX ADS BSP code for i.MX27 chips

/*
 * $QNXLicenseC: 
 * Copyright 2007, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */


#ifndef __IMX21_H_INCLUDED
#define __IMX21_H_INCLUDED

#include <graphics/display.h>
#include <graphics/disputil.h>
#include <graphics/ffb.h>

#define rptr(x) (uint32_t volatile *)(((unsigned char volatile *)i_ctx->regptr)+x)
#define crptr(x) (uint32_t volatile *)(((unsigned char volatile *)i_ctx->cregptr)+x)
#define grptr(x) (uint32_t volatile *)(((unsigned char volatile *)i_ctx->gregptr)+x)
#define mptr(x) (uint16_t volatile *)(((unsigned char volatile *)i_ctx->mmioptr)+x)

#define	LCDC_REG_BASE	0x10021000
#define LCDC_REG_SIZE	0x1000	

#define PLL_REG_BASE	0x10027000
#define PLL_REG_SIZE	0x1000

#define GPIO_REG_BASE	0x10015000
#define GPIO_REG_SIZE	0x200

/* M9328MX21ADS Memory Mapped I/O  - reference board specific */
#define MMIO_BASE	0xCC800000
#define MMIO_SIZE	0x10
#define MMIO		mptr(0)

/* LCDC registers */
#define LSSAR		rptr(0)		/* Screen Start Address */
#define	LSR		rptr(0x4)	/* LCDC Size */ 
#define LVPWR		rptr(0x8)	/* LCDC Virtual Page Width */
#define LCPR		rptr(0xC)	/* LCDC Cursor Position */
#define LCWHBR		rptr(0x10)	/* LCDC Cursor Width Height and Blink */
#define LCCMR		rptr(0x14)	/* LCDC Color Cursor Mapping */
#define LPCR		rptr(0x18)	/* LCDC Panel Configuration */
#define LHCR		rptr(0x1C)	/* LCDC Horizontal Configuration */
#define LVCR		rptr(0x20)	/* LCDC Vertical Configuration */
#define LPOR		rptr(0x24)	/* LCDC Panning Offset */
#define LSCR		rptr(0x28)	/* LCDC Sharp Configuration */
#define LPCCR		rptr(0x2C)	/* LCDC PWM Contrast Control */
#define LDCR		rptr(0x30)	/* LCDC Graphic Window DMA Control */
#define LRMCR		rptr(0x34)	/* LCDC Refresh Mode Control */
#define LICR		rptr(0x38)	/* LCDC Interrupt Configuration */
#define LIER		rptr(0x3C)	/* LCDC Interuppt Enable */
#define LISR		rptr(0x40)	/* LCDC Interrupt Status */
#define LGWSAR		rptr(0x50)	/* LCDC Graphic Window Start Address */
#define LGWSR		rptr(0x54)	/* LCDC Graphic Window Size*/
#define LGWVPWR		rptr(0x58)	/* LCDC Graphic Window Virtual Page Width */
#define LGWPOR		rptr(0x5C)	/* LCDC Graphic Window Panning Offset */
#define LGWPR		rptr(0x60)	/* LCDC Graphic Window Position */
#define LGWCR		rptr(0x64)	/* LCDC Graphic Window Control */
#define LGWDCR		rptr(0x68)	/* LCDC Graphic Window DMA Control */
#define BPLUT		rptr(0x800)	/* Background Plane LUT */
#define GWLUT		rptr(0xC00)	/* Graphic Window LUT */


/* CHECK - should we have startup set LCD ref clock to known rate, or is it safer to try to check? */

/* PLL clock registers */
#define PCDR1		crptr(0x1C)	/* Peripheral Clock Divider Register 1 */
#define PCCR0		crptr(0x20)	/* Peripheral Clock Divider Register 1 */
#define DSCR1		crptr(0x820)	/* Driving Strength Control Register 1 */

/* GPIO registers */
#define PTA_DDIR	grptr(0x0)
#define PTA_OCR1	grptr(0x04)
#define PTA_OCR2	grptr(0x08)
#define PTA_DR		grptr(0x1C)
#define PTA_GIUS 	grptr(0x20)	/* GPIO In Use Register, Port A */
#define PTA_GPR		grptr(0x38)	/* General Purpose Register, Port A */

#define PTB_DDIR	grptr(0x100)
#define PTB_OCR1	grptr(0x104)
#define PTB_OCR2	grptr(0x108)
#define PTB_DR		grptr(0x11C)
#define PTB_GIUS 	grptr(0x120)


/*
 * IMX21 LCD controller private state
 */
typedef struct 
{
	disp_adapter_t 	*adapter;
	uint32_t	*regptr;
	uint32_t	*cregptr;
	uint32_t	*gregptr;
	uint16_t	*mmioptr;
	int		ref_clk;
	int		lcd_on;
	unsigned	regbase;
	unsigned	cregbase;
	unsigned	gregbase;
	int		mode;

	/* configurable options */
	unsigned	mmiobase;
	short   	width;
	short   	height;
	int		tft;
	int		color;
	int		pbsiz;
	int		pixpol;
	int		flmpol;
	int		lppol;
	int		clkpol;
	int		oepol;
	int		sclkidle;
	int		end_sel;
	int		swap_sel;
	int		rev_vs;
	int		acdsel;
	int		acd;
	int		sclksel;
	int		sharp;
	int		pcd;
	int		hsw, hw1, hw2;
	int		vsw, vw1, vw2;
	int		contrast;
	int		dma;
	int		pa1;
} imx21_context_t;

void	imx21_module_info(disp_adapter_t *adp, disp_module_info_t *info);
int 	get_config_data(imx21_context_t *p_ctx, const char *filename);

#endif