vc1dsp.mid

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	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr14,xr2,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr10,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,4
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr14,xr6,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr10,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,4
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr14,xr2,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr10,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,4
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr14,xr6,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr10,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,4
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr14,xr2,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr10,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,4
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr14,xr6,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr10,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,4
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr14,xr2,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr10,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,4
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr14,xr6,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr10,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,4
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr14,xr2,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr10,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,4
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr14,xr6,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr10,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,4
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr14,xr2,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr10,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,4
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$8,$6,$8
	addu	$5,$6,$5
	addiu	$5,$5,-4
	addu	$6,$6,$4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr14,xr6,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr10,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,4
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr14,xr2,SS
	Q8MUL xr9,xr7,xr15,xr10
	Q8MAC xr9,xr8,xr14,xr10,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr10,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,4
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$6,0
	S32STD xr1,$6,4
#NO_APP
	j	$31
	.end	put_vc1_mspel_mc20_c
	.section	.text.put_vc1_mspel_mc30_c,"ax",@progbits
	.align	2
	.align	5
	.ent	put_vc1_mspel_mc30_c
	.type	put_vc1_mspel_mc30_c, @function
put_vc1_mspel_mc30_c:
	.frame	$sp,0,$31		# vars= 0, regs= 0/0, args= 0, gp= 0
	.mask	0x00000000,0
	.fmask	0x00000000,0
	addiu	$8,$5,1
	addiu	$5,$5,-1
	andi	$2,$5,0x3
	andi	$10,$8,0x3
	li	$9,4			# 0x4
	subu	$10,$9,$10
	li	$12,-4			# 0xfffffffffffffffc
	subu	$9,$9,$2
	li	$3,303169536			# 0x12120000
	and	$8,$8,$12
	and	$5,$5,$12
	ori	$3,$3,0x1212
	addiu	$11,$9,-1
	addiu	$12,$10,-1
#APP
	S32I2M xr15,$3
#NO_APP
	li	$2,892665856			# 0x35350000
	ori	$2,$2,0x3535
#APP
	S32I2M xr14,$2
#NO_APP
	li	$3,50528256			# 0x3030000
	ori	$3,$3,0x303
#APP
	S32I2M xr11,$3
#NO_APP
	li	$2,67371008			# 0x4040000
	ori	$2,$2,0x404
#APP
	S32I2M xr10,$2
#NO_APP
	li	$3,2097152			# 0x200000
	ori	$3,$3,0x20
#APP
	S32I2M xr13,$3
#NO_APP
	sll	$2,$7,16
	addu	$2,$2,$7
#APP
	S32I2M xr12,$2
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr11,xr6,SS
	Q8MUL xr9,xr7,xr14,xr1
	Q8MAC xr9,xr8,xr10,xr1,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr1,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,6
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr11,xr2,SS
	Q8MUL xr9,xr7,xr14,xr3
	Q8MAC xr9,xr8,xr10,xr3,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr3,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,6
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr11,xr6,SS
	Q8MUL xr9,xr7,xr14,xr1
	Q8MAC xr9,xr8,xr10,xr1,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr1,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,6
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr11,xr2,SS
	Q8MUL xr9,xr7,xr14,xr3
	Q8MAC xr9,xr8,xr10,xr3,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr3,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,6
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr11,xr6,SS
	Q8MUL xr9,xr7,xr14,xr1
	Q8MAC xr9,xr8,xr10,xr1,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr1,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,6
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr11,xr2,SS
	Q8MUL xr9,xr7,xr14,xr3
	Q8MAC xr9,xr8,xr10,xr3,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr3,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,6
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr11,xr6,SS
	Q8MUL xr9,xr7,xr14,xr1
	Q8MAC xr9,xr8,xr10,xr1,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr1,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,6
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr11,xr2,SS
	Q8MUL xr9,xr7,xr14,xr3
	Q8MAC xr9,xr8,xr10,xr3,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr3,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,6
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr11,xr6,SS
	Q8MUL xr9,xr7,xr14,xr1
	Q8MAC xr9,xr8,xr10,xr1,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr1,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,6
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr11,xr2,SS
	Q8MUL xr9,xr7,xr14,xr3
	Q8MAC xr9,xr8,xr10,xr3,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr3,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,6
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr11,xr6,SS
	Q8MUL xr9,xr7,xr14,xr1
	Q8MAC xr9,xr8,xr10,xr1,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr1,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,6
	Q16SAT xr5,xr5,xr6
	S32LDI xr1,$5,4
	S32LDD xr2,$5,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32LDI xr1,$8,4
	S32LDD xr2,$8,4
	S32ALN xr7,xr2,xr1,$10
	S32ALN xr8,xr2,xr1,$12
	Q8MUL xr1,xr4,xr15,xr2
	Q8MAC xr1,xr3,xr11,xr2,SS
	Q8MUL xr9,xr7,xr14,xr3
	Q8MAC xr9,xr8,xr10,xr3,SS
	Q16ADD xr0,xr1,xr9,xr1,AA,WW
	Q16ADD xr0,xr2,xr3,xr2,AA,WW
	Q16ACC xr1,xr13,xr12,xr2,SS
	Q16SAR xr1,xr1,xr2,xr2,6
	Q16SAT xr1,xr1,xr2
	S32STD xr5,$4,0
	S32STD xr1,$4,4
#NO_APP
	addu	$5,$6,$5
	addu	$8,$6,$8
	addu	$4,$6,$4
	addiu	$5,$5,-4
	addiu	$8,$8,-4
#APP
	S32LDD xr1,$5,0
	S32LDD xr2,$5,4
	S32LDD xr5,$8,0
	S32LDD xr6,$8,4
	S32ALN xr3,xr2,xr1,$9
	S32ALN xr4,xr2,xr1,$11
	S32ALN xr7,xr6,xr5,$10
	S32ALN xr8,xr6,xr5,$12
	Q8MUL xr5,xr4,xr15,xr6
	Q8MAC xr5,xr3,xr11,xr6,SS
	Q8MUL xr9,xr7,xr14,xr1
	Q8MAC xr9,xr8,xr10,xr1,SS
	Q16ADD xr0,xr5,xr9,xr5,AA,WW
	Q16ADD xr0,xr6,xr1,xr6,AA,WW
	Q16ACC xr5,xr13,xr12,xr6,SS
	Q16SAR xr5,xr5,xr6,xr6,6
	Q16SAT xr5,xr5,xr6