nvidia_vid.c

来自「君正早期ucos系统(只有早期的才不没有打包成库),MPLAYER,文件系统,图」· C语言 代码 · 共 1,156 行 · 第 1/3 页

/*
 * VIDIX driver for nVidia chipsets.
 * Copyright (C) 2003-2004 Sascha Sommer
 *
 * This file is part of MPlayer.
 *
 * MPlayer is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * MPlayer is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with MPlayer; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 *
 * This file is based on sources from RIVATV (rivatv.sf.net)
 * Multi buffer support and TNT2 fixes by Dmitry Baryshkov.
 */

#include <errno.h>
#include <mplaylib.h>
#include <mplaylib.h>
#include <mplaylib.h>
#include <math.h>
#include <inttypes.h>
#include <mplaylib.h>


#include "vidix.h"
#include "vidixlib.h"
#include "fourcc.h"
#include "dha.h"
#include "pci_ids.h"
#include "pci_names.h"
#include "config.h"
#include "libavutil/common.h"
#include "mpbswap.h"

#undef memcpy
#define memcpy uc_memcpy
static pciinfo_t pci_info;


#define MAX_FRAMES 3
#define NV04_BES_SIZE 1024*2000*4


static vidix_capability_t nvidia_cap = {
    "NVIDIA RIVA OVERLAY DRIVER",
    "Sascha Sommer <[e-mail]>",
    TYPE_OUTPUT,
    { 0, 0, 0, 0 },
    2046,
    2046,
    4,
    4,
    -1,
    FLAG_UPSCALER|FLAG_DOWNSCALER,
    VENDOR_NVIDIA2,
    -1,
    { 0, 0, 0, 0 }
};

#define NV_ARCH_03  0x03
#define NV_ARCH_04  0x04
#define NV_ARCH_10  0x10
#define NV_ARCH_20  0x20
#define NV_ARCH_30  0x30
#define NV_ARCH_40  0x40

// since no useful information whatsoever is passed
// to the equalizer functions we need this
static struct {
  uint32_t lum; // luminance (brightness + contrast)
  uint32_t chrom; // chrominance (saturation + hue)
  uint8_t red_off; // for NV03/NV04
  uint8_t green_off;
  uint8_t blue_off;
  vidix_video_eq_t vals;
} eq;

struct nvidia_cards {
  unsigned short chip_id;
  unsigned short arch;
};


static struct nvidia_cards nvidia_card_ids[] = {
  /*NV03*/
  {DEVICE_NVIDIA2_RIVA128, NV_ARCH_03},
  {DEVICE_NVIDIA2_RIVA128ZX,NV_ARCH_03},
  /*NV04*/
  {DEVICE_NVIDIA_NV4_RIVA_TNT,NV_ARCH_04},
  {DEVICE_NVIDIA_NV5_RIVA_TNT2_TNT2,NV_ARCH_04},
  {DEVICE_NVIDIA_NV5_RIVA_TNT2,NV_ARCH_04},  
  {DEVICE_NVIDIA_NV5_RIVA_TNT22,NV_ARCH_04},  
  {DEVICE_NVIDIA_NV5_RIVA_TNT23,NV_ARCH_04},  
  {DEVICE_NVIDIA_NV6_VANTA_VANTA_LT,NV_ARCH_04},
  {DEVICE_NVIDIA_NV5M64_RIVA_TNT2,NV_ARCH_04},
  {DEVICE_NVIDIA_NV6_VANTA,NV_ARCH_04},
  {DEVICE_NVIDIA_NV6_VANTA2,NV_ARCH_04},
  {DEVICE_NVIDIA2_TNT,NV_ARCH_04},
  {DEVICE_NVIDIA2_TNT2,NV_ARCH_04},  
  {DEVICE_NVIDIA2_VTNT2,NV_ARCH_04},  
  {DEVICE_NVIDIA2_UTNT2	,NV_ARCH_04},
  {DEVICE_NVIDIA2_ITNT2,NV_ARCH_04},
  {DEVICE_NVIDIA_NV5_ALADDIN_TNT2,NV_ARCH_04},
  /*NV10*/
  {DEVICE_NVIDIA_NV18_GEFORCE_PCX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV10_GEFORCE_256,NV_ARCH_10},
  {DEVICE_NVIDIA_NV10DDR_GEFORCE_256,NV_ARCH_10},
  {DEVICE_NVIDIA_NV10GL_QUADRO,NV_ARCH_10},
  {DEVICE_NVIDIA_NV11_GEFORCE2_MX_MX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV11DDR_GEFORCE2_MX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV11DDR_GEFORCE2_MX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV11_GEFORCE2_GO,NV_ARCH_10},
  {DEVICE_NVIDIA_NV11GL_QUADRO2_MXR_EX_GO,NV_ARCH_10},
  {DEVICE_NVIDIA_NV15_GEFORCE2_GTS_PRO,NV_ARCH_10},
  {DEVICE_NVIDIA_NV15DDR_GEFORCE2_TI,NV_ARCH_10},
  {DEVICE_NVIDIA_NV15BR_GEFORCE2_ULTRA,NV_ARCH_10},
  {DEVICE_NVIDIA_NV15GL_QUADRO2_PRO,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_MX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_MX2,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_MX3,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_MX4,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_440,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_420,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_4202,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_460,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17GL_QUADRO4_550,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_4203,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17GL_QUADRO4_200_400,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17GL_QUADRO4_5502,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17GL_QUADRO4_550,NV_ARCH_10},
  {DEVICE_NVIDIA_NV17_GEFORCE4_410,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18_GEFORCE4_MX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18_GEFORCE4_MX2,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18_GEFORCE4_MX3,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18_GEFORCE4_MX4,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18_GEFORCE4_MX5,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18M_GEFORCE4_448,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18M_GEFORCE4_488,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18GL_QUADRO_FX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18GL_QUADRO4_580,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18GL_QUADRO4_NVS,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18GL_QUADRO4_380,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18M_GEFORCE4_4482,NV_ARCH_10},
  {DEVICE_NVIDIA_NVCRUSH11_GEFORCE2_MX,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18_GEFORCE4_MX5,NV_ARCH_10},
  {DEVICE_NVIDIA_NV18_GEFORCE_PCX,NV_ARCH_10}, 
  /*NV20*/
  {DEVICE_NVIDIA_NV20_GEFORCE3,NV_ARCH_20},
  {DEVICE_NVIDIA_NV20_GEFORCE3_TI,NV_ARCH_20},
  {DEVICE_NVIDIA_NV20_GEFORCE3_TI2,NV_ARCH_20},
  {DEVICE_NVIDIA_NV20DCC_QUADRO_DCC,NV_ARCH_20},
  {DEVICE_NVIDIA_NV25_GEFORCE4_TI,NV_ARCH_20},
  {DEVICE_NVIDIA_NV25_GEFORCE4_TI2,NV_ARCH_20},
  {DEVICE_NVIDIA_NV25_GEFORCE4_TI3,NV_ARCH_20},
  {DEVICE_NVIDIA_NV25_GEFORCE4_TI4,NV_ARCH_20},
  {DEVICE_NVIDIA_NV25GL_QUADRO4_900,NV_ARCH_20},
  {DEVICE_NVIDIA_NV25GL_QUADRO4_750,NV_ARCH_20},
  {DEVICE_NVIDIA_NV25GL_QUADRO4_700,NV_ARCH_20},
  {DEVICE_NVIDIA_NV28_GEFORCE4_TI,NV_ARCH_20},
  {DEVICE_NVIDIA_NV28_GEFORCE4_TI2,NV_ARCH_20},
  {DEVICE_NVIDIA_NV28_GEFORCE4_TI3,NV_ARCH_20},
  {DEVICE_NVIDIA_NV28_GEFORCE4_TI4,NV_ARCH_20},
  {DEVICE_NVIDIA_NV28GL_QUADRO4_980,NV_ARCH_20},
  {DEVICE_NVIDIA_NV28GL_QUADRO4_780,NV_ARCH_20},
  {DEVICE_NVIDIA_NV28GLM_QUADRO4_700,NV_ARCH_20},
  /*NV30*/
  {DEVICE_NVIDIA_NV30_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV30_GEFORCE_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV30_GEFORCE_FX3,NV_ARCH_30},
  {DEVICE_NVIDIA_NV30GL_QUADRO_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV30GL_QUADRO_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31_GEFORCE_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31_GEFORCE_FX3,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31M,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31M_PRO,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31M_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31M_GEFORCE_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NVIDIA_QUADRO_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31GLM,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31GLM_PRO,NV_ARCH_30},
  {DEVICE_NVIDIA_NV31GLM_PRO2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34_GEFORCE_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34_GEFORCE_FX3,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34_GEFORCE_FX4,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34M_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34M_GEFORCE_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34_GEFORCE_FX5,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34_GEFORCE_FX6,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34M_GEFORCE_FX3,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34M_GEFORCE_FX4,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34GL_QUADRO_NVS,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34GL_QUADRO_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34GLM_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34_GEFORCE_FX7,NV_ARCH_30},
  {DEVICE_NVIDIA_NV34GL,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35_GEFORCE_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35_GEFORCE_FX3,NV_ARCH_30},
  {DEVICE_NVIDIA_NV38_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35_GEFORCE_FX4,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35GL_QUADRO_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35GL_QUADRO_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35_GEFORCE_PCX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_1_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_2_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_4_GEFORCE_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_5,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_GEFORCE_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_GEFORCE_FX3,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_GEFORCE_PCX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36M_PRO,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36MAP,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_QUADRO_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36GL_QUADRO_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36GL,NV_ARCH_30},
  {DEVICE_NVIDIA_NV36_GEFORCE_PCX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV35_GEFORCE_PCX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV37GL_QUADRO_FX,NV_ARCH_30},
  {DEVICE_NVIDIA_NV37GL_QUADRO_FX2,NV_ARCH_30},
  {DEVICE_NVIDIA_NV38GL_QUADRO_FX,NV_ARCH_30},
  /* NV40: GeForce 6x00 to 7x00 */
  {DEVICE_NVIDIA_NV40_GEFORCE_6800,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68002,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_2_GEFORCE_6800,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_3,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68003,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68004,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68005,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68006,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68007,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68008,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68009,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_680010,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_680011,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_680012,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_68008,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40GL,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40GL_QUADRO_FX,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40GL_QUADRO_FX2,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41_GEFORCE_6800,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41_1_GEFORCE_6800,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41_2_GEFORCE_6800,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41_8_GEFORCE_GO,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41_9_GEFORCE_GO,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41_QUADRO_FX,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41_QUADRO_FX2,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41GL_QUADRO_FX,NV_ARCH_40},
  {DEVICE_NVIDIA_NV41GL_QUADRO_FX,NV_ARCH_40},
  {DEVICE_NVIDIA_NV40_GEFORCE_6800_GEFORCE,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_6600_GEFORCE,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_6600_GEFORCE2,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_6200,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_62002,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_6600,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_66002,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_66003,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_66004,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_66005,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_GO,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_GO2,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_GO3,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_GO4,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_GO5,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_GO6,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43_GEFORCE_6610,NV_ARCH_40},
  {DEVICE_NVIDIA_NV43GL_QUADRO_FX,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_6100_NFORCE,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_6100_NFORCE2,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_6100_NFORCE3,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_6100_NFORCE4,NV_ARCH_40},
  {DEVICE_NVIDIA_C51G_GEFORCE_6100,NV_ARCH_40},
  {DEVICE_NVIDIA_C51PV_GEFORCE_6150,NV_ARCH_40},
  {DEVICE_NVIDIA_NV44_GEFORCE_6200,NV_ARCH_40},
  {DEVICE_NVIDIA_NV44_GEFORCE_62002,NV_ARCH_40},
  {DEVICE_NVIDIA_NV44_GEFORCE_62003,NV_ARCH_40},
  {DEVICE_NVIDIA_NV44_GEFORCE_GO,NV_ARCH_40},
  {DEVICE_NVIDIA_NV44_QUADRO_NVS,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_GO_6200,NV_ARCH_40},
  {DEVICE_NVIDIA_NV44A_GEFORCE_6200,NV_ARCH_40},
  {DEVICE_NVIDIA_NV45GL_QUADRO_FX,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_GO_7200,NV_ARCH_40},
  {DEVICE_NVIDIA_QUADRO_NVS_110M,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_GO_7400,NV_ARCH_40},
  {DEVICE_NVIDIA_QUADRO_NVS_110M2,NV_ARCH_40},
  {DEVICE_NVIDIA_QUADRO_FX_350,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_7300,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_7300_GS,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_7600,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_76002,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_7600_GS,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_GO,NV_ARCH_40},
  {DEVICE_NVIDIA_QUADRO_FX_560,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_7800,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_78002,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_78003,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_78004,NV_ARCH_40},
  {DEVICE_NVIDIA_G70_GEFORCE_78005,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_GO_7800,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_7900_GTX,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_7900_GT,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_7900_GS,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_GO_7900,NV_ARCH_40},
  {DEVICE_NVIDIA_GEFORCE_GO_79002,NV_ARCH_40},
  {DEVICE_NVIDIA_GE_FORCE_GO,NV_ARCH_40},
  {DEVICE_NVIDIA_G70GL_QUADRO_FX4500,NV_ARCH_40},
  {DEVICE_NVIDIA_G71_QUADRO_FX,NV_ARCH_40},
  {DEVICE_NVIDIA_G71_QUADRO_FX2,NV_ARCH_40}
};


static int find_chip(unsigned chip_id){
  unsigned i;
  for(i = 0;i < sizeof(nvidia_card_ids)/sizeof(struct nvidia_cards);i++)
  {
    if(chip_id == nvidia_card_ids[i].chip_id)return i;
  }
  return -1;
}

static int nv_probe(int verbose, int force){
    pciinfo_t lst[MAX_PCI_DEVICES];
    unsigned i,num_pci;
    int err;

    if (force)
	    printf("[nvidia_vid]: warning: forcing not supported yet!\n");
    err = pci_scan(lst,&num_pci);
    if(err){
	printf("[nvidia_vid] Error occurred during pci scan: %s\n",strerror(err));
	return err;
    }
    else {
	err = ENXIO;
	for(i=0; i < num_pci; i++){
	    if(lst[i].vendor == VENDOR_NVIDIA2 || lst[i].vendor == VENDOR_NVIDIA){
		int idx;
		const char *dname;
		idx = find_chip(lst[i].device);
		if(idx == -1)
		    continue;
		dname = pci_device_name(lst[i].vendor, lst[i].device);
		dname = dname ? dname : "Unknown chip";
		printf("[nvidia_vid] Found chip: %s\n", dname);
		if ((lst[i].command & PCI_COMMAND_IO) == 0){
			printf("[nvidia_vid] Device is disabled, ignoring\n");
			continue;
		}
		nvidia_cap.device_id = lst[i].device;
		err = 0;
		memcpy(&pci_info, &lst[i], sizeof(pciinfo_t));
		break;
	    }
	}
    }
    if(err && verbose) printf("[nvidia_vid] Can't find chip\n");
    return err;
}




/*
 * PCI-Memory IO access macros.
 */

#define MEM_BARRIER() __asm__ __volatile__ ("" : : : "memory")

#undef	VID_WR08
#define VID_WR08(p,i,val) ({ MEM_BARRIER(); ((uint8_t *)(p))[(i)]=(val); })
#undef	VID_RD08
#define VID_RD08(p,i)     ({ MEM_BARRIER(); ((uint8_t *)(p))[(i)]; })

#undef	VID_WR32