lgdp4551.c

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	W_Reg_Data(0x003A, 0x0F04);
	W_Reg_Data(0x003B, 0x0F00);
	W_Reg_Data(0x003C, 0x000F);
	W_Reg_Data(0x003D, 0x050F);
	W_Reg_Data(0x003E, 0x0204);
	W_Reg_Data(0x003F, 0x0404);

	W_Reg_Data(0x0050, 0x0000);		// Horizontal GRAM Start Address-----HSA[7:0]
	W_Reg_Data(0x0051, 0x00EF);		// Horizontal GRAM End Address-----HEA[7:0]
	W_Reg_Data(0x0052, 0x0000);		// Vertical GRAM Start Address-----VSA[8:0]
	W_Reg_Data(0x0053, 0x013F);		// Vertical GRAM Start Address-----VEA[8:0]
	
	W_Reg_Data(0x0060, 0xA700);		// GS, NL[5:0], SCN[5:0]
	//W_Reg_Data(0x0060, 0x2700);	//////////vertical scan/////////
	W_Reg_Data(0x0061, 0x0001);		// NDL,VLE, REV
	W_Reg_Data(0x006A, 0x0000);		// VL[8:0]
	
	W_Reg_Data(0x0080, 0x0000);		// Partial Image 1 Display Position-----PTDP0[8:0]
	W_Reg_Data(0x0081, 0x0000);		// Partial Image 1 Start Address-----PTSA0[8:0]
	W_Reg_Data(0x0082, 0x0000);		// Partial Image 1 End Address-----PTEA0[8:0]
	W_Reg_Data(0x0083, 0x0000);		// Partial Image 2 Display Position-----PTDP1[8:0]
	W_Reg_Data(0x0084, 0x0000);		// Partial Image 2 Start Address-----PTSA1[8:0]
	W_Reg_Data(0x0085, 0x0000);		// Partial Image 2 Start Address-----PTEA1[8:0]
	
	W_Reg_Data(0x0090, 0x0010);		// Panel Interface Control 1-----DIVI[1:0], RTNI[4:0]
	W_Reg_Data(0x0092, 0x0000);		// Panel Interface Control 2-----NOWI[2:0]
	W_Reg_Data(0x0093, 0x0103);		// Panel Interface Control 3-----MCPI[2:0]
	W_Reg_Data(0x0095, 0x0210);		// Panel Interface Control 4-----DIVE[1:0], RTNE[5:0]
	W_Reg_Data(0x0097, 0x0000);		// Panel Interface Control 5-----NOWE[3:0]
	W_Reg_Data(0x0098, 0x0000);		// Panel Interface Control 6-----MCPE[2:0]
	
	W_Reg_Data(0x00F0, 0x5408);
	W_Reg_Data(0x00F3, 0x0007);
	W_Reg_Data(0x00F4, 0x001F);
	W_Reg_Data(0x00F0, 0x0000);
	
	W_Reg_Data(0x0007, 0x0001);	// Display Control 1
	delay50ms();
	W_Reg_Data(0x0007, 0x0021);	// Display Control 1
	W_Reg_Data(0x0007, 0x0023);	// Display Control 1

	delay50ms();
	W_Reg_Data(0x0007, 0x0173);		// Display Control 1-----display ON
}





static void __slcd_special_on(void)
{
	__gpio_set_pin(PIN_RESET_N);	
	mdelay(10);			
	__gpio_clear_pin(PIN_RESET_N);	
	mdelay(10);
	__gpio_set_pin(PIN_RESET_N);	
	mdelay(100);

	initial();
	
	//Mcupanel_Command(0x0202);                  //Write Data to GRAM	  
	Mcupanel_Command(0x022);
	udelay(10);
	Mcupanel_SetAddr(0,0);
	udelay(100);
}

#if 0
static void __slcd_special_on(void)
{
	__gpio_set_pin(PIN_RESET_N);	
	mdelay(10);			
	__gpio_clear_pin(PIN_RESET_N);	
	mdelay(10);
	__gpio_set_pin(PIN_RESET_N);	
	mdelay(100);
	if (jzfb_slcd.bus == 18) {
		Mcupanel_RegSet(0x0606,0x0000);
		udelay(10);
		Mcupanel_RegSet(0x0007,0x0001);
		udelay(10);
		Mcupanel_RegSet(0x0110,0x0001);
		udelay(10);
		Mcupanel_RegSet(0x0100,0x17b0);
		Mcupanel_RegSet(0x0101,0x0147);
		Mcupanel_RegSet(0x0102,0x019d);
		Mcupanel_RegSet(0x0103,0x8600);
		Mcupanel_RegSet(0x0281,0x0010);
		udelay(10);
		Mcupanel_RegSet(0x0102,0x01bd);
		udelay(10);
		
		
		//************initia************
		Mcupanel_RegSet(0x0000,0x0000);
		Mcupanel_RegSet(0x0001,0x0000);//0100
		Mcupanel_RegSet(0x0002,0x0400);//0100
		/*up:0x1288 down:0x12B8 left:0x1290 right:0x12A0*/
		Mcupanel_RegSet(0x0003,0x1288);
		Mcupanel_RegSet(0x0006,0x0000);
		Mcupanel_RegSet(0x0008,0x0503);
		Mcupanel_RegSet(0x0009,0x0001);//0001
		Mcupanel_RegSet(0x000b,0x0010);
		Mcupanel_RegSet(0x000c,0x0000);
		Mcupanel_RegSet(0x000f,0x0000);
		Mcupanel_RegSet(0x0007,0x0001);
		Mcupanel_RegSet(0x0010,0x0010);/////////
		Mcupanel_RegSet(0x0011,0x0202);
		Mcupanel_RegSet(0x0012,0x0300);
		Mcupanel_RegSet(0x0020,0x021e);
		Mcupanel_RegSet(0x0021,0x0202);
		Mcupanel_RegSet(0x0022,0x0100);
		Mcupanel_RegSet(0x0090,0x0000);
		Mcupanel_RegSet(0x0092,0x0000);
		Mcupanel_RegSet(0x0100,0x16b0);
		Mcupanel_RegSet(0x0101,0x0147);
		Mcupanel_RegSet(0x0102,0x01bd);
		//Mcupanel_RegSet(0x0103,0x3600);
		Mcupanel_RegSet(0x0103,0x2c00);//////////////
		
		Mcupanel_RegSet(0x0107,0x0000);
		Mcupanel_RegSet(0x0110,0x0001);
		
		Mcupanel_RegSet(0x0210,0x0000);
		Mcupanel_RegSet(0x0211,0x00ef);
		Mcupanel_RegSet(0x0212,0x0000);
		Mcupanel_RegSet(0x0213,0x018f);
		Mcupanel_RegSet(0x0280,0x0000);
		Mcupanel_RegSet(0x0281,0x0001);////////////////
		
		Mcupanel_RegSet(0x0282,0x0000);
		GAMMA();
		
		Mcupanel_RegSet(0x0007,0x0173);
		
	}
	else {
		Mcupanel_RegSet(0x0600, 0x0001);   //soft reset    
		mdelay(10);  
		Mcupanel_RegSet(0x0600, 0x0000);   //soft reset   
		mdelay(10);  
		Mcupanel_RegSet(0x0606, 0x0000);   //i80-i/F Endian Control
		
		//===User setting===    
		Mcupanel_RegSet(0x0001, 0x0100);   //Driver Output Control-------------0x0100 SM(bit10) | 0x400
		Mcupanel_RegSet(0x0002, 0x0100);   //LCD Driving Wave Control      0x0100 
#ifdef LCD_MODULE_G240400_REV
		if (jzfb_slcd.bpp == 16)
			Mcupanel_RegSet(0x0003, 0x50A8);//0x1020 | 0x8);   //Entry Mode 0x1030
	else /*bpp = 18*/
		Mcupanel_RegSet(0x0003, 0xD0A8);//0x1020 | 0x8);   //Entry Mode 0x1030
#else
		if (jzfb_slcd.bpp == 16)
			Mcupanel_RegSet(0x0003, 0x1010 | 0x8);   //Entry Mode 0x1030
		else /*bpp = 18*/
			Mcupanel_RegSet(0x0003, 0x1010 | 0xC8);   //Entry Mode 0x1030
#endif
		Mcupanel_RegSet(0x0006, 0x0000);   //Outline Sharpening Control     
		Mcupanel_RegSet(0x0008, 0x0808);   //Sets the number of lines for front/back porch period       
		Mcupanel_RegSet(0x0009, 0x0001);   //Display Control 3    
		Mcupanel_RegSet(0x000B, 0x0010);   //Low Power Control
		Mcupanel_RegSet(0x000C, 0x0000);   //External Display Interface Control 1 //0x0001
		Mcupanel_RegSet(0x000F, 0x0000);   //External Display Interface Control 2         
		Mcupanel_RegSet(0x0400, 0x3100);   //Base Image Number of Line--------------GS(bit15) | 0x8000
		Mcupanel_RegSet(0x0401, 0x0001);   //Base Image Display        0x0001
		Mcupanel_RegSet(0x0404, 0x0000);   //Base Image Vertical Scroll Control    0x0000
		
		Mcupanel_RegSet(0x0500, 0x0000);   //Partial Image 1: Display Position
		Mcupanel_RegSet(0x0501, 0x0000);   //RAM Address (Start Line Address) 
#ifdef LCD_MODULE_G240400_REV
		Mcupanel_RegSet(0x0502, 0x0000);   //RAM Address (End Line Address)  
#else
		Mcupanel_RegSet(0x0502, 0x018f);   //RAM Address (End Line Address)  
#endif
		
		Mcupanel_RegSet(0x0503, 0x0000);   //Partial Image 2: Display Position  RAM Address
		Mcupanel_RegSet(0x0504, 0x0000);   //RAM Address (Start Line Address) 
		Mcupanel_RegSet(0x0505, 0x0000);   //RAM Address (End Line Address)
		
		//Panel interface control===
		Mcupanel_RegSet(0x0010, 0x0011);   //Division Ratio,Clocks per Line  14  
		mdelay(10); 
		Mcupanel_RegSet(0x0011, 0x0202);   //Division Ratio,Clocks per Line
		Mcupanel_RegSet(0x0012, 0x0300);   //Sets low power VCOM drive period.   
		mdelay(10); 
		Mcupanel_RegSet(0x0020, 0x021e);   //Panel Interface Control 4  
		Mcupanel_RegSet(0x0021, 0x0202);   //Panel Interface Control 5 
		Mcupanel_RegSet(0x0022, 0x0100);   //Panel Interface Control 6 
		Mcupanel_RegSet(0x0090, 0x0000);   //Frame Marker Control  
		Mcupanel_RegSet(0x0092, 0x0000);   //MDDI Sub-display Control  
		
		//===Gamma setting===    
		Mcupanel_RegSet(0x0300, 0x0101);   //纬 Control
		Mcupanel_RegSet(0x0301, 0x0000);   //纬 Control
		Mcupanel_RegSet(0x0302, 0x0016);   //纬 Control
		Mcupanel_RegSet(0x0303, 0x2913);   //纬 Control
		Mcupanel_RegSet(0x0304, 0x260B);   //纬 Control
		Mcupanel_RegSet(0x0305, 0x0101);   //纬 Control
		Mcupanel_RegSet(0x0306, 0x1204);   //纬 Control
		Mcupanel_RegSet(0x0307, 0x0415);   //纬 Control
		Mcupanel_RegSet(0x0308, 0x0205);   //纬 Control
		Mcupanel_RegSet(0x0309, 0x0303);   //纬 Control
		Mcupanel_RegSet(0x030a, 0x0E05);   //纬 Control
		Mcupanel_RegSet(0x030b, 0x0D01);   //纬 Control
		Mcupanel_RegSet(0x030c, 0x010D);   //纬 Control
		Mcupanel_RegSet(0x030d, 0x050E);   //纬 Control
		Mcupanel_RegSet(0x030e, 0x0303);   //纬 Control
		Mcupanel_RegSet(0x030f, 0x0502);   //纬 Control
		
		//===Power on sequence===
		Mcupanel_RegSet(0x0007, 0x0001);   //Display Control 1
		Mcupanel_RegSet(0x0110, 0x0001);   //Power supply startup enable bit
		Mcupanel_RegSet(0x0112, 0x0060);   //Power Control 7
		Mcupanel_RegSet(0x0100, 0x16B0);   //Power Control 1 
		Mcupanel_RegSet(0x0101, 0x0115);   //Power Control 2
		Mcupanel_RegSet(0x0102, 0x0119);   //Starts VLOUT3,Sets the VREG1OUT.
		mdelay(50); 
		Mcupanel_RegSet(0x0103, 0x2E00);   //set the amplitude of VCOM
		mdelay(50);
		Mcupanel_RegSet(0x0282, 0x008E);//0x0093);   //VCOMH voltage
		Mcupanel_RegSet(0x0281, 0x000A);   //Selects the factor of VREG1OUT to generate VCOMH. 
		Mcupanel_RegSet(0x0102, 0x01BE);   //Starts VLOUT3,Sets the VREG1OUT.
		mdelay(10);
		
		//Address 
		Mcupanel_RegSet(0x0210, 0x0000);   //Window Horizontal RAM Address Start
		Mcupanel_RegSet(0x0211, 0x00ef);   //Window Horizontal RAM Address End
		Mcupanel_RegSet(0x0212, 0x0000);   //Window Vertical RAM Address Start
		Mcupanel_RegSet(0x0213, 0x018f);   //Window Vertical RAM Address End 
	
		Mcupanel_RegSet(0x0200, 0x0000);   //RAM Address Set (Horizontal Address)
#ifdef LCD_MODULE_G240400_REV
		Mcupanel_RegSet(0x0201, 0x0000);   //RAM Address Set (Vertical Address)
#else
		Mcupanel_RegSet(0x0201, 0x018f);   //RAM Address Set (Vertical Address)
#endif
		//===Display_On_Function===
		Mcupanel_RegSet(0x0007, 0x0021);   //Display Control 1 
		mdelay(50);   //40
		Mcupanel_RegSet(0x0007, 0x0061);   //Display Control 1 
		mdelay(50);   //100
		Mcupanel_RegSet(0x0007, 0x0173);   //Display Control 1 
		mdelay(50);   //300
	}
	Mcupanel_Command(0x0202);                  //Write Data to GRAM	  
	udelay(10);
	Mcupanel_SetAddr(0,0);
	udelay(100);
}
#endif

void __slcd_special_off(void)
{
//	Mcupanel_RegSet();
}

/*
 * Platform specific definition
 */

#define __slcd_dma_enable() (REG_SLCD_CTRL |= SLCD_CTRL_DMA_EN)
#if 0
#define __slcd_dma_disable() \
do {\
	while (REG_SLCD_STATE & SLCD_STATE_BUSY); 	\
	REG_SLCD_CTRL &= ~SLCD_CTRL_DMA_EN;		\
} while(0)
#endif
void __slcd_dma_disable(void)
{
	while (REG_SLCD_STATE & SLCD_STATE_BUSY);
	REG_SLCD_CTRL &= ~SLCD_CTRL_DMA_EN;
}

//#define GPIO_PWM    123		/* GP_D27 */	//backlight, GPD27
#define GPIO_PWM    121		/* GP_D28 */	//backlight, GPD27
//#define PWM_CHN 4    /* pwm channel */
#define PWM_CHN 2    /* pwm channel */
#define PWM_FULL 101
/* 100 level: 0,1,...,100 */


void __slcd_set_backlight_level(int n)
{
	//return;//为了串口有输
	//__gpio_as_pwm(4);
	if(n==0)
		{
				__gpio_as_output(GPIO_PWM);
				__gpio_clear_pin(GPIO_PWM);
					printf("\n\n\nslcd_set_backlight_level n==0 X %d\r\n\n",n);	
				return;
		}
	__gpio_as_pwm(2);
	printf("\n\n\nslcd_set_backlight_3level %d\r\n\n",n);	
        __tcu_disable_pwm_output(PWM_CHN);
        __tcu_stop_counter(PWM_CHN);
        __tcu_init_pwm_output_high(PWM_CHN);
        __tcu_set_pwm_output_shutdown_abrupt(PWM_CHN);
        __tcu_select_clk_div1(PWM_CHN);
        __tcu_mask_full_match_irq(PWM_CHN);
        __tcu_mask_half_match_irq(PWM_CHN);
        __tcu_set_count(PWM_CHN,0);
        __tcu_set_full_data(PWM_CHN,__cpm_get_extalclk()/1000);
        __tcu_set_half_data(PWM_CHN,__cpm_get_extalclk()/1000*n/100);
        __tcu_enable_pwm_output(PWM_CHN);
        __tcu_select_extalclk(PWM_CHN);
        __tcu_start_counter(PWM_CHN);
}
/*
#define __slcd_set_backlight_level(n)\
do { \

__gpio_as_output(32*3+27); \
__gpio_set_pin(32*3+27); \
} while (0)
*/


void __slcd_close_backlight()
{	//__gpio_as_output(GPIO_PWM);
	//__gpio_clear_pin(GPIO_PWM);
	__slcd_set_backlight_level(0);;
}

void __slcd_display_pin_init(void)
{
	__slcd_special_pin_init();
}

//debug here
#define __slcd_display_on() \
do { \
	/*__gpio_clear_pin(PIN_POWER_N); */\
	__slcd_special_on(); \
	__slcd_set_backlight_level(80); \
} while (0)

#define __slcd_display_off() \
do { \
	__slcd_special_off(); \
	__slcd_close_backlight(); \
	/*__gpio_set_pin(PIN_POWER_N);*/ \
} while (0)

void slcd_board_init(void)
{
	__slcd_display_pin_init();
	__slcd_display_on();
}

void lcd_close_backlight()
{
	__slcd_close_backlight();
}

void  lcd_set_backlight(int level)
{
	
	__slcd_set_backlight_level(level); 
}


#endif /* SPFD5420A */