📄 digital_clk.vhd
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity digital_clk is
port(clk:in std_logic;----------------------------------------------时钟信号
set12:in std_logic;----------------------------------------时间显示方式
clk_en:in std_logic;-------------------------------------------闹钟开关
mode :in std_logic;--------------------------------------------模式选择
inc:in std_logic;----------------------------------------------手动脉冲
am:out std_logic;----------------------------------------------上午下午
clk_out:out std_logic;-----------------------------------------闹钟显示
seg7:out std_logic_vector(7 downto 0);-------------------------显示信号
scan: out std_logic_vector(5 downto 0));-----------------------扫描信号
end;
architecture one of digital_clk is
signal state:integer range 0 to 5;-----------------------------------定义六种肿刺?
signal qhh,qhl,qmh,qml,qsh,qsl:std_logic_vector(3 downto 0);--小时‘分’秒的高位和低位
signal data:std_logic_vector(3 downto 0);-----------------------数码管编码激励信号
signal cnt:integer range 0 to 5;-------------------------------扫描数码管的计数器
signal clk1khz,clk1hz,clk2hz:std_logic;---------------------1KH、1HZ、2KZ分频信号
signal blink:std_logic_vector(2 downto 0);-------------------------------闪烁信号
signal clock:std_logic;-------------------------------------------------闹钟显示
signal s_dis,m_dis:integer range 0 to 59;
signal h_dis:integer range 0 to 23;
signal clock_h:integer range 0 to 23;----------------------------------闹钟小时
signal clock_m,clock_s:integer range 0 to 59;------------------------ --闹钟分
signal min,sec:integer range 0 to 59;------------------------------分,秒记数值
signal hour:integer range 0 to 23;-------------------------------------小时记数
signal h_clk,m_clk,s_clk,mclk_tmp,hclk_tmp: std_logic;
begin
process(clk)------------------------------------1KHZ分频 用于扫描数码管地址
variable count :integer range 0 to 9999;
begin
if clk'event and clk='1' then
if count =9999 then clk1khz<= not clk1khz;count:=0;
else count:=count+1;
end if;
end if;
end process;
process(clk1khz) ---------------------------------------------1HZ 用于计时
variable count:integer range 0 to 499;
begin
if clk1khz'event and clk1khz='1' then
if count =499 then clk1hz<= not clk1hz;count:=0;
else count:=count+1;
end if;
end if;
end process;
process(clk1khz)----------------------------------------------2HZ用于闪烁
variable count:integer range 0 to 249;
begin
if clk1khz'event and clk1khz='1' then
if count =249 then clk2hz<= not clk2hz;count:=0;
else count:=count+1;
end if;
end if;
end process;
process(mode)---------------------------------------------模式转换
begin
if mode'event and mode='1' then
if state=5 then state<=0;
else state<=state+1;end if;
end if;
end process;
process(s_clk)--------------------------------------------秒记数
begin
if s_clk'event and s_clk='1' then
if sec=59 then
sec<=0;
mclk_tmp<='1';
else
sec<=sec+1;
mclk_tmp<='0';
end if;
end if;
end process;
process(m_clk)-------------------------------------------分记数
begin
if m_clk'event and m_clk='1' then
if min=59 then
min<=0;
hclk_tmp<='1';
else
min<=min+1;
hclk_tmp<='0';
end if;
end if;
end process;
process(h_clk)--------------------------------------------小时记数
begin
if h_clk'event and h_clk='1' then
if hour=23 then
hour<=0;
else
hour<=hour+1;
end if;
end if;
end process;
process(inc,state,clk_en)
begin
if state=0 then
s_dis<=sec;
m_dis<=min;
h_dis<=hour;
s_clk<=clk1hz;
m_clk<=mclk_tmp;
h_clk<=hclk_tmp;
if clk_en='0' then
if min=clock_m and hour=clock_h then
clock<=clk2hz;
else
clock<='0';
end if;
end if;
elsif state=1 then
s_dis<=sec;
m_dis<=min;
h_dis<=hour;
s_clk<=clk1hz;
m_clk<=mclk_tmp;
h_clk<=inc;
elsif state=2 then
s_dis<=sec;
m_dis<=min;
h_dis<=hour;
s_clk<=clk1hz;
m_clk<=inc;
h_clk<=hclk_tmp;
elsif state=3 then
s_dis<=sec;
m_dis<=min;
h_dis<=hour;
s_clk<=inc;
m_clk<=mclk_tmp;
h_clk<=hclk_tmp;
elsif state=4 then
s_dis<=0;
m_dis<=clock_m;
h_dis<=clock_h;
s_clk<=clk1hz;
m_clk<=mclk_tmp;
h_clk<=hclk_tmp;
if inc'event and inc='1' then
if clock_m= 59 then
clock_m<=0;
else
clock_m<=clock_m+1;
end if;
end if;
elsif state=5 then
s_dis<=0;
m_dis<=clock_m;
h_dis<=clock_h;
s_clk<=clk1hz;
m_clk<=mclk_tmp;
h_clk<=hclk_tmp;
if inc'event and inc='1' then
if clock_h=23 then
clock_h<=0;
else
clock_h<=clock_h+1;
end if;
end if;
end if;
end process;
------------------------------设定时间时,令数码管闪烁--------------------------
process(state,clk2hz)
begin
case state is
when 0=> blink<="011";
when 1=> blink<=(0=>clk2hz,others=>'1');
when 2=> blink<=(1=>clk2hz,others=>'1');
when 3=> blink<=(2=>clk2hz,others=>'1');
when 4=> blink<=(1=>clk2hz,others=>'1');
when 5=> blink<=(0=>clk2hz,others=>'1');
when others=>null;
end case;
end process;
--------------------------------秒的十进制转BCD-----------------------------------
process(s_dis)
begin
case s_dis is
when 0|10|20|30|40|50 =>qsl<="0000";
when 1|11|21|31|41|51 =>qsl<="0001";
when 2|12|22|32|42|52 =>qsl<="0010";
when 3|13|23|33|43|53 =>qsl<="0011";
when 4|14|24|34|44|54 =>qsl<="0100";
when 5|15|25|35|45|55 =>qsl<="0101";
when 6|16|26|36|46|56 =>qsl<="0110";
when 7|17|27|37|47|57 =>qsl<="0111";
when 8|18|28|38|48|58 =>qsl<="1000";
when 9|19|29|39|49|59 =>qsl<="1001";
when others =>null;
end case;
case s_dis is
when 0|1|2|3|4|5|6|7|8|9 =>qsh<="0000";
when 10|11|12|13|14|15|16|17|18|19 =>qsh<="0001";
when 20|21|22|23|24|25|26|27|28|29 =>qsh<="0010";
when 30|31|32|33|34|35|36|37|38|39 =>qsh<="0011";
when 40|41|42|43|44|45|46|47|48|49 =>qsh<="0100";
when 50|51|52|53|54|55|56|57|58|59 =>qsh<="0101";
when others=>null;
end case;
end process;
-------------------------------分的十进制转BCD-----------------------------------
process(m_dis)
begin
case m_dis is
when 0|10|20|30|40|50 =>qml<="0000";
when 1|11|21|31|41|51 =>qml<="0001";
when 2|12|22|32|42|52 =>qml<="0010";
when 3|13|23|33|43|53 =>qml<="0011";
when 4|14|24|34|44|54 =>qml<="0100";
when 5|15|25|35|45|55 =>qml<="0101";
when 6|16|26|36|46|56 =>qml<="0110";
when 7|17|27|37|47|57 =>qml<="0111";
when 8|18|28|38|48|58 =>qml<="1000";
when 9|19|29|39|49|59 =>qml<="1001";
when others =>null;
end case;
case m_dis is
when 0|1|2|3|4|5|6|7|8|9 =>qmh<="0000";
when 10|11|12|13|14|15|16|17|18|19 =>qmh<="0001";
when 20|21|22|23|24|25|26|27|28|29 =>qmh<="0010";
when 30|31|32|33|34|35|36|37|38|39 =>qmh<="0011";
when 40|41|42|43|44|45|46|47|48|49 =>qmh<="0100";
when 50|51|52|53|54|55|56|57|58|59 =>qmh<="0101";
when others=>null;
end case;
end process;
------------------------------小时的十进制转换BCD---------------------------------
process(h_dis,set12)
variable htemp:integer range 0 to 23;
begin
htemp:=h_dis;
if set12='1' then
if htemp>12 then
htemp:=htemp mod 12;
am<='0';
else
am<='1';
end if;
else
am<='0';
end if;
case htemp is
when 0|10|20 =>qhl<="0000";
when 1|11|21 =>qhl<="0001";
when 2|12|22 =>qhl<="0010";
when 3|13|23 =>qhl<="0011";
when 4|14=>qhl<="0100";
when 5|15=>qhl<="0101";
when 6|16=>qhl<="0110";
when 7|17=>qhl<="0111";
when 8|18=>qhl<="1000";
when 9|19=>qhl<="1001";
when others=>null;
end case;
case htemp is
when 0|1|2|3|4|5|6|7|8|9 =>qhh<="0000";
when 10|11|12|13|14|15|16|17|18|19 =>qhh<="0001";
when 20|21|22|23=>qhh<="0010";
when others =>null;
end case;
end process;
----------------------------数码管动态扫描计数-----------------------------------
process(clk1khz)
begin
if clk1khz'event and clk1khz='1' then
if cnt =5 then cnt<=0;
else cnt<=cnt+1;
end if;
end if;
end process;
------------------------------数码管动态扫描-------------------------------------
process(cnt,qhh,qhl,qmh,qml,qsh,qsl,blink)
begin
case cnt is
when 0 =>data<=qsl ; scan<="000001";
when 1 =>data<=qsh ; scan<="000010";
when 2 =>data<=qml ; scan<="000100";
when 3 =>data<=qmh ; scan<="001000";
when 4 =>data<=qhl ; scan<="010000";
when 5 =>data<=qhh ; scan<="100000";
when others=>null;
end case;
end process;
------------------------------数码管显示编码--------------------------------------
process(data,cnt)
begin
case data is
when "0000"=> case cnt is
when 0 =>seg7<="1111110"&blink(2);
when 2 =>seg7<="1111110"&blink(1);
when 4 =>seg7<="1111110"&blink(0);
when 1|3|5=>seg7<="11111100";
end case;
when "0001"=> case cnt is
when 0 =>seg7<="0110000"&blink(2);
when 2 =>seg7<="0110000"&blink(1);
when 4 =>seg7<="0110000"&blink(0);
when 1|3|5=>seg7<="01100000";
end case;
when "0010"=>case cnt is
when 0 =>seg7<="1101101"&blink(2);
when 2 =>seg7<="1101101"&blink(1);
when 4 =>seg7<="1101101"&blink(0);
when 1|3|5=>seg7<="11011010";
end case;
when "0011"=> case cnt is
when 0 =>seg7<="1111001"&blink(2);
when 2 =>seg7<="1111001"&blink(1);
when 4 =>seg7<="1111001"&blink(0);
when 1|3|5=>seg7<="11110010";
end case;
when "0100"=>
case cnt is
when 0 =>seg7<="0110011"&blink(2);
when 2 =>seg7<="0110011"&blink(1);
when 4 =>seg7<="0110011"&blink(0);
when 1|3|5=>seg7<="01100110";
end case;
when "0101"=>
case cnt is
when 0 =>seg7<="1011011"&blink(2);
when 2 =>seg7<="1011011"&blink(1);
when 4 =>seg7<="1011011"&blink(0);
when 1|3|5=>seg7<="10110110";
end case;
when "0110"=>
case cnt is
when 0 =>seg7<="1011111"&blink(2);
when 2 =>seg7<="1011111"&blink(1);
when 4 =>seg7<="1011111"&blink(0);
when 1|3|5=>seg7<="10111110";
end case;
when "0111"=>
case cnt is
when 0 =>seg7<="1110000"&blink(2);
when 2 =>seg7<="1110000"&blink(1);
when 4 =>seg7<="1110000"&blink(0);
when 1|3|5=>seg7<="11100000";
end case;
when "1000"=>
case cnt is
when 0 =>seg7<="1111111"&blink(2);
when 2|4 =>seg7<="1111111"&blink(1);
when 1|3|5=>seg7<="11111110";
end case;
when "1001"=>
case cnt is
when 0 =>seg7<="1111011"&blink(2);
when 2|4 =>seg7<="1111011"&blink(1);
when 1|3|5=>seg7<="11110110";
end case;
when others=>null;
end case;
end process;
clk_out<=clock;
end ;
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