digital_clk.map.qmsg

此程序是实现数字钟的

{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(339) " "Warning: VHDL Process Statement warning at digital_clk.vhd(339): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 339 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(340) " "Warning: VHDL Process Statement warning at digital_clk.vhd(340): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 340 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(341) " "Warning: VHDL Process Statement warning at digital_clk.vhd(341): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 341 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(346) " "Warning: VHDL Process Statement warning at digital_clk.vhd(346): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 346 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(347) " "Warning: VHDL Process Statement warning at digital_clk.vhd(347): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 347 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(348) " "Warning: VHDL Process Statement warning at digital_clk.vhd(348): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 348 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(353) " "Warning: VHDL Process Statement warning at digital_clk.vhd(353): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 353 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(354) " "Warning: VHDL Process Statement warning at digital_clk.vhd(354): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 354 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(355) " "Warning: VHDL Process Statement warning at digital_clk.vhd(355): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 355 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(360) " "Warning: VHDL Process Statement warning at digital_clk.vhd(360): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 360 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(361) " "Warning: VHDL Process Statement warning at digital_clk.vhd(361): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 361 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(362) " "Warning: VHDL Process Statement warning at digital_clk.vhd(362): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 362 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(367) " "Warning: VHDL Process Statement warning at digital_clk.vhd(367): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 367 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(368) " "Warning: VHDL Process Statement warning at digital_clk.vhd(368): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 368 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(373) " "Warning: VHDL Process Statement warning at digital_clk.vhd(373): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 373 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "blink digital_clk.vhd(374) " "Warning: VHDL Process Statement warning at digital_clk.vhd(374): signal blink is in statement, but is not in sensitivity list" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 374 0 0 } }  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "8 " "Info: Inferred 8 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "hour\[0\]~1 5 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=5) from the following logic: hour\[0\]~1" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "hour\[0\]~1" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 99 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "clock_h\[0\]~5 5 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=5) from the following logic: clock_h\[0\]~5" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "clock_h\[0\]~5" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 166 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "min\[0\]~1 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: min\[0\]~1" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "min\[0\]~1" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 86 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "clock_m\[0\]~6 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: clock_m\[0\]~6" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "clock_m\[0\]~6" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 152 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "count\[0\]~4 8 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: count\[0\]~4" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "count\[0\]~4" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 36 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "i75~0 14 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=14) from the following logic: i75~0" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "i75~0" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 36 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "sec\[0\]~1 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: sec\[0\]~1" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "sec\[0\]~1" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 73 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "i109~0 9 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=9) from the following logic: i109~0" {  } { { "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" "" "i109~0" { Text "C:/Documents and Settings/user/桌面/digital_clk/digital_clk.vhd" 46 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "c:/quartus/libraries/megafunctions/lpm_counter.tdf" "lpm_counter" "" { Text "c:/quartus/libraries/megafunctions/lpm_counter.tdf" 221 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/alt_counter_f10ke.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/alt_counter_f10ke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_f10ke " "Info: Found entity 1: alt_counter_f10ke" {  } { { "c:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" "alt_counter_f10ke" "" { Text "c:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" 256 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/lpm_divide.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/lpm_divide.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide " "Info: Found entity 1: lpm_divide" {  } { { "c:/quartus/libraries/megafunctions/lpm_divide.tdf" "lpm_divide" "" { Text "c:/quartus/libraries/megafunctions/lpm_divide.tdf" 118 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/sign_div_unsign.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/sign_div_unsign.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 sign_div_unsign " "Info: Found entity 1: sign_div_unsign" {  } { { "c:/quartus/libraries/megafunctions/sign_div_unsign.tdf" "sign_div_unsign" "" { Text "c:/quartus/libraries/megafunctions/sign_div_unsign.tdf" 85 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/alt_u_div.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/alt_u_div.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div " "Info: Found entity 1: alt_u_div" {  } { { "c:/quartus/libraries/megafunctions/alt_u_div.tdf" "alt_u_div" "" { Text "c:/quartus/libraries/megafunctions/alt_u_div.tdf" 93 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "c:/quartus/libraries/megafunctions/lpm_add_sub.tdf" "lpm_add_sub" "" { Text "c:/quartus/libraries/megafunctions/lpm_add_sub.tdf" 103 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "c:/quartus/libraries/megafunctions/addcore.tdf" "addcore" "" { Text "c:/quartus/libraries/megafunctions/addcore.tdf" 73 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "c:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "a_csnbuffer" "" { Text "c:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../quartus/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file ../../../../quartus/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "c:/quartus/libraries/megafunctions/altshift.tdf" "altshift" "" { Text "c:/quartus/libraries/megafunctions/altshift.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_IGNORED_SUMMARY" "2 " "Info: Ignored 2 buffer(s)" { { "Info" "IOPT_MLS_IGNORED_SOFT" "2 " "Info: Ignored 2 SOFT buffer(s)" {  } {  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "258 " "Info: Implemented 258 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "5 " "Info: Implemented 5 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "16 " "Info: Implemented 16 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "237 " "Info: Implemented 237 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 64 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 64 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Dec 25 14:27:17 2008 " "Info: Processing ended: Thu Dec 25 14:27:17 2008" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0}  } {  } 0}