digital_clk.map.eqn

此程序是实现数字钟的

--operation mode is normal

clk1khz_lut_out = !clk1khz;
clk1khz = DFFEA(clk1khz_lut_out, clk, , , A1L8, , );


--A1L211 is i~22
--operation mode is normal

A1L211 = !state[1] & state[2] & state[0];


--D1L21 is lpm_counter:clock_h_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[4]~38
--operation mode is normal

D1L21 = D1_q[3] # !D1_q[0] # !D1_q[1] # !D1_q[2];


--D1L11 is lpm_counter:clock_h_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[4]~1
--operation mode is normal

D1L11 = D1L21 # !D1_q[4] # !A1L211;


--A1L041 is i~3847
--operation mode is normal

A1L041 = !D4_q[2] # !D4_q[1];


--A1L801 is i~11
--operation mode is normal

A1L801 = D4_q[3] # A1L041 # !D4_q[4] # !D4_q[0];


--A1L111 is i~19
--operation mode is normal

A1L111 = !state[1] & !state[0] & state[2];


--D2L31 is lpm_counter:clock_m_rtl_3|alt_counter_f10ke:wysi_counter|counter_cell[5]~53
--operation mode is normal

D2L31 = D2_q[2] # !D2_q[0] # !D2_q[5] # !D2_q[3];


--D2L41 is lpm_counter:clock_m_rtl_3|alt_counter_f10ke:wysi_counter|counter_cell[5]~54
--operation mode is normal

D2L41 = D2L31 # !D2_q[1] # !D2_q[4] # !A1L111;


--A1L141 is i~3848
--operation mode is normal

A1L141 = D7_q[2] # !D7_q[5] # !D7_q[3] # !D7_q[4];


--A1L701 is i~9
--operation mode is normal

A1L701 = A1L141 # !D7_q[1] # !D7_q[0];


--A1L06 is i419~141
--operation mode is normal

A1L06 = state[2] & (state[1] & A1L95 # !state[1] & D2_q[0]);


--A1L95 is i419~1
--operation mode is normal

A1L95 = A1L06 # D7_q[0] & !state[2];


--A1L04 is i382~1
--operation mode is normal

A1L04 = state[2] & A1L04 & state[1] # !state[2] & D8_q[1];


--A1L83 is i381~1
--operation mode is normal

A1L83 = state[2] & A1L83 & state[1] # !state[2] & D8_q[2];


--A1L63 is i380~1
--operation mode is normal

A1L63 = state[2] & A1L63 & state[1] # !state[2] & D8_q[3];


--A1L43 is i379~1
--operation mode is normal

A1L43 = state[2] & A1L43 & state[1] # !state[2] & D8_q[4];


--A1L23 is i378~1
--operation mode is normal

A1L23 = state[2] & A1L23 & state[1] # !state[2] & D8_q[5];


--A1L24 is i383~1
--operation mode is normal

A1L24 = state[2] & A1L24 & state[1] # !state[2] & D8_q[0];


--A1L75 is i418~141
--operation mode is normal

A1L75 = state[2] & (state[1] & A1L65 # !state[1] & D2_q[1]);


--A1L65 is i418~1
--operation mode is normal

A1L65 = A1L75 # D7_q[1] & !state[2];


--A1L45 is i417~141
--operation mode is normal

A1L45 = state[2] & (state[1] & A1L35 # !state[1] & D2_q[2]);


--A1L35 is i417~1
--operation mode is normal

A1L35 = A1L45 # D7_q[2] & !state[2];


--A1L15 is i416~148
--operation mode is normal

A1L15 = state[2] & (state[1] & A1L05 # !state[1] & D2_q[3]);


--A1L05 is i416~1
--operation mode is normal

A1L05 = A1L15 # D7_q[3] & !state[2];


--A1L84 is i415~145
--operation mode is normal

A1L84 = state[2] & (state[1] & A1L74 # !state[1] & D2_q[4]);


--A1L74 is i415~1
--operation mode is normal

A1L74 = A1L84 # D7_q[4] & !state[2];


--A1L54 is i414~148
--operation mode is normal

A1L54 = state[2] & (state[1] & A1L44 # !state[1] & D2_q[5]);


--A1L44 is i414~1
--operation mode is normal

A1L44 = A1L54 # D7_q[5] & !state[2];


--A1L241 is i~3853
--operation mode is normal

A1L241 = D5_q[5] # D5_q[4] # !D5_q[2] # !D5_q[3];


--A1L341 is i~3855
--operation mode is normal

A1L341 = A1L241 # !D5_q[0] # !D5_q[1] # !A1L951;


--mclk_tmp is mclk_tmp
--operation mode is normal

mclk_tmp_lut_out = !A1L441 & D8_q[5] & D8_q[0];
mclk_tmp = DFFEA(mclk_tmp_lut_out, A1L77, , , , , );


--A1L18 is i461~208
--operation mode is normal

A1L18 = state[2] & A1L08 # !state[2] & inc & !state[0];


--A1L28 is i461~209
--operation mode is normal

A1L28 = state[0] & !state[2];


--A1L08 is i461~1
--operation mode is normal

A1L08 = mclk_tmp & (A1L18 # A1L28 # !state[1]) # !mclk_tmp & A1L18 & state[1];


--A1L39 is i468~155
--operation mode is normal

A1L39 = D4_q[1] & D1_q[1] & (D2_q[5] $ !D7_q[5]) # !D4_q[1] & !D1_q[1] & (D2_q[5] $ !D7_q[5]);


--A1L69 is i468~160
--operation mode is normal

A1L69 = (D2_q[3] & D7_q[3] & (D2_q[2] $ !D7_q[2]) # !D2_q[3] & !D7_q[3] & (D2_q[2] $ !D7_q[2])) & CASCADE(A1L39);


--A1L49 is i468~157
--operation mode is normal

A1L49 = D4_q[0] & D1_q[0] & (D2_q[1] $ !D7_q[1]) # !D4_q[0] & !D1_q[0] & (D2_q[1] $ !D7_q[1]);


--clk2hz is clk2hz
--operation mode is normal

clk2hz_lut_out = !clk2hz;
clk2hz = DFFEA(clk2hz_lut_out, clk1khz, , , A1L061, , );


--A1L59 is i468~158
--operation mode is normal

A1L59 = A1L49 & clk2hz & (D4_q[2] $ !D1_q[2]);


--A1L79 is i468~161
--operation mode is normal

A1L79 = (D2_q[0] & D7_q[0] & (D4_q[4] $ !D1_q[4]) # !D2_q[0] & !D7_q[0] & (D4_q[4] $ !D1_q[4])) & CASCADE(A1L59);


--A1L441 is i~3856
--operation mode is normal

A1L441 = D8_q[2] # !D8_q[3] # !D8_q[1] # !D8_q[4];


--A1L601 is i~7
--operation mode is normal

A1L601 = A1L441 # !D8_q[0] # !D8_q[5];


--G1L3 is lpm_divide:i_rtl_8|sign_div_unsign:divider|alt_u_div:divider|StageOut[3][3]~104
--operation mode is normal

G1L3 = K41L8 & K41_cs_buffer[3];


--G1L4 is lpm_divide:i_rtl_8|sign_div_unsign:divider|alt_u_div:divider|StageOut[3][3]~105
--operation mode is normal

G1L4 = A1L26 & !K41L8;


--A1L291 is qsl[3]~15
--operation mode is normal

A1L291 = A1L04 & A1L83 & !A1L63 & A1L23 # !A1L04 & !A1L83 & A1L63 & !A1L23;


--A1L391 is qsl[3]~17
--operation mode is normal

A1L391 = A1L04 & !A1L83 & (A1L63 $ !A1L23) # !A1L04 & (A1L83 & A1L63 & !A1L23 # !A1L83 & !A1L63 & A1L23);


--A1L92 is data[3]~1155
--operation mode is normal

A1L92 = cnt[1] # A1L43 & !A1L391 # !A1L43 & !A1L291;


--A1L971 is qml[3]~15
--operation mode is normal

A1L971 = A1L65 & A1L35 & !A1L05 & A1L44 # !A1L65 & !A1L35 & A1L05 & !A1L44;


--A1L081 is qml[3]~17
--operation mode is normal

A1L081 = A1L65 & !A1L35 & (A1L05 $ !A1L44) # !A1L65 & (A1L35 & A1L05 & !A1L44 # !A1L35 & !A1L05 & A1L44);


--A1L03 is data[3]~1157
--operation mode is normal

A1L03 = (A1L74 & !A1L081 # !A1L74 & !A1L971 # !cnt[1]) & CASCADE(A1L92);


--A1L541 is i~3857
--operation mode is normal

A1L541 = A1L82 # A1L91 & A1L72 # !A1L32;


--A1L751 is i~3879
--operation mode is normal

A1L751 = (A1L82 & A1L751 & (A1L32 # A1L72) # !A1L82 & (A1L32 # !A1L72)) & CASCADE(A1L541);


--A1L641 is i~3859
--operation mode is normal

A1L641 = state[1] # clk2hz # !state[0];


--A1L3 is blink[2]~124
--operation mode is normal

A1L3 = state[2] # state[1] & (clk2hz # !state[0]) # !state[1] & state[0];


--A1L741 is i~3860
--operation mode is normal

A1L741 = A1L641 & (A1L3 # cnt[2]) # !A1L641 & A1L3 & !cnt[2];


--A1L2 is blink[1]~125
--operation mode is normal

A1L2 = state[0] # clk2hz & (!state[1] # !state[2]) # !clk2hz & !state[2] & !state[1];


--A1L841 is i~3861
--operation mode is normal

A1L841 = cnt[1] & A1L2 & !cnt[2] # !cnt[1] & A1L741;


--A1L941 is i~3862
--operation mode is normal

A1L941 = A1L841 & !cnt[0] & !A1L82;


--A1L051 is i~3863
--operation mode is normal

A1L051 = !A1L941 & (A1L131 # A1L851 # !A1L82);


--A1L151 is i~3864
--operation mode is normal

A1L151 = cnt[2] & A1L2 & !cnt[1] # !cnt[2] & (cnt[1] & A1L2 # !cnt[1] & A1L3);


--A1L851 is i~3880
--operation mode is normal

A1L851 = (cnt[0] # !A1L151 # !A1L131 # !A1L82) & CASCADE(A1L051);


--clk1hz is clk1hz
--operation mode is normal

clk1hz_lut_out = !clk1hz;
clk1hz = DFFEA(clk1hz_lut_out, clk1khz, , , A1L6, , );


--A1L87 is i455~225
--operation mode is normal

A1L87 = state[2] & A1L77 # !state[2] & inc & state[0];


--A1L48 is i461~211
--operation mode is normal

A1L48 = !state[2] & !state[0];


--A1L77 is i455~1
--operation mode is normal

A1L77 = clk1hz & (A1L87 # A1L48 # !state[1]) # !clk1hz & A1L87 & state[1];


--A1L251 is i~3868
--operation mode is normal

A1L251 = D5_q[9] & D5_q[8] & !D5_q[7] & !D5_q[6];


--A1L951 is i~3881
--operation mode is normal

A1L951 = (D5_q[13] & D5_q[10] & !D5_q[12] & !D5_q[11]) & CASCADE(A1L251);


--A1L011 is i~16
--operation mode is normal

A1L011 = state[1] # state[2] # !state[0];


--A1L58 is i467~265
--operation mode is normal

A1L58 = !A1L78 & (state[2] & state[1] # !state[2] & !state[1] & !state[0]);


--A1L68 is i467~266
--operation mode is normal

A1L68 = !A1L58 & (A1L011 # !inc) # !A1L901;


--hclk_tmp is hclk_tmp
--operation mode is normal

hclk_tmp_lut_out = !A1L141 & D7_q[0] & D7_q[1];
hclk_tmp = DFFEA(hclk_tmp_lut_out, A1L08, , , , , );


--A1L78 is i467~268
--operation mode is normal

A1L78 = (state[2] & state[1] # !state[2] & !state[1] & state[0] # !hclk_tmp) & CASCADE(A1L68);


--A1L351 is i~3872
--operation mode is normal

A1L351 = !D6_q[5] # !D6_q[6] # !D6_q[7] # !D6_q[8];


--A1L451 is i~3873
--operation mode is normal

A1L451 = D6_q[3] # D6_q[2] # !D6_q[1] # !D6_q[4];


--A1L551 is i~3874
--operation mode is normal

A1L551 = A1L351 # A1L451 # !D6_q[0];


--A1L651 is i~3875
--operation mode is normal

A1L651 = D3_q[3] & D3_q[0] & !D3_q[2] & !D3_q[1];


--A1L061 is i~3882
--operation mode is normal

A1L061 = (D3_q[7] & D3_q[6] & D3_q[5] & D3_q[4]) & CASCADE(A1L651);


--A1L8 is clk1khz~1
--operation mode is normal

A1L8 = !A1L341;


--A1L6 is clk1hz~1
--operation mode is normal

A1L6 = !A1L551;


--K71L01 is lpm_divide:i_rtl_8|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~70
--operation mode is normal

K71L01 = K71_cout[4];


--K41L8 is lpm_divide:i_rtl_8|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00009|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~20
--operation mode is arithmetic

K41L8 = K41_cout[3];

--K41L7 is lpm_divide:i_rtl_8|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00009|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~19
--operation mode is arithmetic

K41L7 = CARRY(K41_cout[3]);


--set12 is set12
--operation mode is input

set12 = INPUT();


--clk_en is clk_en
--operation mode is input

clk_en = INPUT();


--mode is mode
--operation mode is input

mode = INPUT();


--inc is inc
--operation mode is input

inc = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--am is am
--operation mode is output

am = OUTPUT(!A1L401);


--clk_out is clk_out
--operation mode is output

clk_out = OUTPUT(A1L88);


--seg7[7] is seg7[7]
--operation mode is output

seg7[7] = OUTPUT(A1L811);


--seg7[6] is seg7[6]
--operation mode is output

seg7[6] = OUTPUT(A1L911);


--seg7[5] is seg7[5]
--operation mode is output

seg7[5] = OUTPUT(A1L021);


--seg7[4] is seg7[4]
--operation mode is output

seg7[4] = OUTPUT(A1L121);


--seg7[3] is seg7[3]
--operation mode is output

seg7[3] = OUTPUT(A1L221);


--seg7[2] is seg7[2]
--operation mode is output

seg7[2] = OUTPUT(A1L321);


--seg7[1] is seg7[1]
--operation mode is output

seg7[1] = OUTPUT(!A1L751);


--seg7[0] is seg7[0]
--operation mode is output

seg7[0] = OUTPUT(!A1L851);


--scan[5] is scan[5]
--operation mode is output

scan[5] = OUTPUT(A1L311);


--scan[4] is scan[4]
--operation mode is output

scan[4] = OUTPUT(A1L411);


--scan[3] is scan[3]
--operation mode is output

scan[3] = OUTPUT(A1L511);


--scan[2] is scan[2]
--operation mode is output

scan[2] = OUTPUT(A1L611);


--scan[1] is scan[1]
--operation mode is output

scan[1] = OUTPUT(A1L521);


--scan[0] is scan[0]
--operation mode is output

scan[0] = OUTPUT(A1L711);


--A1L161 is i~3887
--operation mode is normal

A1L161 = !A1L061;