📄 csl_legacyhal.h
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#define HCHIP_FADCR_L1UNDER_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L1UNDER,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1RMODE
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L1RMODE_MASK (0x00000600)
#define HCHIP_FADCR_L1RMODE_SHIFT (0x00000009)
#define HCHIP_FADCR_L1RMODE_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L1RMODE)
#define HCHIP_FADCR_L1RMODE_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L1RMODE,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2NAN1
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2NAN1_MASK (0x00010000)
#define HCHIP_FADCR_L2NAN1_SHIFT (0x00000010)
#define HCHIP_FADCR_L2NAN1_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2NAN1)
#define HCHIP_FADCR_L2NAN1_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2NAN1,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2NAN2
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2NAN2_MASK (0x00020000)
#define HCHIP_FADCR_L2NAN2_SHIFT (0x00000011)
#define HCHIP_FADCR_L2NAN2_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2NAN2)
#define HCHIP_FADCR_L2NAN2_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2NAN2,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2DEN1
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2DEN1_MASK (0x00040000)
#define HCHIP_FADCR_L2DEN1_SHIFT (0x00000012)
#define HCHIP_FADCR_L2DEN1_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2DEN1)
#define HCHIP_FADCR_L2DEN1_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2DEN1,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2DEN2
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2DEN2_MASK (0x00080000)
#define HCHIP_FADCR_L2DEN2_SHIFT (0x00000013)
#define HCHIP_FADCR_L2DEN2_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2DEN2)
#define HCHIP_FADCR_L2DEN2_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2DEN2,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2INVAL
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2INVAL_MASK (0x00100000)
#define HCHIP_FADCR_L2INVAL_SHIFT (0x00000014)
#define HCHIP_FADCR_L2INVAL_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2INVAL)
#define HCHIP_FADCR_L2INVAL_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2INVAL,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2INFO
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2INFO_MASK (0x00200000)
#define HCHIP_FADCR_L2INFO_SHIFT (0x00000015)
#define HCHIP_FADCR_L2INFO_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2INFO)
#define HCHIP_FADCR_L2INFO_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2INFO,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2OVER
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2OVER_MASK (0x00400000)
#define HCHIP_FADCR_L2OVER_SHIFT (0x00000016)
#define HCHIP_FADCR_L2OVER_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2OVER)
#define HCHIP_FADCR_L2OVER_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2OVER,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2INEX
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2INEX_MASK (0x00800000)
#define HCHIP_FADCR_L2INEX_SHIFT (0x00000017)
#define HCHIP_FADCR_L2INEX_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2INEX)
#define HCHIP_FADCR_L2INEX_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2INEX,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2UNDER
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2UNDER_MASK (0x01000000)
#define HCHIP_FADCR_L2UNDER_SHIFT (0x00000018)
#define HCHIP_FADCR_L2UNDER_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2UNDER)
#define HCHIP_FADCR_L2UNDER_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2UNDER,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L2RMODE
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_L2RMODE_MASK (0x06000000)
#define HCHIP_FADCR_L2RMODE_SHIFT (0x00000019)
#define HCHIP_FADCR_L2RMODE_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FADCR_L2RMODE)
#define HCHIP_FADCR_L2RMODE_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FADCR_L2RMODE,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR
\*----------------------------------------------------------------------------*/
#define HCHIP_FADCR_GET(CrReg) HCRREG32_GET(CrReg)
#define HCHIP_FADCR_SET(CrReg,Val) HCRREG32_SET(CrReg,Val)
#define HCHIP_FADCR_CFG(CrReg,l1nan1,l1nan2,l1den1,l1den2,l1inval,l1info,\
l1over,l1inex,l1under,l1rmode,l2nan1,l2nan2,l2den1,l2den2,l2inval,l2info,\
l2over,l2inex,l2under,l2rmode) CrReg=(UINT32)( \
HCRFIELD_SHIFT(HCHIP_FADCR_L1NAN1, l1nan1) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L1NAN2, l1nan2) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L1DEN1, l1den1) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L1DEN2, l1den2) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L1INVAL,l1inval)|\
HCRFIELD_SHIFT(HCHIP_FADCR_L1INFO, l1info) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L1OVER, l1over) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L1INEX, l1inex) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L1UNDER,l1under)|\
HCRFIELD_SHIFT(HCHIP_FADCR_L1RMODE,l1rmode)|\
HCRFIELD_SHIFT(HCHIP_FADCR_L2NAN1, l2nan1) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L2NAN2, l2nan2) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L2DEN1, l2den1) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L2DEN2, l2den2) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L2INVAL,l2inval)|\
HCRFIELD_SHIFT(HCHIP_FADCR_L2INFO, l2info) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L2OVER, l2over) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L2INEX, l2inex) |\
HCRFIELD_SHIFT(HCHIP_FADCR_L2UNDER,l2under)|\
HCRFIELD_SHIFT(HCHIP_FADCR_L2RMODE,l2rmode) \
)
#endif /* FPU_SUPPORT */
#if (FPU_SUPPORT)
/******************************************************************************\
* HCHIP_FAUCR - floating-point auxiliary config register (1)
*
* (1) only supported on devices with floating point unit
*
* Fields:
* (RW) HCHIP_FAUCR_S1NAN1
* (RW) HCHIP_FAUCR_S1NAN2
* (RW) HCHIP_FAUCR_S1DEN1
* (RW) HCHIP_FAUCR_S1DEN2
* (RW) HCHIP_FAUCR_S1INVAL
* (RW) HCHIP_FAUCR_S1INFO
* (RW) HCHIP_FAUCR_S1OVER
* (RW) HCHIP_FAUCR_S1INEX
* (RW) HCHIP_FAUCR_S1UNDER
* (RW) HCHIP_FAUCR_S1UNORD
* (RW) HCHIP_FAUCR_S1DIV0
* (RW) HCHIP_FAUCR_S2NAN1
* (RW) HCHIP_FAUCR_S2NAN2
* (RW) HCHIP_FAUCR_S2DEN1
* (RW) HCHIP_FAUCR_S2DEN2
* (RW) HCHIP_FAUCR_S2INVAL
* (RW) HCHIP_FAUCR_S2INFO
* (RW) HCHIP_FAUCR_S2OVER
* (RW) HCHIP_FAUCR_S2INEX
* (RW) HCHIP_FAUCR_S2UNDER
* (RW) HCHIP_FAUCR_S2UNORD
* (RW) HCHIP_FAUCR_S2DIV0
*
\******************************************************************************/
extern far cregister volatile unsigned int FAUCR;
#define HCHIP_FAUCR FAUCR
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1NAN1
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1NAN1_MASK (0x00000001)
#define HCHIP_FAUCR_S1NAN1_SHIFT (0x00000000)
#define HCHIP_FAUCR_S1NAN1_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1NAN1)
#define HCHIP_FAUCR_S1NAN1_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1NAN1,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1NAN2
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1NAN2_MASK (0x00000002)
#define HCHIP_FAUCR_S1NAN2_SHIFT (0x00000001)
#define HCHIP_FAUCR_S1NAN2_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1NAN2)
#define HCHIP_FAUCR_S1NAN2_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1NAN2,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1DEN1
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1DEN1_MASK (0x00000004)
#define HCHIP_FAUCR_S1DEN1_SHIFT (0x00000002)
#define HCHIP_FAUCR_S1DEN1_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1DEN1)
#define HCHIP_FAUCR_S1DEN1_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1DEN1,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1DEN2
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1DEN2_MASK (0x00000008)
#define HCHIP_FAUCR_S1DEN2_SHIFT (0x00000003)
#define HCHIP_FAUCR_S1DEN2_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1DEN2)
#define HCHIP_FAUCR_S1DEN2_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1DEN2,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1INVAL
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1INVAL_MASK (0x00000010)
#define HCHIP_FAUCR_S1INVAL_SHIFT (0x00000004)
#define HCHIP_FAUCR_S1INVAL_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1INVAL)
#define HCHIP_FAUCR_S1INVAL_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1INVAL,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1INFO
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1INFO_MASK (0x00000020)
#define HCHIP_FAUCR_S1INFO_SHIFT (0x00000005)
#define HCHIP_FAUCR_S1INFO_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1INFO)
#define HCHIP_FAUCR_S1INFO_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1INFO,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1OVER
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1OVER_MASK (0x00000040)
#define HCHIP_FAUCR_S1OVER_SHIFT (0x00000006)
#define HCHIP_FAUCR_S1OVER_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1OVER)
#define HCHIP_FAUCR_S1OVER_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1OVER,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1INEX
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1INEX_MASK (0x00000080)
#define HCHIP_FAUCR_S1INEX_SHIFT (0x00000007)
#define HCHIP_FAUCR_S1INEX_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1INEX)
#define HCHIP_FAUCR_S1INEX_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1INEX,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1UNDER
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1UNDER_MASK (0x00000100)
#define HCHIP_FAUCR_S1UNDER_SHIFT (0x00000008)
#define HCHIP_FAUCR_S1UNDER_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1UNDER)
#define HCHIP_FAUCR_S1UNDER_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1UNDER,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1UNORD
\*----------------------------------------------------------------------------*/
#define HCHIP_FAUCR_S1UNORD_MASK (0x00000200)
#define HCHIP_FAUCR_S1UNORD_SHIFT (0x00000009)
#define HCHIP_FAUCR_S1UNORD_GET(CrReg) \
HCRFIELD_GET(CrReg,HCHIP_FAUCR_S1UNORD)
#define HCHIP_FAUCR_S1UNORD_SET(CrReg,Val) \
HCRFIELD_SET(CrReg,HCHIP_FAUCR_S1UNORD,Val)
/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FAUCR_S1DIV0
\*--⌨️ 快捷键说明
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