📄 6_10.rpt
字号:
Pin LC EC Row Col Primitive Code INP FBK OUT FBK Name
20 - - C -- OUTPUT 0 1 0 0 q0
19 - - C -- OUTPUT 0 1 0 0 q1
21 - - C -- OUTPUT 0 1 0 0 q2
22 - - C -- OUTPUT 0 1 0 0 q3
30 - - - 18 OUTPUT 0 1 0 0 q4
14 - - B -- OUTPUT 0 1 0 0 q5
15 - - B -- OUTPUT 0 1 0 0 q6
63 - - B -- OUTPUT 0 1 0 0 q7
84 - - - 05 OUTPUT 0 1 0 0 q8
57 - - C -- OUTPUT 0 1 0 0 q9
55 - - C -- OUTPUT 0 1 0 0 q10
56 - - C -- OUTPUT 0 1 0 0 q11
23 - - C -- OUTPUT 0 1 0 0 q12
58 - - C -- OUTPUT 0 1 0 0 q13
78 - - - 01 OUTPUT 0 1 0 0 q14
6 - - A -- OUTPUT 0 1 0 0 q15
10 - - A -- OUTPUT 0 1 0 0 q16
8 - - A -- OUTPUT 0 1 0 0 q17
5 - - A -- OUTPUT 0 1 0 0 q18
28 - - - 20 OUTPUT 0 1 0 0 q19
16 - - B -- OUTPUT 0 1 0 0 q20
13 - - B -- OUTPUT 0 1 0 0 q21
62 - - B -- OUTPUT 0 1 0 0 q22
61 - - B -- OUTPUT 0 1 0 0 q23
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
Device-Specific Information: e:\05310204lppy\05310204lppy\6_10.rpt
6_10
** BURIED LOGIC **
Fan-In Fan-Out
IOC LC EC Row Col Primitive Code INP FBK OUT FBK Name
- 1 - A 19 DFFE 0 3 1 2 |74390:30|1QD (|74390:30|:3)
- 1 - A 22 DFFE 0 1 1 1 |74390:30|1QC (|74390:30|:5)
- 5 - A 19 DFFE 0 1 1 2 |74390:30|1QB (|74390:30|:6)
- 8 - A 13 DFFE 0 1 1 2 |74390:30|1QA (|74390:30|:7)
- 2 - A 19 OR2 0 2 0 1 |74390:30|:20
- 2 - B 20 OR2 0 2 0 1 |74390:30|:29
- 8 - B 20 DFFE 1 3 1 1 |74390:30|2QD (|74390:30|:31)
- 5 - B 18 DFFE 1 1 1 1 |74390:30|2QC (|74390:30|:32)
- 1 - B 20 DFFE 1 1 1 2 |74390:30|2QB (|74390:30|:33)
- 6 - B 18 DFFE 1 1 1 2 |74390:30|2QA (|74390:30|:34)
- 5 - C 05 DFFE 0 3 1 2 |74390:31|1QD (|74390:31|:3)
- 6 - C 10 DFFE 0 1 1 1 |74390:31|1QC (|74390:31|:5)
- 3 - C 05 DFFE 0 1 1 2 |74390:31|1QB (|74390:31|:6)
- 2 - B 05 DFFE 0 1 1 2 |74390:31|1QA (|74390:31|:7)
- 1 - C 05 OR2 0 2 0 1 |74390:31|:20
- 2 - C 04 OR2 0 2 0 1 |74390:31|:29
- 2 - C 01 DFFE 0 3 1 2 |74390:31|2QD (|74390:31|:31)
- 4 - C 01 DFFE 0 1 1 1 |74390:31|2QC (|74390:31|:32)
- 1 - C 04 DFFE 0 1 1 2 |74390:31|2QB (|74390:31|:33)
- 6 - C 04 DFFE 0 1 1 2 |74390:31|2QA (|74390:31|:34)
- 8 - C 16 DFFE 1 3 1 2 |74390:32|1QD (|74390:32|:3)
- 4 - C 16 DFFE 1 1 1 1 |74390:32|1QC (|74390:32|:5)
- 1 - C 22 DFFE 1 1 1 2 |74390:32|1QB (|74390:32|:6)
- 2 - C 22 DFFE + 1 0 1 2 |74390:32|1QA (|74390:32|:7)
- 3 - C 22 OR2 0 2 0 1 |74390:32|:20
- 1 - B 14 OR2 0 2 0 1 |74390:32|:29
- 3 - B 14 DFFE 0 3 1 2 |74390:32|2QD (|74390:32|:31)
- 5 - B 17 DFFE 0 1 1 1 |74390:32|2QC (|74390:32|:32)
- 2 - B 14 DFFE 0 1 1 2 |74390:32|2QB (|74390:32|:33)
- 2 - C 18 DFFE 0 1 1 2 |74390:32|2QA (|74390:32|:34)
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register
Device-Specific Information: e:\05310204lppy\05310204lppy\6_10.rpt
6_10
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 4/ 96( 4%) 0/ 48( 0%) 2/ 48( 4%) 0/16( 0%) 4/16( 25%) 0/16( 0%)
B: 7/ 96( 7%) 0/ 48( 0%) 5/ 48( 10%) 1/16( 6%) 7/16( 43%) 0/16( 0%)
C: 7/ 96( 7%) 5/ 48( 10%) 4/ 48( 8%) 0/16( 0%) 9/16( 56%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: e:\05310204lppy\05310204lppy\6_10.rpt
6_10
** CLOCK SIGNALS **
Type Fan-out Name
DFF 4 |74390:32|2QA
DFF 4 |74390:32|1QB
DFF 4 |74390:32|1QD
DFF 4 |74390:31|2QA
DFF 4 |74390:31|2QB
DFF 4 |74390:31|2QD
DFF 4 |74390:31|1QA
DFF 4 |74390:31|1QB
DFF 4 |74390:31|1QD
DFF 4 |74390:30|2QA
DFF 4 |74390:30|2QB
DFF 4 |74390:32|2QD
DFF 4 |74390:32|2QB
DFF 4 |74390:30|1QA
DFF 4 |74390:30|1QB
DFF 4 |74390:30|1QD
DFF 4 |74390:32|1QA
LCELL 1 |74390:32|:29
LCELL 1 |74390:32|:20
LCELL 1 |74390:31|:29
LCELL 1 |74390:31|:20
LCELL 1 |74390:30|:29
LCELL 1 |74390:30|:20
INPUT 1 a
Device-Specific Information: e:\05310204lppy\05310204lppy\6_10.rpt
6_10
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 4 b
INPUT 4 c
INPUT 4 d
INPUT 4 e
INPUT 4 f
INPUT 4 r
Device-Specific Information: e:\05310204lppy\05310204lppy\6_10.rpt
6_10
** EQUATIONS **
a : INPUT;
b : INPUT;
c : INPUT;
d : INPUT;
e : INPUT;
f : INPUT;
r : INPUT;
-- Node name is 'q0'
-- Equation name is 'q0', type is output
q0 = _LC2_C22;
-- Node name is 'q1'
-- Equation name is 'q1', type is output
q1 = _LC1_C22;
-- Node name is 'q2'
-- Equation name is 'q2', type is output
q2 = _LC4_C16;
-- Node name is 'q3'
-- Equation name is 'q3', type is output
q3 = _LC8_C16;
-- Node name is 'q4'
-- Equation name is 'q4', type is output
q4 = _LC2_C18;
-- Node name is 'q5'
-- Equation name is 'q5', type is output
q5 = _LC2_B14;
-- Node name is 'q6'
-- Equation name is 'q6', type is output
q6 = _LC5_B17;
-- Node name is 'q7'
-- Equation name is 'q7', type is output
q7 = _LC3_B14;
-- Node name is 'q8'
-- Equation name is 'q8', type is output
q8 = _LC2_B5;
-- Node name is 'q9'
-- Equation name is 'q9', type is output
q9 = _LC3_C5;
-- Node name is 'q10'
-- Equation name is 'q10', type is output
q10 = _LC6_C10;
-- Node name is 'q11'
-- Equation name is 'q11', type is output
q11 = _LC5_C5;
-- Node name is 'q12'
-- Equation name is 'q12', type is output
q12 = _LC6_C4;
-- Node name is 'q13'
-- Equation name is 'q13', type is output
q13 = _LC1_C4;
-- Node name is 'q14'
-- Equation name is 'q14', type is output
q14 = _LC4_C1;
-- Node name is 'q15'
-- Equation name is 'q15', type is output
q15 = _LC2_C1;
-- Node name is 'q16'
-- Equation name is 'q16', type is output
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -