machine-constraints.html

自己收集的linux入门到学懂高级编程书集 包括linux程序设计第三版

          <dd>An address register: x, y or z

          <br><dt><code>B</code>
          <dd>An address register: x or y

          <br><dt><code>D</code>
          <dd>Register pair (x:d) to form a 32-bit value

          <br><dt><code>L</code>
          <dd>Constants in the range -65536 to 65535

          <br><dt><code>M</code>
          <dd>Constants whose 16-bit low part is zero

          <br><dt><code>N</code>
          <dd>Constant integer 1 or -1

          <br><dt><code>O</code>
          <dd>Constant integer 16

          <br><dt><code>P</code>
          <dd>Constants in the range -8 to 2

     </dl>

     <br><dt><em>SPARC--</em><code>sparc.h</code><em></em>
     <dd>
          <dl>
<dt><code>f</code>
          <dd>Floating-point register on the SPARC-V8 architecture and
lower floating-point register on the SPARC-V9 architecture.

          <br><dt><code>e</code>
          <dd>Floating-point register. It is equivalent to <code>f</code> on the
SPARC-V8 architecture and contains both lower and upper
floating-point registers on the SPARC-V9 architecture.

          <br><dt><code>c</code>
          <dd>Floating-point condition code register.

          <br><dt><code>d</code>
          <dd>Lower floating-point register. It is only valid on the SPARC-V9
architecture when the Visual Instruction Set is available.

          <br><dt><code>b</code>
          <dd>Floating-point register. It is only valid on the SPARC-V9 architecture
when the Visual Instruction Set is available.

          <br><dt><code>h</code>
          <dd>64-bit global or out register for the SPARC-V8+ architecture.

          <br><dt><code>I</code>
          <dd>Signed 13-bit constant

          <br><dt><code>J</code>
          <dd>Zero

          <br><dt><code>K</code>
          <dd>32-bit constant with the low 12 bits clear (a constant that can be
loaded with the <code>sethi</code> instruction)

          <br><dt><code>L</code>
          <dd>A constant in the range supported by <code>movcc</code> instructions

          <br><dt><code>M</code>
          <dd>A constant in the range supported by <code>movrcc</code> instructions

          <br><dt><code>N</code>
          <dd>Same as <code>K</code>, except that it verifies that bits that are not in the
lower 32-bit range are all zero.  Must be used instead of <code>K</code> for
modes wider than <code>SImode</code>

          <br><dt><code>O</code>
          <dd>The constant 4096

          <br><dt><code>G</code>
          <dd>Floating-point zero

          <br><dt><code>H</code>
          <dd>Signed 13-bit constant, sign-extended to 32 or 64 bits

          <br><dt><code>Q</code>
          <dd>Floating-point constant whose integral representation can
be moved into an integer register using a single sethi
instruction

          <br><dt><code>R</code>
          <dd>Floating-point constant whose integral representation can
be moved into an integer register using a single mov
instruction

          <br><dt><code>S</code>
          <dd>Floating-point constant whose integral representation can
be moved into an integer register using a high/lo_sum
instruction sequence

          <br><dt><code>T</code>
          <dd>Memory address aligned to an 8-byte boundary

          <br><dt><code>U</code>
          <dd>Even register

          <br><dt><code>W</code>
          <dd>Memory address for <code>e</code> constraint registers.

     </dl>

     <br><dt><em>TMS320C3x/C4x--</em><code>c4x.h</code><em></em>
     <dd>
          <dl>
<dt><code>a</code>
          <dd>Auxiliary (address) register (ar0-ar7)

          <br><dt><code>b</code>
          <dd>Stack pointer register (sp)

          <br><dt><code>c</code>
          <dd>Standard (32-bit) precision integer register

          <br><dt><code>f</code>
          <dd>Extended (40-bit) precision register (r0-r11)

          <br><dt><code>k</code>
          <dd>Block count register (bk)

          <br><dt><code>q</code>
          <dd>Extended (40-bit) precision low register (r0-r7)

          <br><dt><code>t</code>
          <dd>Extended (40-bit) precision register (r0-r1)

          <br><dt><code>u</code>
          <dd>Extended (40-bit) precision register (r2-r3)

          <br><dt><code>v</code>
          <dd>Repeat count register (rc)

          <br><dt><code>x</code>
          <dd>Index register (ir0-ir1)

          <br><dt><code>y</code>
          <dd>Status (condition code) register (st)

          <br><dt><code>z</code>
          <dd>Data page register (dp)

          <br><dt><code>G</code>
          <dd>Floating-point zero

          <br><dt><code>H</code>
          <dd>Immediate 16-bit floating-point constant

          <br><dt><code>I</code>
          <dd>Signed 16-bit constant

          <br><dt><code>J</code>
          <dd>Signed 8-bit constant

          <br><dt><code>K</code>
          <dd>Signed 5-bit constant

          <br><dt><code>L</code>
          <dd>Unsigned 16-bit constant

          <br><dt><code>M</code>
          <dd>Unsigned 8-bit constant

          <br><dt><code>N</code>
          <dd>Ones complement of unsigned 16-bit constant

          <br><dt><code>O</code>
          <dd>High 16-bit constant (32-bit constant with 16 LSBs zero)

          <br><dt><code>Q</code>
          <dd>Indirect memory reference with signed 8-bit or index register displacement

          <br><dt><code>R</code>
          <dd>Indirect memory reference with unsigned 5-bit displacement

          <br><dt><code>S</code>
          <dd>Indirect memory reference with 1 bit or index register displacement

          <br><dt><code>T</code>
          <dd>Direct memory reference

          <br><dt><code>U</code>
          <dd>Symbolic address

     </dl>

     <br><dt><em>S/390 and zSeries--</em><code>s390.h</code><em></em>
     <dd>
          <dl>
<dt><code>a</code>
          <dd>Address register (general purpose register except r0)

          <br><dt><code>d</code>
          <dd>Data register (arbitrary general purpose register)

          <br><dt><code>f</code>
          <dd>Floating-point register

          <br><dt><code>I</code>
          <dd>Unsigned 8-bit constant (0-255)

          <br><dt><code>J</code>
          <dd>Unsigned 12-bit constant (0-4095)

          <br><dt><code>K</code>
          <dd>Signed 16-bit constant (-32768-32767)

          <br><dt><code>L</code>
          <dd>Value appropriate as displacement.
               <dl>
       <br><dt><code>(0..4095)</code>
               <dd>       for short displacement
       <br><dt><code>(-524288..524287)</code>
               <dd>       for long displacement
</dl>

          <br><dt><code>M</code>
          <dd>Constant integer with a value of 0x7fffffff.

          <br><dt><code>N</code>
          <dd>Multiple letter constraint followed by 4 parameter letters.
               <dl>
         <br><dt><code>0..9:</code>
               <dd>         number of the part counting from most to least significant
         <br><dt><code>H,Q:</code>
               <dd>         mode of the part
         <br><dt><code>D,S,H:</code>
               <dd>         mode of the containing operand
         <br><dt><code>0,F:</code>
               <dd>         value of the other parts (F - all bits set)
</dl>
          The constraint matches if the specified part of a constant
has a value different from it's other parts.

          <br><dt><code>Q</code>
          <dd>Memory reference without index register and with short displacement.

          <br><dt><code>R</code>
          <dd>Memory reference with index register and short displacement.

          <br><dt><code>S</code>
          <dd>Memory reference without index register but with long displacement.

          <br><dt><code>T</code>
          <dd>Memory reference with index register and long displacement.

          <br><dt><code>U</code>
          <dd>Pointer with short displacement.

          <br><dt><code>W</code>
          <dd>Pointer with long displacement.

          <br><dt><code>Y</code>
          <dd>Shift count operand.

     </dl>

     <br><dt><em>Xstormy16--</em><code>stormy16.h</code><em></em>
     <dd>
          <dl>
<dt><code>a</code>
          <dd>Register r0.

          <br><dt><code>b</code>
          <dd>Register r1.

          <br><dt><code>c</code>
          <dd>Register r2.

          <br><dt><code>d</code>
          <dd>Register r8.

          <br><dt><code>e</code>
          <dd>Registers r0 through r7.

          <br><dt><code>t</code>
          <dd>Registers r0 and r1.

          <br><dt><code>y</code>
          <dd>The carry register.

          <br><dt><code>z</code>
          <dd>Registers r8 and r9.

          <br><dt><code>I</code>
          <dd>A constant between 0 and 3 inclusive.

          <br><dt><code>J</code>
          <dd>A constant that has exactly one bit set.

          <br><dt><code>K</code>
          <dd>A constant that has exactly one bit clear.

          <br><dt><code>L</code>
          <dd>A constant between 0 and 255 inclusive.

          <br><dt><code>M</code>
          <dd>A constant between -255 and 0 inclusive.

          <br><dt><code>N</code>
          <dd>A constant between -3 and 0 inclusive.

          <br><dt><code>O</code>
          <dd>A constant between 1 and 4 inclusive.

          <br><dt><code>P</code>
          <dd>A constant between -4 and -1 inclusive.

          <br><dt><code>Q</code>
          <dd>A memory reference that is a stack push.

          <br><dt><code>R</code>
          <dd>A memory reference that is a stack pop.

          <br><dt><code>S</code>
          <dd>A memory reference that refers to a constant address of known value.

          <br><dt><code>T</code>
          <dd>The register indicated by Rx (not implemented yet).

          <br><dt><code>U</code>
          <dd>A constant that is not between 2 and 15 inclusive.

          <br><dt><code>Z</code>
          <dd>The constant 0.

     </dl>

     <br><dt><em>Xtensa--</em><code>xtensa.h</code><em></em>
     <dd>
          <dl>
<dt><code>a</code>
          <dd>General-purpose 32-bit register

          <br><dt><code>b</code>
          <dd>One-bit boolean register

          <br><dt><code>A</code>
          <dd>MAC16 40-bit accumulator register

          <br><dt><code>I</code>
          <dd>Signed 12-bit integer constant, for use in MOVI instructions

          <br><dt><code>J</code>
          <dd>Signed 8-bit integer constant, for use in ADDI instructions

          <br><dt><code>K</code>
          <dd>Integer constant valid for BccI instructions

          <br><dt><code>L</code>
          <dd>Unsigned constant valid for BccUI instructions

     </dl>

   </dl>

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