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<html lang="en"><head><title>Using the GNU Compiler Collection (GCC)</title><meta http-equiv="Content-Type" content="text/html"><meta name="description" content="Using the GNU Compiler Collection (GCC)"><meta name="generator" content="makeinfo 4.6"><!--Copyright &copy; 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.   <p>Permission is granted to copy, distribute and/or modify this documentunder the terms of the GNU Free Documentation License, Version 1.2 orany later version published by the Free Software Foundation; with theInvariant Sections being "GNU General Public License" and "FundingFree Software", the Front-Cover texts being (a) (see below), and withthe Back-Cover Texts being (b) (see below).  A copy of the license isincluded in the section entitled "GNU Free Documentation License".   <p>(a) The FSF's Front-Cover Text is:   <p>A GNU Manual   <p>(b) The FSF's Back-Cover Text is:   <p>You have freedom to copy and modify this GNU Manual, like GNU     software.  Copies published by the Free Software Foundation raise     funds for GNU development.--><meta http-equiv="Content-Style-Type" content="text/css"><style type="text/css"><!--  pre.display { font-family:inherit }  pre.format  { font-family:inherit }  pre.smalldisplay { font-family:inherit; font-size:smaller }  pre.smallformat  { font-family:inherit; font-size:smaller }  pre.smallexample { font-size:smaller }  pre.smalllisp    { font-size:smaller }--></style></head><body><div class="node"><p>Node:&nbsp;<a name="Machine%20Constraints">Machine Constraints</a>,Previous:&nbsp;<a rel="previous" accesskey="p" href="Modifiers.html#Modifiers">Modifiers</a>,Up:&nbsp;<a rel="up" accesskey="u" href="Constraints.html#Constraints">Constraints</a><hr><br></div><h3 class="subsection">Constraints for Particular Machines</h4><p>Whenever possible, you should use the general-purpose constraint lettersin <code>asm</code> arguments, since they will convey meaning more readily topeople reading your code.  Failing that, use the constraint lettersthat usually have very similar meanings across architectures.  The mostcommonly used constraints are <code>m</code> and <code>r</code> (for memory andgeneral-purpose registers respectively; see <a href="Simple-Constraints.html#Simple%20Constraints">Simple Constraints</a>), and<code>I</code>, usually the letter indicating the most commonimmediate-constant format.   <p>For each machine architecture, the<code>config/</code><var>machine</var><code>/</code><var>machine</var><code>.h</code> file defines additionalconstraints.  These constraints are used by the compiler itself forinstruction generation, as well as for <code>asm</code> statements; therefore,some of the constraints are not particularly interesting for <code>asm</code>. The constraints are defined through these macros:     <dl><dt><code>REG_CLASS_FROM_LETTER</code>     <dd>Register class constraints (usually lowercase).     <br><dt><code>CONST_OK_FOR_LETTER_P</code>     <dd>Immediate constant constraints, for non-floating point constants ofword size or smaller precision (usually uppercase).     <br><dt><code>CONST_DOUBLE_OK_FOR_LETTER_P</code>     <dd>Immediate constant constraints, for all floating point constants and forconstants of greater than word size precision (usually uppercase).     <br><dt><code>EXTRA_CONSTRAINT</code>     <dd>Special cases of registers or memory.  This macro is not required, andis only defined for some machines. </dl>   <p>Inspecting these macro definitions in the compiler source for yourmachine is the best way to be certain you have the right constraints. However, here is a summary of the machine-dependent constraintsavailable on some particular machines.     <dl><dt><em>ARM family--</em><code>arm.h</code><em></em>     <dd>          <dl><dt><code>f</code>          <dd>Floating-point register          <br><dt><code>w</code>          <dd>VFP floating-point register          <br><dt><code>F</code>          <dd>One of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0, 4.0, 5.0or 10.0          <br><dt><code>G</code>          <dd>Floating-point constant that would satisfy the constraint <code>F</code> if itwere negated          <br><dt><code>I</code>          <dd>Integer that is valid as an immediate operand in a data processinginstruction.  That is, an integer in the range 0 to 255 rotated by amultiple of 2          <br><dt><code>J</code>          <dd>Integer in the range -4095 to 4095          <br><dt><code>K</code>          <dd>Integer that satisfies constraint <code>I</code> when inverted (ones complement)          <br><dt><code>L</code>          <dd>Integer that satisfies constraint <code>I</code> when negated (twos complement)          <br><dt><code>M</code>          <dd>Integer in the range 0 to 32          <br><dt><code>Q</code>          <dd>A memory reference where the exact address is in a single register(`<code>m</code>' is preferable for <code>asm</code> statements)          <br><dt><code>R</code>          <dd>An item in the constant pool          <br><dt><code>S</code>          <dd>A symbol in the text segment of the current file</dl>     <br><dt><em>Uv</em>     <dd>A memory reference suitable for VFP load/store insns (reg+constant offset)     <br><dt><em>Uq</em>     <dd>A memory reference suitable for for the ARMv4 ldrsb instruction.     <br><dt><em>AVR family--</em><code>avr.h</code><em></em>     <dd>          <dl><dt><code>l</code>          <dd>Registers from r0 to r15          <br><dt><code>a</code>          <dd>Registers from r16 to r23          <br><dt><code>d</code>          <dd>Registers from r16 to r31          <br><dt><code>w</code>          <dd>Registers from r24 to r31.  These registers can be used in <code>adiw</code> command          <br><dt><code>e</code>          <dd>Pointer register (r26-r31)          <br><dt><code>b</code>          <dd>Base pointer register (r28-r31)          <br><dt><code>q</code>          <dd>Stack pointer register (SPH:SPL)          <br><dt><code>t</code>          <dd>Temporary register r0          <br><dt><code>x</code>          <dd>Register pair X (r27:r26)          <br><dt><code>y</code>          <dd>Register pair Y (r29:r28)          <br><dt><code>z</code>          <dd>Register pair Z (r31:r30)          <br><dt><code>I</code>          <dd>Constant greater than -1, less than 64          <br><dt><code>J</code>          <dd>Constant greater than -64, less than 1          <br><dt><code>K</code>          <dd>Constant integer 2          <br><dt><code>L</code>          <dd>Constant integer 0          <br><dt><code>M</code>          <dd>Constant that fits in 8 bits          <br><dt><code>N</code>          <dd>Constant integer -1          <br><dt><code>O</code>          <dd>Constant integer 8, 16, or 24          <br><dt><code>P</code>          <dd>Constant integer 1          <br><dt><code>G</code>          <dd>A floating point constant 0.0</dl>     <br><dt><em>PowerPC and IBM RS6000--</em><code>rs6000.h</code><em></em>     <dd>          <dl><dt><code>b</code>          <dd>Address base register          <br><dt><code>f</code>          <dd>Floating point register          <br><dt><code>v</code>          <dd>Vector register          <br><dt><code>h</code>          <dd><code>MQ</code>, <code>CTR</code>, or <code>LINK</code> register          <br><dt><code>q</code>          <dd><code>MQ</code> register          <br><dt><code>c</code>          <dd><code>CTR</code> register          <br><dt><code>l</code>          <dd><code>LINK</code> register          <br><dt><code>x</code>          <dd><code>CR</code> register (condition register) number 0          <br><dt><code>y</code>          <dd><code>CR</code> register (condition register)          <br><dt><code>z</code>          <dd><code>FPMEM</code> stack memory for FPR-GPR transfers          <br><dt><code>I</code>          <dd>Signed 16-bit constant          <br><dt><code>J</code>          <dd>Unsigned 16-bit constant shifted left 16 bits (use <code>L</code> instead for<code>SImode</code> constants)          <br><dt><code>K</code>          <dd>Unsigned 16-bit constant          <br><dt><code>L</code>          <dd>Signed 16-bit constant shifted left 16 bits          <br><dt><code>M</code>          <dd>Constant larger than 31          <br><dt><code>N</code>          <dd>Exact power of 2          <br><dt><code>O</code>          <dd>Zero          <br><dt><code>P</code>          <dd>Constant whose negation is a signed 16-bit constant          <br><dt><code>G</code>          <dd>Floating point constant that can be loaded into a register with oneinstruction per word          <br><dt><code>Q</code>          <dd>Memory operand that is an offset from a register (<code>m</code> is preferablefor <code>asm</code> statements)          <br><dt><code>R</code>          <dd>AIX TOC entry          <br><dt><code>S</code>          <dd>Constant suitable as a 64-bit mask operand          <br><dt><code>T</code>          <dd>Constant suitable as a 32-bit mask operand          <br><dt><code>U</code>          <dd>System V Release 4 small data area reference</dl>     <br><dt><em>Intel 386--</em><code>i386.h</code><em></em>     <dd>          <dl><dt><code>q</code>          <dd><code>a</code>, <code>b</code>, <code>c</code>, or <code>d</code> register for the i386. For x86-64 it is equivalent to <code>r</code> class. (for 8-bit instructions thatdo not use upper halves)          <br><dt><code>Q</code>          <dd><code>a</code>, <code>b</code>, <code>c</code>, or <code>d</code> register. (for 8-bit instructions,that do use upper halves)          <br><dt><code>R</code>          <dd>Legacy register--equivalent to <code>r</code> class in i386 mode. (for non-8-bit registers used together with 8-bit upper halves in a singleinstruction)          <br><dt><code>A</code>          <dd>Specifies the <code>a</code> or <code>d</code> registers.  This is primarily usefulfor 64-bit integer values (when in 32-bit mode) intended to be returnedwith the <code>d</code> register holding the most significant bits and the<code>a</code> register holding the least significant bits.          <br><dt><code>f</code>          <dd>Floating point register          <br><dt><code>t</code>          <dd>First (top of stack) floating point register          <br><dt><code>u</code>          <dd>Second floating point register          <br><dt><code>a</code>          <dd><code>a</code> register          <br><dt><code>b</code>          <dd><code>b</code> register          <br><dt><code>c</code>          <dd><code>c</code> register          <br><dt><code>C</code>          <dd>Specifies constant that can be easily constructed in SSE register withoutloading it from memory.          <br><dt><code>d</code>          <dd><code>d</code> register          <br><dt><code>D</code>          <dd><code>di</code> register          <br><dt><code>S</code>          <dd><code>si</code> register          <br><dt><code>x</code>          <dd><code>xmm</code> SSE register          <br><dt><code>y</code>          <dd>MMX register          <br><dt><code>I</code>          <dd>Constant in range 0 to 31 (for 32-bit shifts)          <br><dt><code>J</code>          <dd>Constant in range 0 to 63 (for 64-bit shifts)          <br><dt><code>K</code>          <dd><code>0xff</code>          <br><dt><code>L</code>          <dd><code>0xffff</code>          <br><dt><code>M</code>          <dd>0, 1, 2, or 3 (shifts for <code>lea</code> instruction)          <br><dt><code>N</code>          <dd>Constant in range 0 to 255 (for <code>out</code> instruction)          <br><dt><code>Z</code>          <dd>Constant in range 0 to <code>0xffffffff</code> or symbolic reference known to fit specified range. (for using immediates in zero extending 32-bit to 64-bit x86-64 instructions)          <br><dt><code>e</code>          <dd>Constant in range -2147483648 to 2147483647 or symbolic reference known to fit specified range. 

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