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<html lang="en"><head><title>Using the GNU Compiler Collection (GCC)</title><meta http-equiv="Content-Type" content="text/html"><meta name="description" content="Using the GNU Compiler Collection (GCC)"><meta name="generator" content="makeinfo 4.6"><!--Copyright © 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. <p>Permission is granted to copy, distribute and/or modify this documentunder the terms of the GNU Free Documentation License, Version 1.2 orany later version published by the Free Software Foundation; with theInvariant Sections being "GNU General Public License" and "FundingFree Software", the Front-Cover texts being (a) (see below), and withthe Back-Cover Texts being (b) (see below). A copy of the license isincluded in the section entitled "GNU Free Documentation License". <p>(a) The FSF's Front-Cover Text is: <p>A GNU Manual <p>(b) The FSF's Back-Cover Text is: <p>You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development.--><meta http-equiv="Content-Style-Type" content="text/css"><style type="text/css"><!-- pre.display { font-family:inherit } pre.format { font-family:inherit } pre.smalldisplay { font-family:inherit; font-size:smaller } pre.smallformat { font-family:inherit; font-size:smaller } pre.smallexample { font-size:smaller } pre.smalllisp { font-size:smaller }--></style></head><body><div class="node"><p>Node: <a name="i386%20and%20x86-64%20Options">i386 and x86-64 Options</a>,Next: <a rel="next" accesskey="n" href="HPPA-Options.html#HPPA%20Options">HPPA Options</a>,Previous: <a rel="previous" accesskey="p" href="MIPS-Options.html#MIPS%20Options">MIPS Options</a>,Up: <a rel="up" accesskey="u" href="Submodel-Options.html#Submodel%20Options">Submodel Options</a><hr><br></div><h3 class="subsection">Intel 386 and AMD x86-64 Options</h4><p>These <code>-m</code> options are defined for the i386 and x86-64 family ofcomputers: <dl><dt><code>-mtune=</code><var>cpu-type</var><code></code> <dd>Tune to <var>cpu-type</var> everything applicable about the generated code, exceptfor the ABI and the set of available instructions. The choices for<var>cpu-type</var> are: <dl><dt><em>i386</em> <dd>Original Intel's i386 CPU. <br><dt><em>i486</em> <dd>Intel's i486 CPU. (No scheduling is implemented for this chip.) <br><dt><em>i586, pentium</em> <dd>Intel Pentium CPU with no MMX support. <br><dt><em>pentium-mmx</em> <dd>Intel PentiumMMX CPU based on Pentium core with MMX instruction set support. <br><dt><em>i686, pentiumpro</em> <dd>Intel PentiumPro CPU. <br><dt><em>pentium2</em> <dd>Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support. <br><dt><em>pentium3, pentium3m</em> <dd>Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction setsupport. <br><dt><em>pentium-m</em> <dd>Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction setsupport. Used by Centrino notebooks. <br><dt><em>pentium4, pentium4m</em> <dd>Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support. <br><dt><em>prescott</em> <dd>Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instructionset support. <br><dt><em>nocona</em> <dd>Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,SSE2 and SSE3 instruction set support. <br><dt><em>k6</em> <dd>AMD K6 CPU with MMX instruction set support. <br><dt><em>k6-2, k6-3</em> <dd>Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support. <br><dt><em>athlon, athlon-tbird</em> <dd>AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructionssupport. <br><dt><em>athlon-4, athlon-xp, athlon-mp</em> <dd>Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSEinstruction set support. <br><dt><em>k8, opteron, athlon64, athlon-fx</em> <dd>AMD K8 core based CPUs with x86-64 instruction set support. (This supersetsMMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.) <br><dt><em>winchip-c6</em> <dd>IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instructionset support. <br><dt><em>winchip2</em> <dd>IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW! instruction set support. <br><dt><em>c3</em> <dd>Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling isimplemented for this chip.) <br><dt><em>c3-2</em> <dd>Via C3-2 CPU with MMX and SSE instruction set support. (No scheduling isimplemented for this chip.) </dl> <p>While picking a specific <var>cpu-type</var> will schedule things appropriatelyfor that particular chip, the compiler will not generate any code thatdoes not run on the i386 without the <code>-march=</code><var>cpu-type</var><code></code> optionbeing used. <br><dt><code>-march=</code><var>cpu-type</var><code></code> <dd>Generate instructions for the machine type <var>cpu-type</var>. The choicesfor <var>cpu-type</var> are the same as for <code>-mtune</code>. Moreover,specifying <code>-march=</code><var>cpu-type</var><code></code> implies <code>-mtune=</code><var>cpu-type</var><code></code>. <br><dt><code>-mcpu=</code><var>cpu-type</var><code></code> <dd>A deprecated synonym for <code>-mtune</code>. <br><dt><code>-m386</code> <dd><dt><code>-m486</code> <dd><dt><code>-mpentium</code> <dd><dt><code>-mpentiumpro</code> <dd>These options are synonyms for <code>-mtune=i386</code>, <code>-mtune=i486</code>,<code>-mtune=pentium</code>, and <code>-mtune=pentiumpro</code> respectively. These synonyms are deprecated. <br><dt><code>-mfpmath=</code><var>unit</var><code></code> <dd>Generate floating point arithmetics for selected unit <var>unit</var>. The choicesfor <var>unit</var> are: <dl><dt><code>387</code> <dd>Use the standard 387 floating point coprocessor present majority of chips andemulated otherwise. Code compiled with this option will run almost everywhere. The temporary results are computed in 80bit precision instead of precisionspecified by the type resulting in slightly different results compared to mostof other chips. See <code>-ffloat-store</code> for more detailed description. <p>This is the default choice for i386 compiler. <br><dt><code>sse</code> <dd>Use scalar floating point instructions present in the SSE instruction set. This instruction set is supported by Pentium3 and newer chips, in the AMD lineby Athlon-4, Athlon-xp and Athlon-mp chips. The earlier version of SSEinstruction set supports only single precision arithmetics, thus the double andextended precision arithmetics is still done using 387. Later version, presentonly in Pentium4 and the future AMD x86-64 chips supports double precisionarithmetics too. <p>For i387 you need to use <code>-march=</code><var>cpu-type</var><code></code>, <code>-msse</code> or<code>-msse2</code> switches to enable SSE extensions and make this optioneffective. For x86-64 compiler, these extensions are enabled by default. <p>The resulting code should be considerably faster in the majority of cases and avoidthe numerical instability problems of 387 code, but may break some existingcode that expects temporaries to be 80bit. <p>This is the default choice for the x86-64 compiler. <br><dt><code>sse,387</code> <dd>Attempt to utilize both instruction sets at once. This effectively double theamount of available registers and on chips with separate execution units for387 and SSE the execution resources too. Use this option with care, as it isstill experimental, because the GCC register allocator does not model separatefunctional units well resulting in instable performance. </dl> <br><dt><code>-masm=</code><var>dialect</var><code></code> <dd>Output asm instructions using selected <var>dialect</var>. Supported choices are<code>intel</code> or <code>att</code> (the default one). <br><dt><code>-mieee-fp</code> <dd><dt><code>-mno-ieee-fp</code> <dd>Control whether or not the compiler uses IEEE floating pointcomparisons. These handle correctly the case where the result of acomparison is unordered. <br><dt><code>-msoft-float</code> <dd>Generate output containing library calls for floating point. <strong>Warning:</strong> the requisite libraries are not part of GCC. Normally the facilities of the machine's usual C compiler are used, butthis can't be done directly in cross-compilation. You must make yourown arrangements to provide suitable library functions forcross-compilation. <p>On machines where a function returns floating point results in the 80387register stack, some floating point opcodes may be emitted even if<code>-msoft-float</code> is used. <br><dt><code>-mno-fp-ret-in-387</code> <dd>Do not use the FPU registers for return values of functions. <p>The usual calling convention has functions return values of types<code>float</code> and <code>double</code> in an FPU register, even if thereis no FPU. The idea is that the operating system should emulatean FPU. <p>The option <code>-mno-fp-ret-in-387</code> causes such values to be returnedin ordinary CPU registers instead. <br><dt><code>-mno-fancy-math-387</code> <dd>Some 387 emulators do not support the <code>sin</code>, <code>cos</code> and<code>sqrt</code> instructions for the 387. Specify this option to avoidgenerating those instructions. This option is the default on FreeBSD,OpenBSD and NetBSD. This option is overridden when <code>-march</code>indicates that the target cpu will always have an FPU and so theinstruction will not need emulation. As of revision 2.6.1, theseinstructions are not generated unless you also use the<code>-funsafe-math-optimizations</code> switch. <br><dt><code>-malign-double</code> <dd><dt><code>-mno-align-double</code> <dd>Control whether GCC aligns <code>double</code>, <code>long double</code>, and<code>long long</code> variables on a two word boundary or a one word⌨️ 快捷键说明
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