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<html lang="en"><head><title>Using the GNU Compiler Collection (GCC)</title><meta http-equiv="Content-Type" content="text/html"><meta name="description" content="Using the GNU Compiler Collection (GCC)"><meta name="generator" content="makeinfo 4.6"><!--Copyright &copy; 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.   <p>Permission is granted to copy, distribute and/or modify this documentunder the terms of the GNU Free Documentation License, Version 1.2 orany later version published by the Free Software Foundation; with theInvariant Sections being "GNU General Public License" and "FundingFree Software", the Front-Cover texts being (a) (see below), and withthe Back-Cover Texts being (b) (see below).  A copy of the license isincluded in the section entitled "GNU Free Documentation License".   <p>(a) The FSF's Front-Cover Text is:   <p>A GNU Manual   <p>(b) The FSF's Back-Cover Text is:   <p>You have freedom to copy and modify this GNU Manual, like GNU     software.  Copies published by the Free Software Foundation raise     funds for GNU development.--><meta http-equiv="Content-Style-Type" content="text/css"><style type="text/css"><!--  pre.display { font-family:inherit }  pre.format  { font-family:inherit }  pre.smalldisplay { font-family:inherit; font-size:smaller }  pre.smallformat  { font-family:inherit; font-size:smaller }  pre.smallexample { font-size:smaller }  pre.smalllisp    { font-size:smaller }--></style></head><body><div class="node"><p>Node:&nbsp;<a name="SPARC%20Options">SPARC Options</a>,Next:&nbsp;<a rel="next" accesskey="n" href="ARM-Options.html#ARM%20Options">ARM Options</a>,Previous:&nbsp;<a rel="previous" accesskey="p" href="VAX-Options.html#VAX%20Options">VAX Options</a>,Up:&nbsp;<a rel="up" accesskey="u" href="Submodel-Options.html#Submodel%20Options">Submodel Options</a><hr><br></div><h3 class="subsection">SPARC Options</h4><p>These <code>-m</code> options are supported on the SPARC:     <dl><dt><code>-mno-app-regs</code>     <dd><dt><code>-mapp-regs</code>     <dd>Specify <code>-mapp-regs</code> to generate output using the global registers2 through 4, which the SPARC SVR4 ABI reserves for applications.  Thisis the default.     <p>To be fully SVR4 ABI compliant at the cost of some performance loss,specify <code>-mno-app-regs</code>.  You should compile libraries and systemsoftware with this option.     <br><dt><code>-mfpu</code>     <dd><dt><code>-mhard-float</code>     <dd>Generate output containing floating point instructions.  This is thedefault.     <br><dt><code>-mno-fpu</code>     <dd><dt><code>-msoft-float</code>     <dd>Generate output containing library calls for floating point. <strong>Warning:</strong> the requisite libraries are not available for all SPARCtargets.  Normally the facilities of the machine's usual C compiler areused, but this cannot be done directly in cross-compilation.  You must makeyour own arrangements to provide suitable library functions forcross-compilation.  The embedded targets <code>sparc-*-aout</code> and<code>sparclite-*-*</code> do provide software floating point support.     <p><code>-msoft-float</code> changes the calling convention in the output file;therefore, it is only useful if you compile <em>all</em> of a program withthis option.  In particular, you need to compile <code>libgcc.a</code>, thelibrary that comes with GCC, with <code>-msoft-float</code> in order forthis to work.     <br><dt><code>-mhard-quad-float</code>     <dd>Generate output containing quad-word (long double) floating pointinstructions.     <br><dt><code>-msoft-quad-float</code>     <dd>Generate output containing library calls for quad-word (long double)floating point instructions.  The functions called are those specifiedin the SPARC ABI.  This is the default.     <p>As of this writing, there are no SPARC implementations that have hardwaresupport for the quad-word floating point instructions.  They all invokea trap handler for one of these instructions, and then the trap handleremulates the effect of the instruction.  Because of the trap handler overhead,this is much slower than calling the ABI library routines.  Thus the<code>-msoft-quad-float</code> option is the default.     <br><dt><code>-mno-unaligned-doubles</code>     <dd><dt><code>-munaligned-doubles</code>     <dd>Assume that doubles have 8 byte alignment.  This is the default.     <p>With <code>-munaligned-doubles</code>, GCC assumes that doubles have 8 bytealignment only if they are contained in another type, or if they have anabsolute address.  Otherwise, it assumes they have 4 byte alignment. Specifying this option avoids some rare compatibility problems with codegenerated by other compilers.  It is not the default because it resultsin a performance loss, especially for floating point code.     <br><dt><code>-mno-faster-structs</code>     <dd><dt><code>-mfaster-structs</code>     <dd>With <code>-mfaster-structs</code>, the compiler assumes that structuresshould have 8 byte alignment.  This enables the use of pairs of<code>ldd</code> and <code>std</code> instructions for copies in structureassignment, in place of twice as many <code>ld</code> and <code>st</code> pairs. However, the use of this changed alignment directly violates the SPARCABI.  Thus, it's intended only for use on targets where the developeracknowledges that their resulting code will not be directly in line withthe rules of the ABI.     <br><dt><code>-mimpure-text</code>     <dd><code>-mimpure-text</code>, used in addition to <code>-shared</code>, tellsthe compiler to not pass <code>-z text</code> to the linker when linking ashared object.  Using this option, you can link position-dependentcode into a shared object.     <p><code>-mimpure-text</code> suppresses the "relocations remain againstallocatable but non-writable sections" linker error message. However, the necessary relocations will trigger copy-on-write, and theshared object is not actually shared across processes.  Instead ofusing <code>-mimpure-text</code>, you should compile all source code with<code>-fpic</code> or <code>-fPIC</code>.     <p>This option is only available on SunOS and Solaris.     <br><dt><code>-mcpu=</code><var>cpu_type</var><code></code>     <dd>Set the instruction set, register set, and instruction scheduling parametersfor machine type <var>cpu_type</var>.  Supported values for <var>cpu_type</var> are<code>v7</code>, <code>cypress</code>, <code>v8</code>, <code>supersparc</code>, <code>sparclite</code>,<code>f930</code>, <code>f934</code>, <code>hypersparc</code>, <code>sparclite86x</code>,<code>sparclet</code>, <code>tsc701</code>, <code>v9</code>, <code>ultrasparc</code>, and<code>ultrasparc3</code>.     <p>Default instruction scheduling parameters are used for values that selectan architecture and not an implementation.  These are <code>v7</code>, <code>v8</code>,<code>sparclite</code>, <code>sparclet</code>, <code>v9</code>.     <p>Here is a list of each supported architecture and their supportedimplementations.     <pre class="smallexample">              v7:             cypress              v8:             supersparc, hypersparc              sparclite:      f930, f934, sparclite86x              sparclet:       tsc701              v9:             ultrasparc, ultrasparc3          </pre>     <p>By default (unless configured otherwise), GCC generates code for the V7variant of the SPARC architecture.  With <code>-mcpu=cypress</code>, the compileradditionally optimizes it for the Cypress CY7C602 chip, as used in theSPARCStation/SPARCServer 3xx series.  This is also appropriate for the olderSPARCStation 1, 2, IPX etc.     <p>With <code>-mcpu=v8</code>, GCC generates code for the V8 variant of the SPARCarchitecture.  The only difference from V7 code is that the compiler emitsthe integer multiply and integer divide instructions which exist in SPARC-V8but not in SPARC-V7.  With <code>-mcpu=supersparc</code>, the compiler additionallyoptimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and2000 series.     <p>With <code>-mcpu=sparclite</code>, GCC generates code for the SPARClite variant ofthe SPARC architecture.  This adds the integer multiply, integer divide stepand scan (<code>ffs</code>) instructions which exist in SPARClite but not in SPARC-V7. With <code>-mcpu=f930</code>, the compiler additionally optimizes it for theFujitsu MB86930 chip, which is the original SPARClite, with no FPU.  With<code>-mcpu=f934</code>, the compiler additionally optimizes it for the FujitsuMB86934 chip, which is the more recent SPARClite with FPU.     <p>With <code>-mcpu=sparclet</code>, GCC generates code for the SPARClet variant ofthe SPARC architecture.  This adds the integer multiply, multiply/accumulate,integer divide step and scan (<code>ffs</code>) instructions which exist in SPARCletbut not in SPARC-V7.  With <code>-mcpu=tsc701</code>, the compiler additionallyoptimizes it for the TEMIC SPARClet chip.     <p>With <code>-mcpu=v9</code>, GCC generates code for the V9 variant of the SPARCarchitecture.  This adds 64-bit integer and floating-point move instructions,3 additional floating-point condition code registers and conditional moveinstructions.  With <code>-mcpu=ultrasparc</code>, the compiler additionallyoptimizes it for the Sun UltraSPARC I/II chips.  With<code>-mcpu=ultrasparc3</code>, the compiler additionally optimizes it for theSun UltraSPARC III chip.     <br><dt><code>-mtune=</code><var>cpu_type</var><code></code>     <dd>Set the instruction scheduling parameters for machine type<var>cpu_type</var>, but do not set the instruction set or register set that theoption <code>-mcpu=</code><var>cpu_type</var><code></code> would.     <p>The same values for <code>-mcpu=</code><var>cpu_type</var><code></code> can be used for<code>-mtune=</code><var>cpu_type</var><code></code>, but the only useful values are thosethat select a particular cpu implementation.  Those are <code>cypress</code>,<code>supersparc</code>, <code>hypersparc</code>, <code>f930</code>, <code>f934</code>,<code>sparclite86x</code>, <code>tsc701</code>, <code>ultrasparc</code>, and<code>ultrasparc3</code>.     <br><dt><code>-mv8plus</code>     <dd><dt><code>-mno-v8plus</code>     <dd>With <code>-mv8plus</code>, GCC generates code for the SPARC-V8+ ABI.  Thedifference from the V8 ABI is that the global and out registers areconsidered 64-bit wide.  This is enabled by default on Solaris in 32-bitmode for all SPARC-V9 processors.     <br><dt><code>-mvis</code>     <dd><dt><code>-mno-vis</code>     <dd>With <code>-mvis</code>, GCC generates code that takes advantage of the UltraSPARCVisual Instruction Set extensions.  The default is <code>-mno-vis</code>. </dl>   <p>These <code>-m</code> options are supported in addition to the aboveon SPARC-V9 processors in 64-bit environments:     <dl><dt><code>-mlittle-endian</code>     <dd>Generate code for a processor running in little-endian mode. It is onlyavailable for a few configurations and most notably not on Solaris.     <br><dt><code>-m32</code>     <dd><dt><code>-m64</code>     <dd>Generate code for a 32-bit or 64-bit environment. The 32-bit environment sets int, long and pointer to 32 bits. The 64-bit environment sets int to 32 bits and long and pointerto 64 bits.     <br><dt><code>-mcmodel=medlow</code>     <dd>Generate code for the Medium/Low code model: 64-bit addresses, programsmust be linked in the low 32 bits of memory.  Programs can be staticallyor dynamically linked.     <br><dt><code>-mcmodel=medmid</code>     <dd>Generate code for the Medium/Middle code model: 64-bit addresses, programsmust be linked in the low 44 bits of memory, the text and data segments mustbe less than 2GB in size and the data segment must be located within 2GB ofthe text segment.     <br><dt><code>-mcmodel=medany</code>     <dd>Generate code for the Medium/Anywhere code model: 64-bit addresses, programsmay be linked anywhere in memory, the text and data segments must be lessthan 2GB in size and the data segment must be located within 2GB of thetext segment.     <br><dt><code>-mcmodel=embmedany</code>     <dd>Generate code for the Medium/Anywhere code model for embedded systems:64-bit addresses, the text and data segments must be less than 2GB insize, both starting anywhere in memory (determined at link time).  Theglobal register %g4 points to the base of the data segment.  Programsare statically linked and PIC is not supported.     <br><dt><code>-mstack-bias</code>     <dd><dt><code>-mno-stack-bias</code>     <dd>With <code>-mstack-bias</code>, GCC assumes that the stack pointer, andframe pointer if present, are offset by -2047 which must be added backwhen making stack frame references.  This is the default in 64-bit mode. Otherwise, assume no such offset is present. </dl>   </body></html>
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