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<html lang="en"><head><title>Using the GNU Compiler Collection (GCC)</title><meta http-equiv="Content-Type" content="text/html"><meta name="description" content="Using the GNU Compiler Collection (GCC)"><meta name="generator" content="makeinfo 4.6"><!--Copyright © 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. <p>Permission is granted to copy, distribute and/or modify this documentunder the terms of the GNU Free Documentation License, Version 1.2 orany later version published by the Free Software Foundation; with theInvariant Sections being "GNU General Public License" and "FundingFree Software", the Front-Cover texts being (a) (see below), and withthe Back-Cover Texts being (b) (see below). A copy of the license isincluded in the section entitled "GNU Free Documentation License". <p>(a) The FSF's Front-Cover Text is: <p>A GNU Manual <p>(b) The FSF's Back-Cover Text is: <p>You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development.--><meta http-equiv="Content-Style-Type" content="text/css"><style type="text/css"><!-- pre.display { font-family:inherit } pre.format { font-family:inherit } pre.smalldisplay { font-family:inherit; font-size:smaller } pre.smallformat { font-family:inherit; font-size:smaller } pre.smallexample { font-size:smaller } pre.smalllisp { font-size:smaller }--></style></head><body><div class="node"><p>Node: <a name="MIPS%20Options">MIPS Options</a>,Next: <a rel="next" accesskey="n" href="i386-and-x86-64-Options.html#i386%20and%20x86-64%20Options">i386 and x86-64 Options</a>,Previous: <a rel="previous" accesskey="p" href="Darwin-Options.html#Darwin%20Options">Darwin Options</a>,Up: <a rel="up" accesskey="u" href="Submodel-Options.html#Submodel%20Options">Submodel Options</a><hr><br></div><h3 class="subsection">MIPS Options</h4> <dl> <br><dt><code>-EB</code> <dd>Generate big-endian code. <br><dt><code>-EL</code> <dd>Generate little-endian code. This is the default for <code>mips*el-*-*</code>configurations. <br><dt><code>-march=</code><var>arch</var><code></code> <dd>Generate code that will run on <var>arch</var>, which can be the name of ageneric MIPS ISA, or the name of a particular processor. The ISA names are:<code>mips1</code>, <code>mips2</code>, <code>mips3</code>, <code>mips4</code>,<code>mips32</code>, <code>mips32r2</code>, and <code>mips64</code>. The processor names are:<code>4kc</code>, <code>4kp</code>, <code>5kc</code>, <code>20kc</code>,<code>m4k</code>,<code>r2000</code>, <code>r3000</code>, <code>r3900</code>, <code>r4000</code>, <code>r4400</code>,<code>r4600</code>, <code>r4650</code>, <code>r6000</code>, <code>r8000</code>, <code>rm7000</code>,<code>rm9000</code>,<code>orion</code>,<code>sb1</code>,<code>vr4100</code>, <code>vr4111</code>, <code>vr4120</code>, <code>vr4130</code>, <code>vr4300</code>,<code>vr5000</code>, <code>vr5400</code> and <code>vr5500</code>. The special value <code>from-abi</code> selects themost compatible architecture for the selected ABI (that is,<code>mips1</code> for 32-bit ABIs and <code>mips3</code> for 64-bit ABIs). <p>In processor names, a final <code>000</code> can be abbreviated as <code>k</code>(for example, <code>-march=r2k</code>). Prefixes are optional, and<code>vr</code> may be written <code>r</code>. <p>GCC defines two macros based on the value of this option. The firstis <code>_MIPS_ARCH</code>, which gives the name of target architecture, asa string. The second has the form <code>_MIPS_ARCH_</code><var>foo</var><code></code>,where <var>foo</var> is the capitalized value of <code>_MIPS_ARCH</code>. For example, <code>-march=r2000</code> will set <code>_MIPS_ARCH</code>to <code>"r2000"</code> and define the macro <code>_MIPS_ARCH_R2000</code>. <p>Note that the <code>_MIPS_ARCH</code> macro uses the processor names givenabove. In other words, it will have the full prefix and will notabbreviate <code>000</code> as <code>k</code>. In the case of <code>from-abi</code>,the macro names the resolved architecture (either <code>"mips1"</code> or<code>"mips3"</code>). It names the default architecture when no<code>-march</code> option is given. <br><dt><code>-mtune=</code><var>arch</var><code></code> <dd>Optimize for <var>arch</var>. Among other things, this option controlsthe way instructions are scheduled, and the perceived cost of arithmeticoperations. The list of <var>arch</var> values is the same as for<code>-march</code>. <p>When this option is not used, GCC will optimize for the processorspecified by <code>-march</code>. By using <code>-march</code> and<code>-mtune</code> together, it is possible to generate code that willrun on a family of processors, but optimize the code for oneparticular member of that family. <p><code>-mtune</code> defines the macros <code>_MIPS_TUNE</code> and<code>_MIPS_TUNE_</code><var>foo</var><code></code>, which work in the same way as the<code>-march</code> ones described above. <br><dt><code>-mips1</code> <dd>Equivalent to <code>-march=mips1</code>. <br><dt><code>-mips2</code> <dd>Equivalent to <code>-march=mips2</code>. <br><dt><code>-mips3</code> <dd>Equivalent to <code>-march=mips3</code>. <br><dt><code>-mips4</code> <dd>Equivalent to <code>-march=mips4</code>. <br><dt><code>-mips32</code> <dd>Equivalent to <code>-march=mips32</code>. <br><dt><code>-mips32r2</code> <dd>Equivalent to <code>-march=mips32r2</code>. <br><dt><code>-mips64</code> <dd>Equivalent to <code>-march=mips64</code>. <br><dt><code>-mips16</code> <dd><dt><code>-mno-mips16</code> <dd>Use (do not use) the MIPS16 ISA. <br><dt><code>-mabi=32</code> <dd><dt><code>-mabi=o64</code> <dd><dt><code>-mabi=n32</code> <dd><dt><code>-mabi=64</code> <dd><dt><code>-mabi=eabi</code> <dd>Generate code for the given ABI. <p>Note that the EABI has a 32-bit and a 64-bit variant. GCC normallygenerates 64-bit code when you select a 64-bit architecture, but youcan use <code>-mgp32</code> to get 32-bit code instead. <p>For information about the O64 ABI, see<a href="http://gcc.gnu.org/projects/mipso64-abi.html">http://gcc.gnu.org/projects/mipso64-abi.html</a>. <br><dt><code>-mabicalls</code> <dd><dt><code>-mno-abicalls</code> <dd>Generate (do not generate) SVR4-style position-independent code. <code>-mabicalls</code> is the default for SVR4-based systems. <br><dt><code>-mxgot</code> <dd><dt><code>-mno-xgot</code> <dd>Lift (do not lift) the usual restrictions on the size of the globaloffset table. <p>GCC normally uses a single instruction to load values from the GOT. While this is relatively efficient, it will only work if the GOTis smaller than about 64k. Anything larger will cause the linkerto report an error such as: <pre class="smallexample"> relocation truncated to fit: R_MIPS_GOT16 foobar </pre> <p>If this happens, you should recompile your code with <code>-mxgot</code>. It should then work with very large GOTs, although it will also beless efficient, since it will take three instructions to fetch thevalue of a global symbol. <p>Note that some linkers can create multiple GOTs. If you have such alinker, you should only need to use <code>-mxgot</code> when a single objectfile accesses more than 64k's worth of GOT entries. Very few do. <p>These options have no effect unless GCC is generating positionindependent code. <br><dt><code>-mgp32</code> <dd>Assume that general-purpose registers are 32 bits wide. <br><dt><code>-mgp64</code> <dd>Assume that general-purpose registers are 64 bits wide. <br><dt><code>-mfp32</code> <dd>Assume that floating-point registers are 32 bits wide. <br><dt><code>-mfp64</code> <dd>Assume that floating-point registers are 64 bits wide. <br><dt><code>-mhard-float</code> <dd>Use floating-point coprocessor instructions.⌨️ 快捷键说明
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