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<html lang="en"><head><title>Using the GNU Compiler Collection (GCC)</title><meta http-equiv="Content-Type" content="text/html"><meta name="description" content="Using the GNU Compiler Collection (GCC)"><meta name="generator" content="makeinfo 4.6"><!--Copyright © 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. <p>Permission is granted to copy, distribute and/or modify this documentunder the terms of the GNU Free Documentation License, Version 1.2 orany later version published by the Free Software Foundation; with theInvariant Sections being "GNU General Public License" and "FundingFree Software", the Front-Cover texts being (a) (see below), and withthe Back-Cover Texts being (b) (see below). A copy of the license isincluded in the section entitled "GNU Free Documentation License". <p>(a) The FSF's Front-Cover Text is: <p>A GNU Manual <p>(b) The FSF's Back-Cover Text is: <p>You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development.--><meta http-equiv="Content-Style-Type" content="text/css"><style type="text/css"><!-- pre.display { font-family:inherit } pre.format { font-family:inherit } pre.smalldisplay { font-family:inherit; font-size:smaller } pre.smallformat { font-family:inherit; font-size:smaller } pre.smallexample { font-size:smaller } pre.smalllisp { font-size:smaller }--></style></head><body><div class="node"><p>Node: <a name="TMS320C3x%2fC4x%20Options">TMS320C3x/C4x Options</a>,Next: <a rel="next" accesskey="n" href="V850-Options.html#V850%20Options">V850 Options</a>,Previous: <a rel="previous" accesskey="p" href="System-V-Options.html#System%20V%20Options">System V Options</a>,Up: <a rel="up" accesskey="u" href="Submodel-Options.html#Submodel%20Options">Submodel Options</a><hr><br></div><h3 class="subsection">TMS320C3x/C4x Options</h4><p>These <code>-m</code> options are defined for TMS320C3x/C4x implementations: <dl> <br><dt><code>-mcpu=</code><var>cpu_type</var><code></code> <dd>Set the instruction set, register set, and instruction schedulingparameters for machine type <var>cpu_type</var>. Supported values for<var>cpu_type</var> are <code>c30</code>, <code>c31</code>, <code>c32</code>, <code>c40</code>, and<code>c44</code>. The default is <code>c40</code> to generate code for theTMS320C40. <br><dt><code>-mbig-memory</code> <dd><dt><code>-mbig</code> <dd><dt><code>-msmall-memory</code> <dd><dt><code>-msmall</code> <dd>Generates code for the big or small memory model. The small memorymodel assumed that all data fits into one 64K word page. At run-timethe data page (DP) register must be set to point to the 64K pagecontaining the .bss and .data program sections. The big memory model isthe default and requires reloading of the DP register for every directmemory access. <br><dt><code>-mbk</code> <dd><dt><code>-mno-bk</code> <dd>Allow (disallow) allocation of general integer operands into the blockcount register BK. <br><dt><code>-mdb</code> <dd><dt><code>-mno-db</code> <dd>Enable (disable) generation of code using decrement and branch,DBcond(D), instructions. This is enabled by default for the C4x. To beon the safe side, this is disabled for the C3x, since the maximumiteration count on the C3x is 2^23 + 1 (but who iterates loops more than2^23 times on the C3x?). Note that GCC will try to reverse a loop sothat it can utilize the decrement and branch instruction, but will giveup if there is more than one memory reference in the loop. Thus a loopwhere the loop counter is decremented can generate slightly moreefficient code, in cases where the RPTB instruction cannot be utilized. <br><dt><code>-mdp-isr-reload</code> <dd><dt><code>-mparanoid</code> <dd>Force the DP register to be saved on entry to an interrupt serviceroutine (ISR), reloaded to point to the data section, and restored onexit from the ISR. This should not be required unless someone hasviolated the small memory model by modifying the DP register, say withinan object library. <br><dt><code>-mmpyi</code> <dd><dt><code>-mno-mpyi</code> <dd>For the C3x use the 24-bit MPYI instruction for integer multipliesinstead of a library call to guarantee 32-bit results. Note that if oneof the operands is a constant, then the multiplication will be performedusing shifts and adds. If the <code>-mmpyi</code> option is not specified for the C3x,then squaring operations are performed inline instead of a library call. <br><dt><code>-mfast-fix</code> <dd><dt><code>-mno-fast-fix</code> <dd>The C3x/C4x FIX instruction to convert a floating point value to aninteger value chooses the nearest integer less than or equal to thefloating point value rather than to the nearest integer. Thus if thefloating point number is negative, the result will be incorrectlytruncated an additional code is necessary to detect and correct thiscase. This option can be used to disable generation of the additionalcode required to correct the result. <br><dt><code>-mrptb</code> <dd><dt><code>-mno-rptb</code> <dd>Enable (disable) generation of repeat block sequences using the RPTBinstruction for zero overhead looping. The RPTB construct is only usedfor innermost loops that do not call functions or jump across the loopboundaries. There is no advantage having nested RPTB loops due to theoverhead required to save and restore the RC, RS, and RE registers. This is enabled by default with <code>-O2</code>. <br><dt><code>-mrpts=</code><var>count</var><code></code> <dd><dt><code>-mno-rpts</code> <dd>Enable (disable) the use of the single instruction repeat instructionRPTS. If a repeat block contains a single instruction, and the loopcount can be guaranteed to be less than the value <var>count</var>, GCC willemit a RPTS instruction instead of a RPTB. If no value is specified,then a RPTS will be emitted even if the loop count cannot be determinedat compile time. Note that the repeated instruction following RPTS doesnot have to be reloaded from memory each iteration, thus freeing up theCPU buses for operands. However, since interrupts are blocked by thisinstruction, it is disabled by default. <br><dt><code>-mloop-unsigned</code> <dd><dt><code>-mno-loop-unsigned</code> <dd>The maximum iteration count when using RPTS and RPTB (and DB on the C40)is 2^31 + 1 since these instructions test if the iteration count isnegative to terminate the loop. If the iteration count is unsignedthere is a possibility than the 2^31 + 1 maximum iteration count may beexceeded. This switch allows an unsigned iteration count. <br><dt><code>-mti</code> <dd>Try to emit an assembler syntax that the TI assembler (asm30) is happywith. This also enforces compatibility with the API employed by the TIC3x C compiler. For example, long doubles are passed as structuresrather than in floating point registers. <br><dt><code>-mregparm</code> <dd><dt><code>-mmemparm</code> <dd>Generate code that uses registers (stack) for passing arguments to functions. By default, arguments are passed in registers where possible ratherthan by pushing arguments on to the stack. <br><dt><code>-mparallel-insns</code> <dd><dt><code>-mno-parallel-insns</code> <dd>Allow the generation of parallel instructions. This is enabled bydefault with <code>-O2</code>. <br><dt><code>-mparallel-mpy</code> <dd><dt><code>-mno-parallel-mpy</code> <dd>Allow the generation of MPY||ADD and MPY||SUB parallel instructions,provided <code>-mparallel-insns</code> is also specified. These instructions havetight register constraints which can pessimize the code generationof large functions. </dl> </body></html>⌨️ 快捷键说明
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