optimize-options.html

自己收集的linux入门到学懂高级编程书集 包括linux程序设计第三版

abstract measurement of function's size.  In no way, it represents a count
of assembly instructions and as such its exact meaning might change from one
release to an another.

     <br><dt><code>-fkeep-inline-functions</code>
     <dd>Even if all calls to a given function are integrated, and the function
is declared <code>static</code>, nevertheless output a separate run-time
callable version of the function.  This switch does not affect
<code>extern inline</code> functions.

     <br><dt><code>-fkeep-static-consts</code>
     <dd>Emit variables declared <code>static const</code> when optimization isn't turned
on, even if the variables aren't referenced.

     <p>GCC enables this option by default.  If you want to force the compiler to
check if the variable was referenced, regardless of whether or not
optimization is turned on, use the <code>-fno-keep-static-consts</code> option.

     <br><dt><code>-fmerge-constants</code>
     <dd>Attempt to merge identical constants (string constants and floating point
constants) across compilation units.

     <p>This option is the default for optimized compilation if the assembler and
linker support it.  Use <code>-fno-merge-constants</code> to inhibit this
behavior.

     <p>Enabled at levels <code>-O</code>, <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fmerge-all-constants</code>
     <dd>Attempt to merge identical constants and identical variables.

     <p>This option implies <code>-fmerge-constants</code>.  In addition to
<code>-fmerge-constants</code> this considers e.g. even constant initialized
arrays or initialized constant variables with integral or floating point
types.  Languages like C or C++ require each non-automatic variable to
have distinct location, so using this option will result in non-conforming
behavior.

     <br><dt><code>-fnew-ra</code>
     <dd>Use a graph coloring register allocator.  Currently this option is meant
only for testing.  Users should not specify this option, since it is not
yet ready for production use.

     <br><dt><code>-fno-branch-count-reg</code>
     <dd>Do not use "decrement and branch" instructions on a count register,
but instead generate a sequence of instructions that decrement a
register, compare it against zero, then branch based upon the result. 
This option is only meaningful on architectures that support such
instructions, which include x86, PowerPC, IA-64 and S/390.

     <p>The default is <code>-fbranch-count-reg</code>, enabled when
<code>-fstrength-reduce</code> is enabled.

     <br><dt><code>-fno-function-cse</code>
     <dd>Do not put function addresses in registers; make each instruction that
calls a constant function contain the function's address explicitly.

     <p>This option results in less efficient code, but some strange hacks
that alter the assembler output may be confused by the optimizations
performed when this option is not used.

     <p>The default is <code>-ffunction-cse</code>

     <br><dt><code>-fno-zero-initialized-in-bss</code>
     <dd>If the target supports a BSS section, GCC by default puts variables that
are initialized to zero into BSS.  This can save space in the resulting
code.

     <p>This option turns off this behavior because some programs explicitly
rely on variables going to the data section.  E.g., so that the
resulting executable can find the beginning of that section and/or make
assumptions based on that.

     <p>The default is <code>-fzero-initialized-in-bss</code>.

     <br><dt><code>-fstrength-reduce</code>
     <dd>Perform the optimizations of loop strength reduction and
elimination of iteration variables.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fthread-jumps</code>
     <dd>Perform optimizations where we check to see if a jump branches to a
location where another comparison subsumed by the first is found.  If
so, the first branch is redirected to either the destination of the
second branch or a point immediately following it, depending on whether
the condition is known to be true or false.

     <p>Enabled at levels <code>-O</code>, <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fcse-follow-jumps</code>
     <dd>In common subexpression elimination, scan through jump instructions
when the target of the jump is not reached by any other path.  For
example, when CSE encounters an <code>if</code> statement with an
<code>else</code> clause, CSE will follow the jump when the condition
tested is false.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fcse-skip-blocks</code>
     <dd>This is similar to <code>-fcse-follow-jumps</code>, but causes CSE to
follow jumps which conditionally skip over blocks.  When CSE
encounters a simple <code>if</code> statement with no else clause,
<code>-fcse-skip-blocks</code> causes CSE to follow the jump around the
body of the <code>if</code>.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-frerun-cse-after-loop</code>
     <dd>Re-run common subexpression elimination after loop optimizations has been
performed.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-frerun-loop-opt</code>
     <dd>Run the loop optimizer twice.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fgcse</code>
     <dd>Perform a global common subexpression elimination pass. 
This pass also performs global constant and copy propagation.

     <p><em>Note:</em> When compiling a program using computed gotos, a GCC
extension, you may get better runtime performance if you disable
the global common subexpression elimination pass by adding
<code>-fno-gcse</code> to the command line.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fgcse-lm</code>
     <dd>When <code>-fgcse-lm</code> is enabled, global common subexpression elimination will
attempt to move loads which are only killed by stores into themselves.  This
allows a loop containing a load/store sequence to be changed to a load outside
the loop, and a copy/store within the loop.

     <p>Enabled by default when gcse is enabled.

     <br><dt><code>-fgcse-sm</code>
     <dd>When <code>-fgcse-sm</code> is enabled, a store motion pass is run after
global common subexpression elimination.  This pass will attempt to move
stores out of loops.  When used in conjunction with <code>-fgcse-lm</code>,
loops containing a load/store sequence can be changed to a load before
the loop and a store after the loop.

     <p>Enabled by default when gcse is enabled.

     <br><dt><code>-fgcse-las</code>
     <dd>When <code>-fgcse-las</code> is enabled, the global common subexpression
elimination pass eliminates redundant loads that come after stores to the
same memory location (both partial and full redundancies).

     <p>Enabled by default when gcse is enabled.

     <br><dt><code>-floop-optimize</code>
     <dd>Perform loop optimizations: move constant expressions out of loops, simplify
exit test conditions and optionally do strength-reduction and loop unrolling as
well.

     <p>Enabled at levels <code>-O</code>, <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fcrossjumping</code>
     <dd>Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
resulting code may or may not perform better than without cross-jumping.

     <p>Enabled at levels <code>-O</code>, <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fif-conversion</code>
     <dd>Attempt to transform conditional jumps into branch-less equivalents.  This
include use of conditional moves, min, max, set flags and abs instructions, and
some tricks doable by standard arithmetics.  The use of conditional execution
on chips where it is available is controlled by <code>if-conversion2</code>.

     <p>Enabled at levels <code>-O</code>, <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fif-conversion2</code>
     <dd>Use conditional execution (where available) to transform conditional jumps into
branch-less equivalents.

     <p>Enabled at levels <code>-O</code>, <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fdelete-null-pointer-checks</code>
     <dd>Use global dataflow analysis to identify and eliminate useless checks
for null pointers.  The compiler assumes that dereferencing a null
pointer would have halted the program.  If a pointer is checked after
it has already been dereferenced, it cannot be null.

     <p>In some environments, this assumption is not true, and programs can
safely dereference null pointers.  Use
<code>-fno-delete-null-pointer-checks</code> to disable this optimization
for programs which depend on that behavior.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fexpensive-optimizations</code>
     <dd>Perform a number of minor optimizations that are relatively expensive.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-foptimize-register-move</code>
     <dd><dt><code>-fregmove</code>
     <dd>Attempt to reassign register numbers in move instructions and as
operands of other simple instructions in order to maximize the amount of
register tying.  This is especially helpful on machines with two-operand
instructions.

     <p>Note <code>-fregmove</code> and <code>-foptimize-register-move</code> are the same
optimization.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fdelayed-branch</code>
     <dd>If supported for the target machine, attempt to reorder instructions
to exploit instruction slots available after delayed branch
instructions.

     <p>Enabled at levels <code>-O</code>, <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fschedule-insns</code>
     <dd>If supported for the target machine, attempt to reorder instructions to
eliminate execution stalls due to required data being unavailable.  This
helps machines that have slow floating point or memory load instructions
by allowing other instructions to be issued until the result of the load
or floating point instruction is required.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fschedule-insns2</code>
     <dd>Similar to <code>-fschedule-insns</code>, but requests an additional pass of
instruction scheduling after register allocation has been done.  This is
especially useful on machines with a relatively small number of
registers and where memory load instructions take more than one cycle.

     <p>Enabled at levels <code>-O2</code>, <code>-O3</code>, <code>-Os</code>.

     <br><dt><code>-fno-sched-interblock</code>
     <dd>Don't schedule instructions across basic blocks.  This is normally
enabled by default when scheduling before register allocation, i.e. 
with <code>-fschedule-insns</code> or at <code>-O2</code> or higher.

     <br><dt><code>-fno-sched-spec</code>
     <dd>Don't allow speculative motion of non-load instructions.  This is normally
enabled by default when scheduling before register allocation, i.e. 
with <code>-fschedule-insns</code> or at <code>-O2</code> or higher.

     <br><dt><code>-fsched-spec-load</code>
     <dd>Allow speculative motion of some load instructions.  This only makes
sense when scheduling before register allocation, i.e. with
<code>-fschedule-insns</code> or at <code>-O2</code> or higher.

     <br><dt><code>-fsched-spec-load-dangerous</code>
     <dd>Allow speculative motion of more load instructions.  This only makes
sense when scheduling before register allocation, i.e. with
<code>-fschedule-insns</code> or at <code>-O2</code> or higher.

     <br><dt><code>-fsched-stalled-insns=</code><var>n</var><code></code>
     <dd>Define how many insns (if any) can be moved prematurely from the queue
of stalled insns into the ready list, during the second scheduling pass.

     <br><dt><code>-fsched-stalled-insns-dep=</code><var>n</var><code></code>
     <dd>Define how many insn groups (cycles) will be examined for a dependency
on a stalled insn that is candidate for premature removal from the queue
of stalled insns.  Has an effect only during the second scheduling pass,
and only if <code>-fsched-stalled-insns</code> is used and its value is not zero.

     <br><dt><code>-fsched2-use-superblocks</code>