bsc_init.src

Renesas(Hitachi SuperH)SH7708的UCOS2源码,uC/OS-II 版本2.52.

;   .SECTION        bsc,CODE,ALIGN=4

	.include		"bsc_init.h"

     .export         _bsc_init


_bsc_init:
	mov.l	#bcr1, r1	; BCR1 address -> R1
	mov.w 	#bcr1_d, r0	; BCR1 data    -> R0
	mov.w	r0, @r1		; BCR1 set
;
	mov.l	#bcr2, r1	; BCR2 address -> R1
	mov.w 	#bcr2_d, r0	; BCR2 data    -> R0
	mov.w	r0, @r1		; BCR2 set
;
	mov.l	#bcr3, r1	; BCR3 address -> R1
	mov.w 	#bcr3_d, r0	; BCR3 data    -> R0
	mov.w	r0, @r1		; BCR3 set
;
	mov.l	#wcr1, r1	; WCR1 address  -> R1
	mov.w 	#wcr1_d, r0	; WCR1 data     -> R0
	mov.w	r0, @r1		; WCR1 set
;
	mov.l	#wcr2, r1	; WCR2 address  -> R1
	mov.w 	#wcr2_d, r0	; WCR2 data     -> R0
	mov.w	r0, @r1		; WCR2 set
;
	mov.l	#mcr, r1	; MCR address  -> R1
	mov.w 	#mcr_d, r0	; MCR data     -> R0
	mov.w	r0, @r1		; MCR set
;
	mov.l	#dcr, r1	; DCR address  -> R1
	mov.w 	#dcr_d, r0	; DCR data     -> R0
	mov.w	r0, @r1		; DCR set
;
	mov.l	#pcr, r1	; PCR address  -> R1
	mov.w 	#pcr_d, r0	; PCR data     -> R0
	mov.w	r0, @r1		; PCR set
;
	mov.l	#rtcsr, r1	; RTCSR address  -> R1
	mov.w 	#rtcsr_d, r0	; RTCSR data     -> R0
	mov.w	r0, @r1		; RTCSR set
;
	mov.l	#rtcnt, r1	; RTCNT address  -> R1
	mov.w 	#rtcnt_d, r0	; RTCNT data     -> R0
	mov.w	r0, @r1		; RTCNT set
;
	mov.l	#rtcor, r1	; RTCOR address  -> R1
	mov.w 	#rtcor_d, r0	; RTCOR data     -> R0
	mov.w	r0, @r1		; RTCOR set
;
	mov.l	#rfcr, r1	; RFCR address  -> R1
	mov.w 	#rfcr_d, r0	; RFCR data     -> R0
	mov.w	r0, @r1		; RFCR set

bsc_loop1:
	mov.w	@r1, r2		;
	extu.w	r2, r2		;
	mov		#h'08, r5	;
	cmp/ge	r5, r2
	bf	bsc_loop1		;

;
	mov.l	#sdmr_d, r1	; RFCR address  -> R1
	mov.b	r0, @r1		; RFCR set

	rts
	nop					;
	.end