📄 ww25.vhd
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Library ieee;
Use ieee.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Entity ww25 is
Port(clk: in std_logic;
clk1: in std_logic;
md1: in std_logic;
md2: in std_logic;
md3: in std_logic;
md4: in std_logic;
set1: in std_logic_vector(3 downto 0);
set2: in std_logic_vector(3 downto 0);
speak1: out std_logic;
hour1: out std_logic_vector(3 downto 0);
hour2: out std_logic_vector(3 downto 0);
min1: out std_logic_vector(3 downto 0);
min2: out std_logic_vector(3 downto 0);
sec1: out std_logic_vector(3 downto 0);
sec2: out std_logic_vector(3 downto 0));
end ww25;
architecture ww25_arch of ww25 is
signal speak: std_logic;
signal judge: std_logic;
signal clk2: std_logic;
signal h1: std_logic_vector(3 downto 0);
signal h2: std_logic_vector(3 downto 0);
signal m1: std_logic_vector(3 downto 0);
signal m2: std_logic_vector(3 downto 0);
signal s1: std_logic_vector(3 downto 0);
signal s2: std_logic_vector(3 downto 0);
signal seth1: std_logic_vector(3 downto 0);
signal seth2: std_logic_vector(3 downto 0);
signal setm1: std_logic_vector(3 downto 0);
signal setm2: std_logic_vector(3 downto 0);
begin
h1p: process(clk,set1,md1,md2,md3)
begin
if (clk'event and clk='1') then
if ( h1="0010" and h2="0011")and (m1="0101" and m2="1001") and (s1="0101" and s2="1001") then
h1<="0000";
elsif (md1='0' and md2='0'and md3='1')then
h1<=set1;
elsif( h2="1001") and (m1="0101" and m2="1001") and (s1="0101" and s2="1001") then
h1<= h1+1;
end if;
end if;
end process h1p;
h2p:process(clk,set2,md1,md2,md3)
begin
if(clk'event and clk='1')then
if(h1="0010"and h2="0011")and(m1="0101"and m2="1001")and(s1="0101"and s2="1001")then
h2<="0000";
elsif(h2="1001"and(m1="0101"and m2="1001")and(s1="0101"and s2="1001"))then
h2<="0000";
elsif(md1='0'and md2='0'and md3='1')then
h2<=set2;
elsif (m1="0101"and m2="1001")and(s1="0101"and s2="1001")then
h2<=h2+1;
end if;
end if;
end process h2p;
m1p:process(clk,set1,md1,md2,md3)
begin
if(clk'event and clk='1')then
if(m1="0101"and m2="1001")and(s1="0101"and s2="1001")then
m1<="0000";
elsif(md1='0'and md2='1'and md3='0')then
m1<=set1;
elsif m2="1001"and (s1="0101"and s2="1001")then
m1<=m1+1;
end if;
end if;
end process m1p;
m2p:process(clk,set2,md1,md2,md3)
begin
if(clk'event and clk='1')then
if(m2="1001"and s1="0101"and s2="1001")then
m2<="0000";
elsif(md1='0'and md2='1'and md3='0')then
m2<=set2;
elsif s1="0101"and s2="1001"then
m2<=m2+1;
end if;
end if;
end process m2p;
s1p:process(clk)
begin
if(clk'event and clk='1')then
if(s1="0101"and s2="1001")then
s1<="0000";
elsif s2="1001"then
s1<=s1+1;
end if;
end if;
end process s1p;
s2p:process(clk)
begin
if(clk'event and clk='1')then
if s2="1001"then
s2<="0000";
else
s2<=s2+1;
end if;
end if;
end process s2p;
clkset:process(clk,md1,md2,md3)
begin
if(clk'event and clk='1')then
if md1='1' and md2='0' and md3='1'then
seth1<=set1;
seth2<=set2;
judge<='1';
elsif (md1='0' and md2='1'and md3='1')then
judge<='0';
elsif md1='1'and md2='1'and md3='0'then
setm1<=set1;
setm2<=set2;
end if;
end if;
end process clkset;
fenpin:process(clk,clk1)
begin
if clk1'event and clk1='1'then
if clk2='0'then
clk2<='1';
elsif clk2='1'then
clk2<='0';
end if;
end if;
end process fenpin;
speaker:process(clk,clk1)
begin
if(seth1=h1 and seth2=h2 and setm1=m1 and setm2=m2 and judge='1'and md4='0')then
speak<=clk2;
elsif(seth1=h1 and seth2=h2 and setm1=m1 and setm2=m2 and judge='1'and md4='1')then
speak<='0';
elsif (m1="0101"and m2="1001"and s1="0101")then
if s2="0001"then
speak<=clk2;
elsif s2="0010"then
speak<='0';
elsif s2="0011"then
speak<=clk2;
elsif s2="0100"then
speak<='0';
elsif s2="0101"then
speak<=clk2;
elsif s2="0110"then
speak<='0';
elsif s2="0111"then
speak<=clk2;
elsif s2="1000"then
speak<='0';
elsif s2="1001"then
speak<=clk1;
end if;
end if;
speak1<=speak;
end process speaker;
vision:process(clk)
begin
if md1='0'then
hour1<=h1;
hour2<=h2;
min1<=m1;
min2<=m2;
sec1<=s1;
sec2<=s2;
elsif md1='1'then
hour1<=seth1;
hour2<=seth2;
min1<=setm1;
min2<=setm2;
sec1<="0000";
sec2<="0000";
end if;
end process vision;
end;
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