alu.cpp

改进的基于6个mips核的NOC网络

/*
 *  TU Eindhoven
 *  Eindhoven, The Netherlands
 *
 *  Name            :   alu.cc
 *
 *  Author          :   Sander Stuijk ([e-mail])
 *
 *  Date            :   July 23, 2002
 *
 *  Function        :   Arithmetic  Logic Unit
 *
 *  History         :
 *      23-07-02    :   Initial version.
 *      13-12-02    :   Synthesizable version [e-mail]
 *      15-12-04    :   Multiply instruction version Jose Prats - [e-mail]
 *
 */

#include "alu.h"
 
void ALU::alu_thread()
{
	sc_bv<DWORD> 			result;
	sc_bv<1> 				zero, sign;
	sc_uint<DWORD> 			s;
	sc_uint<DWORD> 			t;
	sc_uint<W_ALUCTRL>		ctrl_t;
	sc_bv<2> sign2(0);
	sc_bv<8> sign8(0);
	
	//-> while (true) {
		#ifdef VERBOSE
			clog << "ALU" << endl;
		#endif
		
		// Read the inputs
		s = a.read();
		t = b.read();
		ctrl_t = ctrl.read();

		result = 0;
		// Calculate result using selected operation
		switch (ctrl_t) {
			case 0x0:	// And
						result = s & t;
						break;

			case 0x1:	// Or
						result = s | t;
						break;

			case 0x2:	// Add
						result = sc_int<DWORD>(s) + sc_int<DWORD>(t);
						break;

			case 0x3:	// Add unsigned
						result = s + t;
						break;
						
			case 0x4:	// Xor
						result = s ^ t;
						break;
						
			case 0x6:	// Subtract unsigned 
						result = s - t;
						break;

			case 0x7:	// Set-on-less-than
						if (sc_int<DWORD>(s) < sc_int<DWORD>(t))
							result = 1;
						else
							result = 0;
						break;
			
			case 0x8:	// Set-on-less-than unsigned
						if (s < t)
							result = 1;
						else
							result = 0;
						break;
			
			case 0x9:	// Load upper immediate
						result = t << 16;
						break;
			
			case 0xA:	// SLL (1 bit)
						result = t << 1;
						break;

			case 0xB:	// SLL (2 bit)
						result = t << 2;
						break;
						
			case 0xC:	// SLL (8 bit)
						result = t << 8;
						break;

			case 0xD:	// SRL (1 bit)
						result = t >> 1;
						break;

			case 0xE:	// SRL (2 bit)
						result = t >> 2;
						break;

			case 0xF:	// SRL (8 bit)
						result = t >> 8;
						break;

			case 0x10:	// SRA (1 bit)
						sign = t.range(DWORD-1,DWORD-1);
						result = t >> 1;
						result.range(DWORD-1,DWORD-1) = sign;
						break;

			case 0x11:	// SRA (2 bit)
						sign = t.range(DWORD-1,DWORD-1);
						result = t >> 2;
						result.range(DWORD-1,DWORD-2) = (sign, sign);
						break;

			case 0x12:	// SRA (8 bit)
						sign = t.range(DWORD-1,DWORD-1);
						result = t >> 8;
                        for(int i=0; i<8; i++) sign8[i] = sign[0];
						result.range(DWORD-1,DWORD-8) = sign8;
						break;
						
			case 0x13:	// Unsigned multiply
						result = sc_int<DWORD>(s) * sc_int<DWORD>(t);
						break;
		}

		// Calculate the zero output
		if (sc_uint<DWORD>(result) == 0)
			zero = 1;
		else
			zero = 0;

		// Write results to output
		r.write(result);
		z.write(zero);
		
		// Wait for next event
		//-> wait();
//-> 	}
}