translator_mmips.h

改进的基于6个mips核的NOC网络

/*
 *  TU Eindhoven
 *  Eindhoven, The Netherlands
 *
 *  Name            :   translator_mmips.h
 *
 *  Author          :   Jose Prats - [e-mail]
 *
 *  Date            :
 *
 *  Function        :
 *
 */

#ifndef TRANSLATOR_MMIPS_H_INCLUDED
#define TRANSLATOR_MMIPS_H_INCLUDED

#include <systemc.h>
#include "mips.h"

SC_MODULE(TRANSLATOR_MMIPS)
{
  // translator has a regular memory interface
  sc_in< bool > clk;
  sc_in<bool> rst;
  
  //Definitions of Control Words and control signal to send to the NI to control the memory node
  sc_bv<16> control_CW_store;
  sc_bv<16> control_CWeop_store;
  sc_bv<16> control_CW_load;
  sc_bv<16> control_CWeop_load;

  sc_bv<32> CW;
  sc_bv<32> CWeop;
 
  // input signals for the mudule.
  // current node's address 

  sc_int<8> rel_xaddr;
  sc_int<8> rel_yaddr;
  sc_bv<8>  rel_xaddr_bit;
  sc_bv<8>  rel_yaddr_bit;

  // The memory node's address, own node address and net dimension must to be fixed. IT'S A PARAMETER TO BE PROGRAMMED
  sc_in< sc_int<8> > x_mem_addr;
  sc_in< sc_int<8> > y_mem_addr;
  sc_in< sc_int<8> > my_xaddr;
  sc_in< sc_int<8> > my_yaddr;
  sc_in < sc_int<8> > xdimension;
  sc_in < sc_int<8> > ydimension;

  sc_int<8> x_mem_addr_int;         // These signals are necessary to operate with the data
  sc_int<8> y_mem_addr_int;
  sc_int<8> my_xaddr_int;
  sc_int<8> my_yaddr_int;
  sc_int<8> xdimension_int;
  sc_int<8> ydimension_int;

   // For the device
  sc_in< bool > dev_w, dev_r;
  sc_in< sc_bv<DWORD> > dev_din;
  sc_in< bool > dev_wdata, dev_waddr;
  sc_in< bool > dev_send_eop;

  

  // For memory
  sc_in< sc_bv<2> > ram_w;
  sc_in< sc_bv<2> > ram_r;
  sc_in< sc_bv<DWORD> > ram_addr;
  sc_in< sc_bv<DWORD> > ram_din;

  sc_int<DWORD> ram_addr_int;

  sc_bv<2> ram_w_int;  // these signal are only created to be able to compare sc_bv types
  sc_bv<2> ram_r_int;

  //Signals from NI
  sc_in< sc_bv<32> > reg_data_out;
  sc_in< bool > data_rdy;
  sc_in< bool > send_rdy; 
  
  // output signals for the mudule
  // For the device
  sc_out< bool > trans_dev_w, trans_dev_r;
  sc_out< sc_bv<DWORD> > trans_dev_din;
  sc_out< bool > trans_dev_wdata, trans_dev_waddr;
  sc_out< bool > trans_dev_send_eop;  

  // For local memory
  sc_out< sc_bv<W_MEMWRITE> > local_ram_w;
  sc_out< sc_bv<W_MEMREAD> > local_ram_r;

  //For the mMIPS
  sc_out< bool > enable_mmips;  

  // Necessary to receive the response of the memory node
  sc_out < sc_bv<32> > trans_ram_dout;  // this bus will contain the data from the remote memory
  sc_out < bool > trans_remote_select;

  // Signals for the MEMDEV
  sc_out < bool > trans_send_rdy;
  sc_out < bool > trans_data_rdy;


  // internal signals
  sc_signal<bool> bufw;
  sc_signal< sc_bv<DWORD> > dev_buffer;
  sc_signal<bool> remote_select;
  sc_signal<bool> remote_select_tmp; 
  sc_signal<bool> buff_remote_select;  //that's the way to stop the sending FSM: buffering the "remote_select" signal
  
  sc_signal<bool> int_dev_wdata;
  sc_signal<bool> int_dev_waddr;
  sc_signal<bool> int_dev_w;
  sc_signal<bool> int_dev_send_eop;
  sc_signal<bool> int_ram_r;
  sc_signal<bool> int_ram_w;

  //for the FSM
  enum state_t {idle,send_addr,send_CW,send_data,wait_send_rdy_up,send_CWeop,wait_rem_mem_data,finish,wait_remote_select_down};

  sc_signal<state_t> current_state;
  sc_signal<state_t> next_state;

  sc_signal< sc_bv<DWORD> > FSMout;

  // the actual logic
  void translator_process();

  // data buffering
  void buffer();
  void remote_select_buffer();
  void translatorFSM();
  void change_state();

  SC_CTOR(TRANSLATOR_MMIPS){
        control_CW_store = "0000000000000010";
        control_CWeop_store = "0000000000010010";
        control_CW_load = "0000000000100010";
        control_CWeop_load = "0000000000110010";

       
	SC_METHOD(translator_process);
        sensitive << clk << dev_w << dev_r << dev_din << dev_wdata << dev_waddr
                        << dev_send_eop << ram_w << ram_r << ram_addr
                        << ram_din << dev_buffer;

	SC_METHOD(buffer);
	sensitive_pos << clk;

        SC_METHOD(remote_select_buffer);
	sensitive_pos << remote_select;

        SC_METHOD(translatorFSM);
	sensitive << current_state << remote_select << send_rdy << data_rdy << ram_w << ram_r << rst;

        SC_METHOD(change_state);
	sensitive_pos << clk << rst;
  }
};


#endif