cache_mainmem.cpp

改进的基于6个mips核的NOC网络

/*
 *  TU Eindhoven
 *  Eindhoven, The Netherlands
 *
 *  Name            :   cache_mainmem.cpp
 *
 *  Author          :   [e-mail]
 *
 *  Date            :   
 *
 *  Function        :   
 *
 *
 */

#include "cache_mainmem.h"

void CACHE_MAINMEM_ARBITER::select()
{  
  bool req0 = (ww0.read()||wb0.read()||r0.read()), 
    req1 = (ww1.read()||wb1.read()||r1.read());

  bool req0_reg = (ww0_reg.read()||wb0_reg.read()||r0_reg.read()), 
    req1_reg = (ww1_reg.read()||wb1_reg.read()||r1_reg.read());

  bool reg0_v=false, reg1_v=false, clr0_v=false, clr1_v=false;
  
  bool wb=false, ww=false, r=false;
  
  sc_bv<MEM_PARTITION_BITS> a_tail;
  sc_uint<MEM_PARTITION_BITS+1> address;
  sc_bv<32> mem_din_v;

  // defaults
  mem_din_v = din0_reg.read();
  a_tail = addr0_reg.read().range(MEM_PARTITION_BITS-1,0);
  address = sc_uint<MEM_PARTITION_BITS+1>(a_tail) | MEM_OFFSET_0;

  n_grant = 0; 
  
  // registered requests have priority over new ones
  if( req0_reg ){
    wb = wb0_reg.read();
    ww = ww0_reg.read();
    r = r0_reg.read();
    
    a_tail = addr0_reg.read().range(MEM_PARTITION_BITS-1,0);
    address = sc_uint<MEM_PARTITION_BITS+1>(a_tail) | MEM_OFFSET_0;
    mem_din_v =  din0_reg.read();
    
    n_grant = 1;
    
    if( req0 ) reg0_v = true; 
    else clr0_v = true;
    
    if( req1 ) reg1_v = true;
  }
  else if( req1_reg ){
    wb = wb1_reg.read();
    ww = ww1_reg.read();
    r = r1_reg.read();
    
    a_tail = addr1_reg.read().range(MEM_PARTITION_BITS-1,0);
    address = sc_uint<MEM_PARTITION_BITS+1>(a_tail) | MEM_OFFSET_1;
    mem_din_v =  din1_reg.read();
    
    n_grant = 2;

    if( req0 ) reg0_v = true;
    if( req1 ) reg1_v = true;
    else clr1_v = true;
  }
  else if( req0 ){
    wb = wb0.read();
    ww = ww0.read();
    r = r0.read();
    
    a_tail = addr0.read().range(MEM_PARTITION_BITS-1,0);
    address = sc_uint<MEM_PARTITION_BITS+1>(a_tail) | MEM_OFFSET_0;
    mem_din_v =  din0.read();
    
    n_grant = 1;

    if( req1 ) reg1_v = true;
  }
  else if( req1 ){
    wb = wb1.read();
    ww = ww1.read();
    r = r1.read();
    
    a_tail = addr1.read().range(MEM_PARTITION_BITS-1,0);
    address = sc_uint<MEM_PARTITION_BITS+1>(a_tail) | MEM_OFFSET_1;
    mem_din_v =  din1.read();
    
    n_grant = 2;

    if( req0 ) reg0_v = true;
  }
  
  reg0.write(reg0_v);
  reg1.write(reg1_v);
  clr0.write(clr0_v);
  clr1.write(clr1_v);
  
  mem_addr.write( (sc_uint<32-MEM_PARTITION_BITS-1>(0), address) );
  mem_r.write( r ); 
  mem_ww.write( ww );
  mem_wb.write( wb );
  mem_clk.write(clk.read());
  mem_din.write( sc_int<32>(mem_din_v) );
  
  rdy0.write( grant.read()[0]==true );
  rdy1.write( grant.read()[1]==true );

}

void CACHE_MAINMEM_ARBITER::output()
{
  dout.write( mem_dout.read() );
}


void CACHE_MAINMEM_ARBITER::reg()
{
  if( reg0.read() ){
    addr0_reg = addr0.read();
    din0_reg = din0.read();
    ww0_reg = ww0.read();
    wb0_reg	= wb0.read();
    r0_reg = r0.read();
  } else if( clr0.read() ){
    addr0_reg = 0;
    din0_reg = 0;
    ww0_reg = 0;
    wb0_reg = 0;
    r0_reg = 0;
  }

  if( reg1.read() ){
    addr1_reg = addr1.read();
    din1_reg = din1.read();
    ww1_reg = ww1.read();
    wb1_reg	= wb1.read();
    r1_reg = r1.read();
  } else if( clr1.read() ){
    addr1_reg = 0;
    din1_reg = 0;
    ww1_reg = 0;
    wb1_reg = 0;
    r1_reg = 0;
  }

  grant = n_grant.read();

}