mem32k.cpp

改进的基于6个mips核的NOC网络

/*
 *  TU Eindhoven
 *  Eindhoven, The Netherlands
 *
 *  Name            :   mem32k.cpp
 *
 *  Author          :   [e-mail]
 *
 *  Date            :   
 *
 *  Function        :   32kB RAM based on VirtexII 16kb BlockRAMs
 *
 *
 */
 
#include "mem32k.h"

void MEM32K_WRAPPER::in()
{  
  
  sc_uint<13> a = addr.read().range(14,2);
  ADDR.write( a );
  
  sc_int<32> d = din.read();
  // if wb == true, we're writing the LSByte of the input word to the appropriate address
  sc_uint<2> byteno = addr.read().range(1,0);
  sc_int<8> byte = d.range(7,0);
  sc_int<2> b0=byte.range(7,6),b1=byte.range(5,4),b2=byte.range(3,2),b3=byte.range(1,0);

  bool byte_to_0 = (wb.read() && byteno==0),
	byte_to_1 = (wb.read() && byteno==1),
	byte_to_2 = (wb.read() && byteno==2),
	byte_to_3 = (wb.read() && byteno==3);
  
  // split the input data between the memory blocks
  sc_int<2> d00=d.range(31,30),d01=d.range(29,28),d02=d.range(27,26),d03=d.range(25,24),
    d04=d.range(23,22),d05=d.range(21,20),d06=d.range(19,18),d07=d.range(17,16),
    d08=d.range(15,14),d09=d.range(13,12),d10=d.range(11,10),d11=d.range(9,8),
    d12=d.range(7,6),d13=d.range(5,4),d14=d.range(3,2),d15=d.range(1,0);

  // each block gets either own bit or a bit from the written byte
  DI00.write( byte_to_0 ? b0 : d00 ); 
  DI01.write( byte_to_0 ? b1 : d01 ); 
  DI02.write( byte_to_0 ? b2 : d02 ); 
  DI03.write( byte_to_0 ? b3 : d03 ); 
  DI04.write( byte_to_1 ? b0 : d04 ); 
  DI05.write( byte_to_1 ? b1 : d05 ); 
  DI06.write( byte_to_1 ? b2 : d06 ); 
  DI07.write( byte_to_1 ? b3 : d07 ); 
  DI08.write( byte_to_2 ? b0 : d08 ); 
  DI09.write( byte_to_2 ? b1 : d09 ); 
  DI10.write( byte_to_2 ? b2 : d10 ); 
  DI11.write( byte_to_2 ? b3 : d11 ); 
  DI12.write( byte_to_3 ? b0 : d12 ); 
  DI13.write( byte_to_3 ? b1 : d13 ); 
  DI14.write( byte_to_3 ? b2 : d14 ); 
  DI15.write( byte_to_3 ? b3 : d15 ); 
  
  EN.write(r.read() || ww.read() || wb.read());
  WE0.write( ww.read() || byte_to_0 );  
  WE1.write( ww.read() || byte_to_1 );  
  WE2.write( ww.read() || byte_to_2 );  
  WE3.write( ww.read() || byte_to_3 );
  SSR.write(0);
  CLK.write(clk.read());
}

void MEM32K_WRAPPER::out()
{
  sc_int<32> dout_v;
  dout_v.range(31,30)=DO00.read();dout_v.range(29,28)=DO01.read();
  dout_v.range(27,26)=DO02.read();dout_v.range(25,24)=DO03.read();
  dout_v.range(23,22)=DO04.read();dout_v.range(21,20)=DO05.read();
  dout_v.range(19,18)=DO06.read();dout_v.range(17,16)=DO07.read();
  dout_v.range(15,14)=DO08.read();dout_v.range(13,12)=DO09.read();
  dout_v.range(11,10)=DO10.read();dout_v.range(9,8)=DO11.read();
  dout_v.range(7,6)=DO12.read();dout_v.range(5,4)=DO13.read();
  dout_v.range(3,2)=DO14.read();dout_v.range(1,0)=DO15.read();
  dout.write( dout_v );
}

////////////////////////////////////////////////////////////////////////////////////////////////////

void MEM32K_DBGWRAPPER::in()
{    
  // discard two least significant bits of the address
  sc_uint<13> addr = ADDR.read().range(14,2);  
  dADDR.write(addr);
  
  // split the input data between the memory blocks
  sc_int<32> d = DI.read();
  sc_int<2> d00=d.range(31,30),d01=d.range(29,28),d02=d.range(27,26),d03=d.range(25,24),
    d04=d.range(23,22),d05=d.range(21,20),d06=d.range(19,18),d07=d.range(17,16),
    d08=d.range(15,14),d09=d.range(13,12),d10=d.range(11,10),d11=d.range(9,8),
    d12=d.range(7,6),d13=d.range(5,4),d14=d.range(3,2),d15=d.range(1,0);

  dDI00.write(d00);dDI01.write(d01);dDI02.write(d02);dDI03.write(d03);
  dDI04.write(d04);dDI05.write(d05);dDI06.write(d06);dDI07.write(d07);
  dDI08.write(d08);dDI09.write(d09);dDI10.write(d10);dDI11.write(d11);
  dDI12.write(d12);dDI13.write(d13);dDI14.write(d14);dDI15.write(d15);

  dEN.write(EN.read());dWE.write(WE.read());dSSR.write(RST.read()); dCLK.write(CLK.read());

}

void MEM32K_DBGWRAPPER::out()
{  
  sc_int<32> dout_v;
  dout_v.range(31,30)=dDO00.read();dout_v.range(29,28)=dDO01.read();
  dout_v.range(27,26)=dDO02.read();dout_v.range(25,24)=dDO03.read();
  dout_v.range(23,22)=dDO04.read();dout_v.range(21,20)=dDO05.read();
  dout_v.range(19,18)=dDO06.read();dout_v.range(17,16)=dDO07.read();
  dout_v.range(15,14)=dDO08.read();dout_v.range(13,12)=dDO09.read();
  dout_v.range(11,10)=dDO10.read();dout_v.range(9,8)=dDO11.read();
  dout_v.range(7,6)=dDO12.read();dout_v.range(5,4)=dDO13.read();
  dout_v.range(3,2)=dDO14.read();dout_v.range(1,0)=dDO15.read();
  DO.write( dout_v );
}

#ifndef VERILOG

void MEM32K::mem_init(const char *filename, int size){
  vector<sc_int<2>* > v;
  v.push_back(bram00->memory);
  v.push_back(bram01->memory);
  v.push_back(bram02->memory);
  v.push_back(bram03->memory);
  v.push_back(bram04->memory);
  v.push_back(bram05->memory);
  v.push_back(bram06->memory);
  v.push_back(bram07->memory);
  v.push_back(bram08->memory);
  v.push_back(bram09->memory);
  v.push_back(bram10->memory);
  v.push_back(bram11->memory);
  v.push_back(bram12->memory);
  v.push_back(bram13->memory);
  v.push_back(bram14->memory);
  v.push_back(bram15->memory);
  init_memory(&v,size,filename);
}
void MEM32K::mem_dump(const char *filename, int size){
  vector<sc_int<2>* > v;
  v.push_back(bram00->memory);
  v.push_back(bram01->memory);
  v.push_back(bram02->memory);
  v.push_back(bram03->memory);
  v.push_back(bram04->memory);
  v.push_back(bram05->memory);
  v.push_back(bram06->memory);
  v.push_back(bram07->memory);
  v.push_back(bram08->memory);
  v.push_back(bram09->memory);
  v.push_back(bram10->memory);
  v.push_back(bram11->memory);
  v.push_back(bram12->memory);
  v.push_back(bram13->memory);
  v.push_back(bram14->memory);
  v.push_back(bram15->memory);
  dump_memory(&v,size,filename);
}

#endif