x86.c
来自「基于4个mips核的noc设计」· C语言 代码 · 共 2,433 行 · 第 1/5 页
C
2,433 行
/* 77 */ "%0", /* mrc1: rc *//* 78 */ "%0", /* mrc3: mem *//* 79 */ "%0", /* mrc3: rc *//* 80 */ "lea %c,%0\n", /* reg: addr *//* 81 */ "mov %c,%0\n", /* reg: mrc0 *//* 82 */ "# move\n", /* reg: LOADI1(reg) *//* 83 */ "# move\n", /* reg: LOADI2(reg) *//* 84 */ "# move\n", /* reg: LOADI4(reg) *//* 85 */ "# move\n", /* reg: LOADU1(reg) *//* 86 */ "# move\n", /* reg: LOADU2(reg) *//* 87 */ "# move\n", /* reg: LOADU4(reg) *//* 88 */ "# move\n", /* reg: LOADP4(reg) *//* 89 */ "?mov %c,%0\nadd %c,%1\n", /* reg: ADDI4(reg,mrc1) *//* 90 */ "?mov %c,%0\nadd %c,%1\n", /* reg: ADDP4(reg,mrc1) *//* 91 */ "?mov %c,%0\nadd %c,%1\n", /* reg: ADDU4(reg,mrc1) *//* 92 */ "?mov %c,%0\nsub %c,%1\n", /* reg: SUBI4(reg,mrc1) *//* 93 */ "?mov %c,%0\nsub %c,%1\n", /* reg: SUBP4(reg,mrc1) *//* 94 */ "?mov %c,%0\nsub %c,%1\n", /* reg: SUBU4(reg,mrc1) *//* 95 */ "?mov %c,%0\nand %c,%1\n", /* reg: BANDI4(reg,mrc1) *//* 96 */ "?mov %c,%0\nor %c,%1\n", /* reg: BORI4(reg,mrc1) *//* 97 */ "?mov %c,%0\nxor %c,%1\n", /* reg: BXORI4(reg,mrc1) *//* 98 */ "?mov %c,%0\nand %c,%1\n", /* reg: BANDU4(reg,mrc1) *//* 99 */ "?mov %c,%0\nor %c,%1\n", /* reg: BORU4(reg,mrc1) *//* 100 */ "?mov %c,%0\nxor %c,%1\n", /* reg: BXORU4(reg,mrc1) *//* 101 */ "inc %1\n", /* stmt: ASGNI4(addr,ADDI4(mem,con1)) *//* 102 */ "inc %1\n", /* stmt: ASGNI4(addr,ADDU4(mem,con1)) *//* 103 */ "inc %1\n", /* stmt: ASGNP4(addr,ADDP4(mem,con1)) *//* 104 */ "dec %1\n", /* stmt: ASGNI4(addr,SUBI4(mem,con1)) *//* 105 */ "dec %1\n", /* stmt: ASGNI4(addr,SUBU4(mem,con1)) *//* 106 */ "dec %1\n", /* stmt: ASGNP4(addr,SUBP4(mem,con1)) *//* 107 */ "add %1,%2\n", /* stmt: ASGNI4(addr,ADDI4(mem,rc)) *//* 108 */ "sub %1,%2\n", /* stmt: ASGNI4(addr,SUBI4(mem,rc)) *//* 109 */ "add %1,%2\n", /* stmt: ASGNU4(addr,ADDU4(mem,rc)) *//* 110 */ "sub %1,%2\n", /* stmt: ASGNU4(addr,SUBU4(mem,rc)) *//* 111 */ "and %1,%2\n", /* stmt: ASGNI4(addr,BANDI4(mem,rc)) *//* 112 */ "or %1,%2\n", /* stmt: ASGNI4(addr,BORI4(mem,rc)) *//* 113 */ "xor %1,%2\n", /* stmt: ASGNI4(addr,BXORI4(mem,rc)) *//* 114 */ "and %1,%2\n", /* stmt: ASGNU4(addr,BANDU4(mem,rc)) *//* 115 */ "or %1,%2\n", /* stmt: ASGNU4(addr,BORU4(mem,rc)) *//* 116 */ "xor %1,%2\n", /* stmt: ASGNU4(addr,BXORU4(mem,rc)) *//* 117 */ "?mov %c,%0\nnot %c\n", /* reg: BCOMI4(reg) *//* 118 */ "?mov %c,%0\nnot %c\n", /* reg: BCOMU4(reg) *//* 119 */ "?mov %c,%0\nneg %c\n", /* reg: NEGI4(reg) *//* 120 */ "not %1\n", /* stmt: ASGNI4(addr,BCOMI4(mem)) *//* 121 */ "not %1\n", /* stmt: ASGNU4(addr,BCOMU4(mem)) *//* 122 */ "neg %1\n", /* stmt: ASGNI4(addr,NEGI4(mem)) *//* 123 */ "?mov %c,%0\nsal %c,%1\n", /* reg: LSHI4(reg,con5) *//* 124 */ "?mov %c,%0\nshl %c,%1\n", /* reg: LSHU4(reg,con5) *//* 125 */ "?mov %c,%0\nsar %c,%1\n", /* reg: RSHI4(reg,con5) *//* 126 */ "?mov %c,%0\nshr %c,%1\n", /* reg: RSHU4(reg,con5) *//* 127 */ "sal %1,%2\n", /* stmt: ASGNI4(addr,LSHI4(mem,con5)) *//* 128 */ "shl %1,%2\n", /* stmt: ASGNI4(addr,LSHU4(mem,con5)) *//* 129 */ "sar %1,%2\n", /* stmt: ASGNI4(addr,RSHI4(mem,con5)) *//* 130 */ "shr %1,%2\n", /* stmt: ASGNI4(addr,RSHU4(mem,con5)) *//* 131 */ "%a", /* con5: CNSTI4 *//* 132 */ "?mov %c,%0\nmov ecx,%1\nsal %c,cl\n", /* reg: LSHI4(reg,reg) *//* 133 */ "?mov %c,%0\nmov ecx,%1\nshl %c,cl\n", /* reg: LSHU4(reg,reg) *//* 134 */ "?mov %c,%0\nmov ecx,%1\nsar %c,cl\n", /* reg: RSHI4(reg,reg) *//* 135 */ "?mov %c,%0\nmov ecx,%1\nshr %c,cl\n", /* reg: RSHU4(reg,reg) *//* 136 */ "?mov %c,%0\nimul %c,%1\n", /* reg: MULI4(reg,mrc3) *//* 137 */ "imul %c,%1,%0\n", /* reg: MULI4(con,mr) *//* 138 */ "mul %1\n", /* reg: MULU4(reg,mr) *//* 139 */ "xor edx,edx\ndiv %1\n", /* reg: DIVU4(reg,reg) *//* 140 */ "xor edx,edx\ndiv %1\n", /* reg: MODU4(reg,reg) *//* 141 */ "cdq\nidiv %1\n", /* reg: DIVI4(reg,reg) *//* 142 */ "cdq\nidiv %1\n", /* reg: MODI4(reg,reg) *//* 143 */ "mov %c,%0\n", /* reg: CVPU4(reg) *//* 144 */ "mov %c,%0\n", /* reg: CVUP4(reg) *//* 145 */ "movsx %c,byte ptr %0\n", /* reg: CVII4(INDIRI1(addr)) *//* 146 */ "movsx %c,word ptr %0\n", /* reg: CVII4(INDIRI2(addr)) *//* 147 */ "movzx %c,byte ptr %0\n", /* reg: CVUU4(INDIRU1(addr)) *//* 148 */ "movzx %c,word ptr %0\n", /* reg: CVUU4(INDIRU2(addr)) *//* 149 */ "# extend\n", /* reg: CVII4(reg) *//* 150 */ "# extend\n", /* reg: CVIU4(reg) *//* 151 */ "# extend\n", /* reg: CVUI4(reg) *//* 152 */ "# extend\n", /* reg: CVUU4(reg) *//* 153 */ "# truncate\n", /* reg: CVII1(reg) *//* 154 */ "# truncate\n", /* reg: CVII2(reg) *//* 155 */ "# truncate\n", /* reg: CVUU1(reg) *//* 156 */ "# truncate\n", /* reg: CVUU2(reg) *//* 157 */ "mov byte ptr %0,%1\n", /* stmt: ASGNI1(addr,rc) *//* 158 */ "mov word ptr %0,%1\n", /* stmt: ASGNI2(addr,rc) *//* 159 */ "mov dword ptr %0,%1\n", /* stmt: ASGNI4(addr,rc) *//* 160 */ "mov byte ptr %0,%1\n", /* stmt: ASGNU1(addr,rc) *//* 161 */ "mov word ptr %0,%1\n", /* stmt: ASGNU2(addr,rc) *//* 162 */ "mov dword ptr %0,%1\n", /* stmt: ASGNU4(addr,rc) *//* 163 */ "mov dword ptr %0,%1\n", /* stmt: ASGNP4(addr,rc) *//* 164 */ "push %0\n", /* stmt: ARGI4(mrc3) *//* 165 */ "push %0\n", /* stmt: ARGU4(mrc3) *//* 166 */ "push %0\n", /* stmt: ARGP4(mrc3) *//* 167 */ "mov ecx,%a\nrep movsb\n", /* stmt: ASGNB(reg,INDIRB(reg)) *//* 168 */ "sub esp,%a\nmov edi,esp\nmov ecx,%a\nrep movsb\n", /* stmt: ARGB(INDIRB(reg)) *//* 169 */ "qword ptr %0", /* memf: INDIRF8(addr) *//* 170 */ "dword ptr %0", /* memf: INDIRF4(addr) *//* 171 */ "dword ptr %0", /* memf: CVFF8(INDIRF4(addr)) *//* 172 */ "fld %0\n", /* reg: memf *//* 173 */ "fstp qword ptr %0\n", /* stmt: ASGNF8(addr,reg) *//* 174 */ "fstp dword ptr %0\n", /* stmt: ASGNF4(addr,reg) *//* 175 */ "fstp dword ptr %0\n", /* stmt: ASGNF4(addr,CVFF4(reg)) *//* 176 */ "sub esp,8\nfstp qword ptr [esp]\n", /* stmt: ARGF8(reg) *//* 177 */ "sub esp,4\nfstp dword ptr [esp]\n", /* stmt: ARGF4(reg) *//* 178 */ "fchs\n", /* reg: NEGF8(reg) *//* 179 */ "fchs\n", /* reg: NEGF4(reg) *//* 180 */ " %0", /* flt: memf *//* 181 */ "p st(1),st", /* flt: reg *//* 182 */ "fadd%1\n", /* reg: ADDF8(reg,flt) *//* 183 */ "fadd%1\n", /* reg: ADDF4(reg,flt) *//* 184 */ "fdiv%1\n", /* reg: DIVF8(reg,flt) *//* 185 */ "fdiv%1\n", /* reg: DIVF4(reg,flt) *//* 186 */ "fmul%1\n", /* reg: MULF8(reg,flt) *//* 187 */ "fmul%1\n", /* reg: MULF4(reg,flt) *//* 188 */ "fsub%1\n", /* reg: SUBF8(reg,flt) *//* 189 */ "fsub%1\n", /* reg: SUBF4(reg,flt) *//* 190 */ "# CVFF8\n", /* reg: CVFF8(reg) *//* 191 */ "sub esp,4\nfstp dword ptr 0[esp]\nfld dword ptr 0[esp]\nadd esp,4\n", /* reg: CVFF4(reg) *//* 192 */ "call __ftol\n", /* reg: CVFI4(reg) *//* 193 */ "fild dword ptr %0\n", /* reg: CVIF8(INDIRI4(addr)) *//* 194 */ "push %0\nfild dword ptr 0[esp]\nadd esp,4\n", /* reg: CVIF4(reg) *//* 195 */ "push %0\nfild dword ptr 0[esp]\nadd esp,4\n", /* reg: CVIF8(reg) *//* 196 */ "%a", /* addrj: ADDRGP4 *//* 197 */ "%0", /* addrj: reg *//* 198 */ "%0", /* addrj: mem *//* 199 */ "jmp %0\n", /* stmt: JUMPV(addrj) *//* 200 */ "%a:\n", /* stmt: LABELV *//* 201 */ "cmp %0,%1\nje %a\n", /* stmt: EQI4(mem,rc) *//* 202 */ "cmp %0,%1\njge %a\n", /* stmt: GEI4(mem,rc) *//* 203 */ "cmp %0,%1\njg %a\n", /* stmt: GTI4(mem,rc) *//* 204 */ "cmp %0,%1\njle %a\n", /* stmt: LEI4(mem,rc) *//* 205 */ "cmp %0,%1\njl %a\n", /* stmt: LTI4(mem,rc) *//* 206 */ "cmp %0,%1\njne %a\n", /* stmt: NEI4(mem,rc) *//* 207 */ "cmp %0,%1\njae %a\n", /* stmt: GEU4(mem,rc) *//* 208 */ "cmp %0,%1\nja %a\n", /* stmt: GTU4(mem,rc) *//* 209 */ "cmp %0,%1\njbe %a\n", /* stmt: LEU4(mem,rc) *//* 210 */ "cmp %0,%1\njb %a\n", /* stmt: LTU4(mem,rc) *//* 211 */ "cmp %0,%1\nje %a\n", /* stmt: EQI4(reg,mrc1) *//* 212 */ "cmp %0,%1\njge %a\n", /* stmt: GEI4(reg,mrc1) *//* 213 */ "cmp %0,%1\njg %a\n", /* stmt: GTI4(reg,mrc1) *//* 214 */ "cmp %0,%1\njle %a\n", /* stmt: LEI4(reg,mrc1) *//* 215 */ "cmp %0,%1\njl %a\n", /* stmt: LTI4(reg,mrc1) *//* 216 */ "cmp %0,%1\njne %a\n", /* stmt: NEI4(reg,mrc1) *//* 217 */ "cmp %0,%1\nje %a\n", /* stmt: EQU4(reg,mrc1) *//* 218 */ "cmp %0,%1\njae %a\n", /* stmt: GEU4(reg,mrc1) *//* 219 */ "cmp %0,%1\nja %a\n", /* stmt: GTU4(reg,mrc1) *//* 220 */ "cmp %0,%1\njbe %a\n", /* stmt: LEU4(reg,mrc1) *//* 221 */ "cmp %0,%1\njb %a\n", /* stmt: LTU4(reg,mrc1) *//* 222 */ "cmp %0,%1\njne %a\n", /* stmt: NEU4(reg,mrc1) *//* 223 */ " %0", /* cmpf: memf *//* 224 */ "p", /* cmpf: reg *//* 225 */ "fcomp%0\nfstsw ax\nsahf\nje %a\n", /* stmt: EQF8(cmpf,reg) *//* 226 */ "fcomp%0\nfstsw ax\nsahf\njbe %a\n", /* stmt: GEF8(cmpf,reg) *//* 227 */ "fcomp%0\nfstsw ax\nsahf\njb %a\n", /* stmt: GTF8(cmpf,reg) *//* 228 */ "fcomp%0\nfstsw ax\nsahf\njae %a\n", /* stmt: LEF8(cmpf,reg) *//* 229 */ "fcomp%0\nfstsw ax\nsahf\nja %a\n", /* stmt: LTF8(cmpf,reg) *//* 230 */ "fcomp%0\nfstsw ax\nsahf\njne %a\n", /* stmt: NEF8(cmpf,reg) *//* 231 */ "fcomp%0\nfstsw ax\nsahf\nje %a\n", /* stmt: EQF4(cmpf,reg) *//* 232 */ "fcomp%0\nfstsw ax\nsahf\njbe %a\n", /* stmt: GEF4(cmpf,reg) *//* 233 */ "fcomp%0\nfstsw ax\nsahf\njb %a\n", /* stmt: GTF4(cmpf,reg) *//* 234 */ "fcomp%0\nfstsw ax\nsahf\njae %a\n", /* stmt: LEF4(cmpf,reg) *//* 235 */ "fcomp%0\nfstsw ax\nsahf\nja %a\n", /* stmt: LTF4(cmpf,reg) *//* 236 */ "fcomp%0\nfstsw ax\nsahf\njne %a\n", /* stmt: NEF4(cmpf,reg) *//* 237 */ "call %0\nadd esp,%a\n", /* reg: CALLI4(addrj) *//* 238 */ "call %0\nadd esp,%a\n", /* reg: CALLU4(addrj) *//* 239 */ "call %0\nadd esp,%a\n", /* reg: CALLP4(addrj) *//* 240 */ "call %0\nadd esp,%a\n", /* stmt: CALLV(addrj) *//* 241 */ "call %0\nadd esp,%a\n", /* reg: CALLF4(addrj) *//* 242 */ "call %0\nadd esp,%a\n", /* reg: CALLF8(addrj) *//* 243 */ "call %0\nadd esp,%a\nfstp\n", /* stmt: CALLF4(addrj) *//* 244 */ "call %0\nadd esp,%a\nfstp\n", /* stmt: CALLF8(addrj) *//* 245 */ "# ret\n", /* stmt: RETI4(reg) *//* 246 */ "# ret\n", /* stmt: RETU4(reg) *//* 247 */ "# ret\n", /* stmt: RETP4(reg) *//* 248 */ "# ret\n", /* stmt: RETF4(reg) *//* 249 */ "# ret\n", /* stmt: RETF8(reg) */};static char _isinstruction[] = {/* 0 */ 0,/* 1 */ 1, /* # read register\n *//* 2 */ 1, /* # read register\n *//* 3 */ 1, /* # read register\n *//* 4 */ 1, /* # read register\n *//* 5 */ 1, /* # read register\n *//* 6 */ 1, /* # read register\n *//* 7 */ 1, /* # read register\n *//* 8 */ 1, /* # read register\n *//* 9 */ 1, /* # read register\n *//* 10 */ 1, /* # read register\n *//* 11 */ 1, /* # read register\n *//* 12 */ 1, /* # read register\n *//* 13 */ 1, /* # write register\n *//* 14 */ 1, /* # write register\n *//* 15 */ 1, /* # write register\n *//* 16 */ 1, /* # write register\n *//* 17 */ 1, /* # write register\n *//* 18 */ 1, /* # write register\n *//* 19 */ 1, /* # write register\n *//* 20 */ 1, /* # write register\n *//* 21 */ 1, /* # write register\n *//* 22 */ 1, /* # write register\n *//* 23 */ 1, /* # write register\n *//* 24 */ 1, /* # write register\n *//* 25 */ 0, /* %a *//* 26 */ 0, /* %a *//* 27 */ 0, /* %a *//* 28 */ 0, /* %a *//* 29 */ 0, /* %a *//* 30 */ 0, /* %a *//* 31 */ 0, /* %a *//* 32 */ 0, /* %a *//* 33 */ 0, /* %a *//* 34 */ 0, /* %a *//* 35 */ 0, /* *//* 36 */ 0, /* (%a) *//* 37 */ 0, /* (%0) *//* 38 */ 0, /* (%a) *//* 39 */ 0, /* [%0] *//* 40 */ 0, /* %1[%0] *//* 41 */ 0, /* %1[%0] *//* 42 */ 0, /* %1[%0] *//* 43 */ 0, /* (%a)[ebp] *//* 44 */ 0, /* (%a)[ebp] *//* 45 */ 0, /* %0 *//* 46 */ 0, /* %0*2 *//* 47 */ 0, /* %0*4 *//* 48 */ 0, /* %0*8 *//* 49 */ 0, /* 1 *//* 50 */ 0, /* 1 *//* 51 */ 0, /* 2 *//* 52 */ 0, /* 2 *//* 53 */ 0, /* 3 *//* 54 */ 0, /* 3 *//* 55 */ 0, /* %0*2 *//* 56 */ 0, /* %0*4 *//* 57 */ 0, /* %0*8 *//* 58 */ 0, /* %0 *//* 59 */ 0, /* %1[%0] *//* 60 */ 0, /* %1[%0] *//* 61 */ 0, /* %1[%0] *//* 62 */ 0, /* [%0] *//* 63 */ 0, /* byte ptr %0 *//* 64 */ 0, /* word ptr %0 *//* 65 */ 0, /* dword ptr %0 *//* 66 */ 0, /* byte ptr %0 *//* 67 */ 0, /* word ptr %0 *//* 68 */ 0, /* dword ptr %0 *//* 69 */ 0, /* dword ptr %0 *//* 70 */ 0, /* %0 *//* 71 */ 0, /* %0 *//* 72 */ 0, /* %0 *//* 73 */ 0, /* %0 *//* 74 */ 0, /* %0 *//* 75 */ 0, /* %0 *//* 76 */ 0, /* %0 *//* 77 */ 0, /* %0 *//* 78 */ 0, /* %0 *//* 79 */ 0, /* %0 *//* 80 */ 1, /* lea %c,%0\n *//* 81 */ 1, /* mov %c,%0\n *//* 82 */ 1, /* # move\n *//* 83 */ 1, /* # move\n *//* 84 */ 1, /* # move\n *//* 85 */ 1, /* # move\n *//* 86 */ 1, /* # move\n *//* 87 */ 1, /* # move\n *//* 88 */ 1, /* # move\n *//* 89 */ 1, /* ?mov %c,%0\nadd %c,%1\n *//* 90 */ 1, /* ?mov %c,%0\nadd %c,%1\n *//* 91 */ 1, /* ?mov %c,%0\nadd %c,%1\n *//* 92 */ 1, /* ?mov %c,%0\nsub %c,%1\n *//* 93 */ 1, /* ?mov %c,%0\nsub %c,%1\n *//* 94 */ 1, /* ?mov %c,%0\nsub %c,%1\n *//* 95 */ 1, /* ?mov %c,%0\nand %c,%1\n *//* 96 */ 1, /* ?mov %c,%0\nor %c,%1\n *//* 97 */ 1, /* ?mov %c,%0\nxor %c,%1\n *//* 98 */ 1, /* ?mov %c,%0\nand %c,%1\n *//* 99 */ 1, /* ?mov %c,%0\nor %c,%1\n *//* 100 */ 1, /* ?mov %c,%0\nxor %c,%1\n *//* 101 */ 1, /* inc %1\n *//* 102 */ 1, /* inc %1\n *//* 103 */ 1, /* inc %1\n *//* 104 */ 1, /* dec %1\n *//* 105 */ 1, /* dec %1\n *//* 106 */ 1, /* dec %1\n *//* 107 */ 1, /* add %1,%2\n *//* 108 */ 1, /* sub %1,%2\n *//* 109 */ 1, /* add %1,%2\n *//* 110 */ 1, /* sub %1,%2\n *//* 111 */ 1, /* and %1,%2\n *//* 112 */ 1, /* or %1,%2\n *//* 113 */ 1, /* xor %1,%2\n *//* 114 */ 1, /* and %1,%2\n *//* 115 */ 1, /* or %1,%2\n *//* 116 */ 1, /* xor %1,%2\n *//* 117 */ 1, /* ?mov %c,%0\nnot %c\n *//* 118 */ 1, /* ?mov %c,%0\nnot %c\n *//* 119 */ 1, /* ?mov %c,%0\nneg %c\n *//* 120 */ 1, /* not %1\n *//* 121 */ 1, /* not %1\n *//* 122 */ 1, /* neg %1\n *//* 123 */ 1, /* ?mov %c,%0\nsal %c,%1\n *//* 124 */ 1, /* ?mov %c,%0\nshl %c,%1\n *//* 125 */ 1, /* ?mov %c,%0\nsar %c,%1\n *//* 126 */ 1, /* ?mov %c,%0\nshr %c,%1\n *//* 127 */ 1, /* sal %1,%2\n *//* 128 */ 1, /* shl %1,%2\n *//* 129 */ 1, /* sar %1,%2\n *//* 130 */ 1, /* shr %1,%2\n *//* 131 */ 0, /* %a *//* 132 */ 1, /* ?mov %c,%0\nmov ecx,%1\nsal %c,cl\n *//* 133 */ 1, /* ?mov %c,%0\nmov ecx,%1\nshl %c,cl\n *//* 134 */ 1, /* ?mov %c,%0\nmov ecx,%1\nsar %c,cl\n *//* 135 */ 1, /* ?mov %c,%0\nmov ecx,%1\nshr %c,cl\n *//* 136 */ 1, /* ?mov %c,%0\nimul %c,%1\n *//* 137 */ 1, /* imul %c,%1,%0\n *//* 138 */ 1, /* mul %1\n *//* 139 */ 1, /* xor edx,edx\ndiv %1\n *//* 140 */ 1, /* xor edx,edx\ndiv %1\n *//* 141 */ 1, /* cdq\nidiv %1\n *//* 142 */ 1, /* cdq\nidiv %1\n *//* 143 */ 1, /* mov %c,%0\n *//* 144 */ 1, /* mov %c,%0\n *//* 145 */ 1, /* movsx %c,byte ptr %0\n *//* 146 */ 1, /* movsx %c,word ptr %0\n *//* 147 */ 1, /* movzx %c,byte ptr %0\n *//* 148 */ 1, /* movzx %c,word ptr %0\n *//* 149 */ 1, /* # extend\n *//* 150 */ 1, /* # extend\n *//* 151 */ 1, /* # extend\n *//* 152 */ 1, /* # extend\n *//* 153 */ 1, /* # truncate\n *//* 154 */ 1, /* # truncate\n *//* 155 */ 1, /* # truncate\n *//* 156 */ 1, /* # truncate\n *//* 157 */ 1, /* mov byte ptr %0,%1\n *//* 158 */ 1, /* mov word ptr %0,%1\n *//* 159 */ 1, /* mov dword ptr %0,%1\n *//* 160 */ 1, /* mov byte ptr %0,%1\n *//* 161 */ 1, /* mov word ptr %0,%1\n *//* 162 */ 1, /* mov dword ptr %0,%1\n *//* 163 */ 1, /* mov dword ptr %0,%1\n *//* 164 */ 1, /* push %0\n *//* 165 */ 1, /* push %0\n *//* 166 */ 1, /* push %0\n *//* 167 */ 1, /* mov ecx,%a\nrep movsb\n *//* 168 */ 1, /* sub esp,%a\nmov edi,esp\nmov ecx,%a\nrep movsb\n *//* 169 */ 0, /* qword ptr %0 *//* 170 */ 0, /* dword ptr %0 *//* 171 */ 0, /* dword ptr %0 *//* 172 */ 1, /* fld %0\n *//* 173 */ 1, /* fstp qword ptr %0\n *//* 174 */ 1, /* fstp dword ptr %0\n *//* 175 */ 1, /* fstp dword ptr %0\n *//* 176 */ 1, /* sub esp,8\nfstp qword ptr [esp]\n *//* 177 */ 1, /* sub esp,4\nfstp dword ptr [esp]\n *//* 178 */ 1, /* fchs\n *//* 179 */ 1, /* fchs\n *//* 180 */ 0, /* %0 *//* 181 */ 0, /* p st(1),st *//* 182 */ 1, /* fadd%1\n *//* 183 */ 1, /* fadd%1\n *//* 184 */ 1, /* fdiv%1\n *//* 185 */ 1, /* fdiv%1\n *//* 186 */ 1, /* fmul%1\n *//* 187 */ 1, /* fmul%1\n *//* 188 */ 1, /* fsub%1\n *//* 189 */ 1, /* fsub%1\n *//* 190 */ 1, /* # CVFF8\n *//* 191 */ 1, /* sub esp,4\nfstp dword ptr 0[esp]\nfld dword ptr 0[esp]\nadd esp,4\n *//* 192 */ 1, /* call __ftol\n *//* 193 */ 1, /* fild dword ptr %0\n *//* 194 */ 1, /* push %0\nfild dword ptr 0[esp]\nadd esp,4\n *//* 195 */ 1, /* push %0\nfild dword ptr 0[esp]\nadd esp,4\n *//* 196 */ 0, /* %a *//* 197 */ 0, /* %0 *//* 198 */ 0, /* %0 *//* 199 */ 1, /* jmp %0\n *//* 200 */ 1, /* %a:\n *//* 201 */ 1, /* cmp %0,%1\nje %a\n *//* 202 */ 1, /* cmp %0,%1\njge %a\n *//* 203 */ 1, /* cmp %0,%1\njg %a\n *//* 204 */ 1, /* cmp %0,%1\njle %a\n *//* 205 */ 1, /* cmp %0,%1\njl %a\n *//* 206 */ 1, /* cmp %0,%1\njne %a\n *//* 207 */ 1, /* cmp %0,%1\njae %a\n *//* 208 */ 1, /* cmp %0,%1\nja %a\n *//* 209 */ 1, /* cmp %0,%1\njbe %a\n *//* 210 */ 1, /* cmp %0,%1\njb %a\n *//* 211 */ 1, /* cmp %0,%1\nje %a\n *//* 212 */ 1, /* cmp %0,%1\njge %a\n *//* 213 */ 1, /* cmp %0,%1\njg %a\n *//* 214 */ 1, /* cmp %0,%1\njle %a\n *//* 215 */ 1, /* cmp %0,%1\njl %a\n *//* 216 */ 1, /* cmp %0,%1\njne %a\n *//* 217 */ 1, /* cmp %0,%1\nje %a\n *//* 218 */ 1, /* cmp %0,%1\njae %a\n *//* 219 */ 1, /* cmp %0,%1\nja %a\n *//* 220 */ 1, /* cmp %0,%1\njbe %a\n *//* 221 */ 1, /* cmp %0,%1\njb %a\n *//* 222 */ 1, /* cmp %0,%1\njne %a\n *//* 223 */ 0, /* %0 *//* 224 */ 0, /* p *//* 225 */ 1, /* fcomp%0\nfstsw ax\nsahf\nje %a\n *//* 226 */ 1, /* fcomp%0\nfstsw ax\nsahf\njbe %a\n *//* 227 */ 1, /* fcomp%0\nfstsw ax\nsahf\njb %a\n *//* 228 */ 1, /* fcomp%0\nfstsw ax\nsahf\njae %a\n *//* 229 */ 1, /* fcomp%0\nfstsw ax\nsahf\nja %a\n *//* 230 */ 1, /* fcomp%0\nfstsw ax\nsahf\njne %a\n *//* 231 */ 1, /* fcomp%0\nfstsw ax\nsahf\nje %a\n *//* 232 */ 1, /* fcomp%0\nfstsw ax\nsahf\njbe %a\n *//* 233 */ 1, /* fcomp%0\nfstsw ax\nsahf\njb %a\n *//* 234 */ 1, /* fcomp%0\nfstsw ax\nsahf\njae %a\n *//* 235 */ 1, /* fcomp%0\nfstsw ax\nsahf\nja %a\n *//* 236 */ 1, /* fcomp%0\nfstsw ax\nsahf\njne %a\n *//* 237 */ 1, /* call %0\nadd esp,%a\n *//* 238 */ 1, /* call %0\nadd esp,%a\n *//* 239 */ 1, /* call %0\nadd esp,%a\n *//* 240 */ 1, /* call %0\nadd esp,%a\n *//* 241 */ 1, /* call %0\nadd esp,%a\n *//* 242 */ 1, /* call %0\nadd esp,%a\n *//* 243 */ 1, /* call %0\nadd esp,%a\nfstp\n *//* 244 */ 1, /* call %0\nadd esp,%a\nfstp\n *//* 245 */ 1, /* # ret\n *//* 246 */ 1, /* # ret\n *//* 247 */ 1, /* # ret\n *//* 248 */ 1, /* # ret\n *//* 249 */ 1, /* # ret\n */};static char *_string[] = {/* 0 */ 0,/* 1 */ "reg: INDIRI1(VREGP)",/* 2 */ "reg: INDIRU1(VREGP)",/* 3 */ "reg: INDIRI2(VREGP)",/* 4 */ "reg: INDIRU2(VREGP)",/* 5 */ "reg: INDIRF4(VREGP)",/* 6 */ "reg: INDIRI4(VREGP)",/* 7 */ "reg: INDIRP4(VREGP)",/* 8 */ "reg: INDIRU4(VREGP)",/* 9 */ "reg: INDIRF8(VREGP)",/* 10 */ "reg: INDIRI8(VREGP)",/* 11 */ "reg: INDIRP8(VREGP)",/* 12 */ "reg: INDIRU8(VREGP)",/* 13 */ "stmt: ASGNI1(VREGP,reg)",/* 14 */ "stmt: ASGNU1(VREGP,reg)",/* 15 */ "stmt: ASGNI2(VREGP,reg)",/* 16 */ "stmt: ASGNU2(VREGP,reg)",/* 17 */ "stmt: ASGNF4(VREGP,reg)",/* 18 */ "stmt: ASGNI4(VREGP,reg)",/* 19 */ "stmt: ASGNP4(VREGP,reg)",/* 20 */ "stmt: ASGNU4(VREGP,reg)",/* 21 */ "stmt: ASGNF8(VREGP,reg)",/* 22 */ "stmt: ASGNI8(VREGP,reg)",/* 23 */ "stmt: ASGNP8(VREGP,reg)",/* 24 */ "stmt: ASGNU8(VREGP,reg)",/* 25 */ "con: CNSTI1",/* 26 */ "con: CNSTU1",/* 27 */ "con: CNSTI2",/* 28 */ "con: CNSTU2",/* 29 */ "con: CNSTI4",/* 30 */ "con: CNSTU4",/* 31 */ "con: CNSTP4",/* 32 */ "con: CNSTI8",/* 33 */ "con: CNSTU8",/* 34 */ "con: CNSTP8",/* 35 */ "stmt: reg",/* 36 */ "acon: ADDRGP4",/* 37 */ "acon: con",/* 38 */ "base: ADDRGP4",/* 39 */ "base: reg",/* 40 */ "base: ADDI4(reg,acon)",/* 41 */ "base: ADDP4(reg,acon)",/* 42 */ "base: ADDU4(reg,acon)",/* 43 */ "base: ADDRFP4",/* 44 */ "base: ADDRLP4",/* 45 */ "index: reg",/* 46 */ "index: LSHI4(reg,con1)",/* 47 */ "index: LSHI4(reg,con2)",/* 48 */ "index: LSHI4(reg,con3)",/* 49 */ "con1: CNSTI4",/* 50 */ "con1: CNSTU4",/* 51 */ "con2: CNSTI4",/* 52 */ "con2: CNSTU4",/* 53 */ "con3: CNSTI4",/* 54 */ "con3: CNSTU4",/* 55 */ "index: LSHU4(reg,con1)",/* 56 */ "index: LSHU4(reg,con2)",/* 57 */ "index: LSHU4(reg,con3)",
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?