x86.c

来自「基于4个mips核的noc设计」· C语言 代码 · 共 2,433 行 · 第 1/5 页

enum { EAX=0, ECX=1, EDX=2, EBX=3, ESI=6, EDI=7 };
#include "c.h"
#define NODEPTR_TYPE Node
#define OP_LABEL(p) ((p)->op)
#define LEFT_CHILD(p) ((p)->kids[0])
#define RIGHT_CHILD(p) ((p)->kids[1])
#define STATE_LABEL(p) ((p)->x.state)
static void address(Symbol, Symbol, long);
static void blkfetch(int, int, int, int);
static void blkloop(int, int, int, int, int, int[]);
static void blkstore(int, int, int, int);
static void defaddress(Symbol);
static void defconst(int, int, Value);
static void defstring(int, char *);
static void defsymbol(Symbol);
static void doarg(Node);
static void emit2(Node);
static void export(Symbol);
static void clobber(Node);
static void function(Symbol, Symbol [], Symbol [], int);
static void global(Symbol);
static void import(Symbol);
static void local(Symbol);
static void progbeg(int, char **);
static void progend(void);
static void segment(int);
static void space(int);
static void target(Node);
extern int ckstack(Node, int);
extern int memop(Node);
extern int sametree(Node, Node);
static Symbol charreg[32], shortreg[32], intreg[32];
static Symbol fltreg[32];

static Symbol charregw, shortregw, intregw, fltregw;

static int cseg;

static Symbol quo, rem;

/*
generated at Tue Dec 18 12:37:00 2007
by $Id: lburg.c,v 2.8 1997/10/30 23:41:10 drh Exp $
*/
static void _kids(NODEPTR_TYPE, int, NODEPTR_TYPE[]);
static void _label(NODEPTR_TYPE);
static int _rule(void*, int);

#define _stmt_NT 1
#define _reg_NT 2
#define _con_NT 3
#define _acon_NT 4
#define _base_NT 5
#define _index_NT 6
#define _con1_NT 7
#define _con2_NT 8
#define _con3_NT 9
#define _addr_NT 10
#define _mem_NT 11
#define _rc_NT 12
#define _mr_NT 13
#define _mrc0_NT 14
#define _mrc1_NT 15
#define _mrc3_NT 16
#define _con5_NT 17
#define _memf_NT 18
#define _flt_NT 19
#define _addrj_NT 20
#define _cmpf_NT 21

static char *_ntname[] = {
	0,
	"stmt",
	"reg",
	"con",
	"acon",
	"base",
	"index",
	"con1",
	"con2",
	"con3",
	"addr",
	"mem",
	"rc",
	"mr",
	"mrc0",
	"mrc1",
	"mrc3",
	"con5",
	"memf",
	"flt",
	"addrj",
	"cmpf",
	0
};

struct _state {
	short cost[22];
	struct {
		unsigned int _stmt:7;
		unsigned int _reg:7;
		unsigned int _con:4;
		unsigned int _acon:2;
		unsigned int _base:3;
		unsigned int _index:3;
		unsigned int _con1:2;
		unsigned int _con2:2;
		unsigned int _con3:2;
		unsigned int _addr:3;
		unsigned int _mem:3;
		unsigned int _rc:2;
		unsigned int _mr:2;
		unsigned int _mrc0:2;
		unsigned int _mrc1:2;
		unsigned int _mrc3:2;
		unsigned int _con5:1;
		unsigned int _memf:2;
		unsigned int _flt:2;
		unsigned int _addrj:2;
		unsigned int _cmpf:2;
	} rule;
};

static short _nts_0[] = { 0 };
static short _nts_1[] = { _reg_NT, 0 };
static short _nts_2[] = { _con_NT, 0 };
static short _nts_3[] = { _reg_NT, _acon_NT, 0 };
static short _nts_4[] = { _reg_NT, _con1_NT, 0 };
static short _nts_5[] = { _reg_NT, _con2_NT, 0 };
static short _nts_6[] = { _reg_NT, _con3_NT, 0 };
static short _nts_7[] = { _base_NT, 0 };
static short _nts_8[] = { _index_NT, _base_NT, 0 };
static short _nts_9[] = { _index_NT, 0 };
static short _nts_10[] = { _addr_NT, 0 };
static short _nts_11[] = { _mem_NT, 0 };
static short _nts_12[] = { _rc_NT, 0 };
static short _nts_13[] = { _mrc0_NT, 0 };
static short _nts_14[] = { _reg_NT, _mrc1_NT, 0 };
static short _nts_15[] = { _addr_NT, _mem_NT, _con1_NT, 0 };
static short _nts_16[] = { _addr_NT, _mem_NT, _rc_NT, 0 };
static short _nts_17[] = { _addr_NT, _mem_NT, 0 };
static short _nts_18[] = { _reg_NT, _con5_NT, 0 };
static short _nts_19[] = { _addr_NT, _mem_NT, _con5_NT, 0 };
static short _nts_20[] = { _reg_NT, _reg_NT, 0 };
static short _nts_21[] = { _reg_NT, _mrc3_NT, 0 };
static short _nts_22[] = { _con_NT, _mr_NT, 0 };
static short _nts_23[] = { _reg_NT, _mr_NT, 0 };
static short _nts_24[] = { _addr_NT, _rc_NT, 0 };
static short _nts_25[] = { _mrc3_NT, 0 };
static short _nts_26[] = { _memf_NT, 0 };
static short _nts_27[] = { _addr_NT, _reg_NT, 0 };
static short _nts_28[] = { _reg_NT, _flt_NT, 0 };
static short _nts_29[] = { _addrj_NT, 0 };
static short _nts_30[] = { _mem_NT, _rc_NT, 0 };
static short _nts_31[] = { _cmpf_NT, _reg_NT, 0 };

static short *_nts[] = {
	0,	/* 0 */
	_nts_0,	/* 1 */
	_nts_0,	/* 2 */
	_nts_0,	/* 3 */
	_nts_0,	/* 4 */
	_nts_0,	/* 5 */
	_nts_0,	/* 6 */
	_nts_0,	/* 7 */
	_nts_0,	/* 8 */
	_nts_0,	/* 9 */
	_nts_0,	/* 10 */
	_nts_0,	/* 11 */
	_nts_0,	/* 12 */
	_nts_1,	/* 13 */
	_nts_1,	/* 14 */
	_nts_1,	/* 15 */
	_nts_1,	/* 16 */
	_nts_1,	/* 17 */
	_nts_1,	/* 18 */
	_nts_1,	/* 19 */
	_nts_1,	/* 20 */
	_nts_1,	/* 21 */
	_nts_1,	/* 22 */
	_nts_1,	/* 23 */
	_nts_1,	/* 24 */
	_nts_0,	/* 25 */
	_nts_0,	/* 26 */
	_nts_0,	/* 27 */
	_nts_0,	/* 28 */
	_nts_0,	/* 29 */
	_nts_0,	/* 30 */
	_nts_0,	/* 31 */
	_nts_0,	/* 32 */
	_nts_0,	/* 33 */
	_nts_0,	/* 34 */
	_nts_1,	/* 35 */
	_nts_0,	/* 36 */
	_nts_2,	/* 37 */
	_nts_0,	/* 38 */
	_nts_1,	/* 39 */
	_nts_3,	/* 40 */
	_nts_3,	/* 41 */
	_nts_3,	/* 42 */
	_nts_0,	/* 43 */
	_nts_0,	/* 44 */
	_nts_1,	/* 45 */
	_nts_4,	/* 46 */
	_nts_5,	/* 47 */
	_nts_6,	/* 48 */
	_nts_0,	/* 49 */
	_nts_0,	/* 50 */
	_nts_0,	/* 51 */
	_nts_0,	/* 52 */
	_nts_0,	/* 53 */
	_nts_0,	/* 54 */
	_nts_4,	/* 55 */
	_nts_5,	/* 56 */
	_nts_6,	/* 57 */
	_nts_7,	/* 58 */
	_nts_8,	/* 59 */
	_nts_8,	/* 60 */
	_nts_8,	/* 61 */
	_nts_9,	/* 62 */
	_nts_10,	/* 63 */
	_nts_10,	/* 64 */
	_nts_10,	/* 65 */
	_nts_10,	/* 66 */
	_nts_10,	/* 67 */
	_nts_10,	/* 68 */
	_nts_10,	/* 69 */
	_nts_1,	/* 70 */
	_nts_2,	/* 71 */
	_nts_1,	/* 72 */
	_nts_11,	/* 73 */
	_nts_11,	/* 74 */
	_nts_12,	/* 75 */
	_nts_11,	/* 76 */
	_nts_12,	/* 77 */
	_nts_11,	/* 78 */
	_nts_12,	/* 79 */
	_nts_10,	/* 80 */
	_nts_13,	/* 81 */
	_nts_1,	/* 82 */
	_nts_1,	/* 83 */
	_nts_1,	/* 84 */
	_nts_1,	/* 85 */
	_nts_1,	/* 86 */
	_nts_1,	/* 87 */
	_nts_1,	/* 88 */
	_nts_14,	/* 89 */
	_nts_14,	/* 90 */
	_nts_14,	/* 91 */
	_nts_14,	/* 92 */
	_nts_14,	/* 93 */
	_nts_14,	/* 94 */
	_nts_14,	/* 95 */
	_nts_14,	/* 96 */
	_nts_14,	/* 97 */
	_nts_14,	/* 98 */
	_nts_14,	/* 99 */
	_nts_14,	/* 100 */
	_nts_15,	/* 101 */
	_nts_15,	/* 102 */
	_nts_15,	/* 103 */
	_nts_15,	/* 104 */
	_nts_15,	/* 105 */
	_nts_15,	/* 106 */
	_nts_16,	/* 107 */
	_nts_16,	/* 108 */
	_nts_16,	/* 109 */
	_nts_16,	/* 110 */
	_nts_16,	/* 111 */
	_nts_16,	/* 112 */
	_nts_16,	/* 113 */
	_nts_16,	/* 114 */
	_nts_16,	/* 115 */
	_nts_16,	/* 116 */
	_nts_1,	/* 117 */
	_nts_1,	/* 118 */
	_nts_1,	/* 119 */
	_nts_17,	/* 120 */
	_nts_17,	/* 121 */
	_nts_17,	/* 122 */
	_nts_18,	/* 123 */
	_nts_18,	/* 124 */
	_nts_18,	/* 125 */
	_nts_18,	/* 126 */
	_nts_19,	/* 127 */
	_nts_19,	/* 128 */
	_nts_19,	/* 129 */
	_nts_19,	/* 130 */
	_nts_0,	/* 131 */
	_nts_20,	/* 132 */
	_nts_20,	/* 133 */
	_nts_20,	/* 134 */
	_nts_20,	/* 135 */
	_nts_21,	/* 136 */
	_nts_22,	/* 137 */
	_nts_23,	/* 138 */
	_nts_20,	/* 139 */
	_nts_20,	/* 140 */
	_nts_20,	/* 141 */
	_nts_20,	/* 142 */
	_nts_1,	/* 143 */
	_nts_1,	/* 144 */
	_nts_10,	/* 145 */
	_nts_10,	/* 146 */
	_nts_10,	/* 147 */
	_nts_10,	/* 148 */
	_nts_1,	/* 149 */
	_nts_1,	/* 150 */
	_nts_1,	/* 151 */
	_nts_1,	/* 152 */
	_nts_1,	/* 153 */
	_nts_1,	/* 154 */
	_nts_1,	/* 155 */
	_nts_1,	/* 156 */
	_nts_24,	/* 157 */
	_nts_24,	/* 158 */
	_nts_24,	/* 159 */
	_nts_24,	/* 160 */
	_nts_24,	/* 161 */
	_nts_24,	/* 162 */
	_nts_24,	/* 163 */
	_nts_25,	/* 164 */
	_nts_25,	/* 165 */
	_nts_25,	/* 166 */
	_nts_20,	/* 167 */
	_nts_1,	/* 168 */
	_nts_10,	/* 169 */
	_nts_10,	/* 170 */
	_nts_10,	/* 171 */
	_nts_26,	/* 172 */
	_nts_27,	/* 173 */
	_nts_27,	/* 174 */
	_nts_27,	/* 175 */
	_nts_1,	/* 176 */
	_nts_1,	/* 177 */
	_nts_1,	/* 178 */
	_nts_1,	/* 179 */
	_nts_26,	/* 180 */
	_nts_1,	/* 181 */
	_nts_28,	/* 182 */
	_nts_28,	/* 183 */
	_nts_28,	/* 184 */
	_nts_28,	/* 185 */
	_nts_28,	/* 186 */
	_nts_28,	/* 187 */
	_nts_28,	/* 188 */
	_nts_28,	/* 189 */
	_nts_1,	/* 190 */
	_nts_1,	/* 191 */
	_nts_1,	/* 192 */
	_nts_10,	/* 193 */
	_nts_1,	/* 194 */
	_nts_1,	/* 195 */
	_nts_0,	/* 196 */
	_nts_1,	/* 197 */
	_nts_11,	/* 198 */
	_nts_29,	/* 199 */
	_nts_0,	/* 200 */
	_nts_30,	/* 201 */
	_nts_30,	/* 202 */
	_nts_30,	/* 203 */
	_nts_30,	/* 204 */
	_nts_30,	/* 205 */
	_nts_30,	/* 206 */
	_nts_30,	/* 207 */
	_nts_30,	/* 208 */
	_nts_30,	/* 209 */
	_nts_30,	/* 210 */
	_nts_14,	/* 211 */
	_nts_14,	/* 212 */
	_nts_14,	/* 213 */
	_nts_14,	/* 214 */
	_nts_14,	/* 215 */
	_nts_14,	/* 216 */
	_nts_14,	/* 217 */
	_nts_14,	/* 218 */
	_nts_14,	/* 219 */
	_nts_14,	/* 220 */
	_nts_14,	/* 221 */
	_nts_14,	/* 222 */
	_nts_26,	/* 223 */
	_nts_1,	/* 224 */
	_nts_31,	/* 225 */
	_nts_31,	/* 226 */
	_nts_31,	/* 227 */
	_nts_31,	/* 228 */
	_nts_31,	/* 229 */
	_nts_31,	/* 230 */
	_nts_31,	/* 231 */
	_nts_31,	/* 232 */
	_nts_31,	/* 233 */
	_nts_31,	/* 234 */
	_nts_31,	/* 235 */
	_nts_31,	/* 236 */
	_nts_29,	/* 237 */
	_nts_29,	/* 238 */
	_nts_29,	/* 239 */
	_nts_29,	/* 240 */
	_nts_29,	/* 241 */
	_nts_29,	/* 242 */
	_nts_29,	/* 243 */
	_nts_29,	/* 244 */
	_nts_1,	/* 245 */
	_nts_1,	/* 246 */
	_nts_1,	/* 247 */
	_nts_1,	/* 248 */
	_nts_1,	/* 249 */
};

static char *_templates[] = {
/* 0 */	0,
/* 1 */	"# read register\n",	/* reg: INDIRI1(VREGP) */
/* 2 */	"# read register\n",	/* reg: INDIRU1(VREGP) */
/* 3 */	"# read register\n",	/* reg: INDIRI2(VREGP) */
/* 4 */	"# read register\n",	/* reg: INDIRU2(VREGP) */
/* 5 */	"# read register\n",	/* reg: INDIRF4(VREGP) */
/* 6 */	"# read register\n",	/* reg: INDIRI4(VREGP) */
/* 7 */	"# read register\n",	/* reg: INDIRP4(VREGP) */
/* 8 */	"# read register\n",	/* reg: INDIRU4(VREGP) */
/* 9 */	"# read register\n",	/* reg: INDIRF8(VREGP) */
/* 10 */	"# read register\n",	/* reg: INDIRI8(VREGP) */
/* 11 */	"# read register\n",	/* reg: INDIRP8(VREGP) */
/* 12 */	"# read register\n",	/* reg: INDIRU8(VREGP) */
/* 13 */	"# write register\n",	/* stmt: ASGNI1(VREGP,reg) */
/* 14 */	"# write register\n",	/* stmt: ASGNU1(VREGP,reg) */
/* 15 */	"# write register\n",	/* stmt: ASGNI2(VREGP,reg) */
/* 16 */	"# write register\n",	/* stmt: ASGNU2(VREGP,reg) */
/* 17 */	"# write register\n",	/* stmt: ASGNF4(VREGP,reg) */
/* 18 */	"# write register\n",	/* stmt: ASGNI4(VREGP,reg) */
/* 19 */	"# write register\n",	/* stmt: ASGNP4(VREGP,reg) */
/* 20 */	"# write register\n",	/* stmt: ASGNU4(VREGP,reg) */
/* 21 */	"# write register\n",	/* stmt: ASGNF8(VREGP,reg) */
/* 22 */	"# write register\n",	/* stmt: ASGNI8(VREGP,reg) */
/* 23 */	"# write register\n",	/* stmt: ASGNP8(VREGP,reg) */
/* 24 */	"# write register\n",	/* stmt: ASGNU8(VREGP,reg) */
/* 25 */	"%a",	/* con: CNSTI1 */
/* 26 */	"%a",	/* con: CNSTU1 */
/* 27 */	"%a",	/* con: CNSTI2 */
/* 28 */	"%a",	/* con: CNSTU2 */
/* 29 */	"%a",	/* con: CNSTI4 */
/* 30 */	"%a",	/* con: CNSTU4 */
/* 31 */	"%a",	/* con: CNSTP4 */
/* 32 */	"%a",	/* con: CNSTI8 */
/* 33 */	"%a",	/* con: CNSTU8 */
/* 34 */	"%a",	/* con: CNSTP8 */
/* 35 */	"",	/* stmt: reg */
/* 36 */	"(%a)",	/* acon: ADDRGP4 */
/* 37 */	"(%0)",	/* acon: con */
/* 38 */	"(%a)",	/* base: ADDRGP4 */
/* 39 */	"[%0]",	/* base: reg */
/* 40 */	"%1[%0]",	/* base: ADDI4(reg,acon) */
/* 41 */	"%1[%0]",	/* base: ADDP4(reg,acon) */
/* 42 */	"%1[%0]",	/* base: ADDU4(reg,acon) */
/* 43 */	"(%a)[ebp]",	/* base: ADDRFP4 */
/* 44 */	"(%a)[ebp]",	/* base: ADDRLP4 */
/* 45 */	"%0",	/* index: reg */
/* 46 */	"%0*2",	/* index: LSHI4(reg,con1) */
/* 47 */	"%0*4",	/* index: LSHI4(reg,con2) */
/* 48 */	"%0*8",	/* index: LSHI4(reg,con3) */
/* 49 */	"1",	/* con1: CNSTI4 */
/* 50 */	"1",	/* con1: CNSTU4 */
/* 51 */	"2",	/* con2: CNSTI4 */
/* 52 */	"2",	/* con2: CNSTU4 */
/* 53 */	"3",	/* con3: CNSTI4 */
/* 54 */	"3",	/* con3: CNSTU4 */
/* 55 */	"%0*2",	/* index: LSHU4(reg,con1) */
/* 56 */	"%0*4",	/* index: LSHU4(reg,con2) */
/* 57 */	"%0*8",	/* index: LSHU4(reg,con3) */
/* 58 */	"%0",	/* addr: base */
/* 59 */	"%1[%0]",	/* addr: ADDI4(index,base) */
/* 60 */	"%1[%0]",	/* addr: ADDP4(index,base) */
/* 61 */	"%1[%0]",	/* addr: ADDU4(index,base) */
/* 62 */	"[%0]",	/* addr: index */
/* 63 */	"byte ptr %0",	/* mem: INDIRI1(addr) */
/* 64 */	"word ptr %0",	/* mem: INDIRI2(addr) */
/* 65 */	"dword ptr %0",	/* mem: INDIRI4(addr) */
/* 66 */	"byte ptr %0",	/* mem: INDIRU1(addr) */
/* 67 */	"word ptr %0",	/* mem: INDIRU2(addr) */
/* 68 */	"dword ptr %0",	/* mem: INDIRU4(addr) */
/* 69 */	"dword ptr %0",	/* mem: INDIRP4(addr) */
/* 70 */	"%0",	/* rc: reg */
/* 71 */	"%0",	/* rc: con */
/* 72 */	"%0",	/* mr: reg */
/* 73 */	"%0",	/* mr: mem */
/* 74 */	"%0",	/* mrc0: mem */
/* 75 */	"%0",	/* mrc0: rc */
/* 76 */	"%0",	/* mrc1: mem */