mips.c

来自「基于4个mips核的noc设计」· C语言 代码 · 共 2,447 行 · 第 1/5 页

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#define INTTMP 0x0100ff00#define INTVAR 0x40ff0000#define FLTTMP 0x000f0ff0#define FLTVAR 0xfff00000#define INTRET 0x00000004#define FLTRET 0x00000003#define readsreg(p) \        (generic((p)->op)==INDIR && (p)->kids[0]->op==VREG+P)#define setsrc(d) ((d) && (d)->x.regnode && \        (d)->x.regnode->set == src->x.regnode->set && \        (d)->x.regnode->mask&src->x.regnode->mask)#define relink(a, b) ((b)->x.prev = (a), (a)->x.next = (b))#include "c.h"#define NODEPTR_TYPE Node#define OP_LABEL(p) ((p)->op)#define LEFT_CHILD(p) ((p)->kids[0])#define RIGHT_CHILD(p) ((p)->kids[1])#define STATE_LABEL(p) ((p)->x.state)static void address(Symbol, Symbol, long);static void blkfetch(int, int, int, int);static void blkloop(int, int, int, int, int, int[]);static void blkstore(int, int, int, int);static void defaddress(Symbol);static void defconst(int, int, Value);static void defstring(int, char *);static void defsymbol(Symbol);static void doarg(Node);static void emit2(Node);static void export(Symbol);static void clobber(Node);static void function(Symbol, Symbol [], Symbol [], int);static void global(Symbol);static void import(Symbol);static void local(Symbol);static void progbeg(int, char **);static void progend(void);static void segment(int);static void space(int);static void target(Node);static int      bitcount       (unsigned);static Symbol   argreg         (int, int, int, int, int);static Symbol ireg[32], freg2[32], d6;static Symbol iregw, freg2w;static int tmpregs[] = {3, 9, 10};static Symbol blkreg;static int gnum = 8;static int pic;static int cseg;/*generated at Tue Dec 18 12:36:59 2007by $Id: lburg.c,v 2.8 1997/10/30 23:41:10 drh Exp $*/static void _kids(NODEPTR_TYPE, int, NODEPTR_TYPE[]);static void _label(NODEPTR_TYPE);static int _rule(void*, int);#define _stmt_NT 1#define _reg_NT 2#define _con_NT 3#define _acon_NT 4#define _addr_NT 5#define _rc_NT 6#define _rc5_NT 7#define _ar_NT 8static char *_ntname[] = {	0,	"stmt",	"reg",	"con",	"acon",	"addr",	"rc",	"rc5",	"ar",	0};struct _state {	short cost[9];	struct {		unsigned int _stmt:7;		unsigned int _reg:7;		unsigned int _con:4;		unsigned int _acon:2;		unsigned int _addr:3;		unsigned int _rc:2;		unsigned int _rc5:2;		unsigned int _ar:2;	} rule;};static short _nts_0[] = { 0 };static short _nts_1[] = { _reg_NT, 0 };static short _nts_2[] = { _con_NT, 0 };static short _nts_3[] = { _reg_NT, _acon_NT, 0 };static short _nts_4[] = { _acon_NT, 0 };static short _nts_5[] = { _addr_NT, 0 };static short _nts_6[] = { _addr_NT, _reg_NT, 0 };static short _nts_7[] = { _reg_NT, _reg_NT, 0 };static short _nts_8[] = { _reg_NT, _rc_NT, 0 };static short _nts_9[] = { _reg_NT, _rc5_NT, 0 };static short _nts_10[] = { _ar_NT, 0 };static short *_nts[] = {	0,	/* 0 */	_nts_0,	/* 1 */	_nts_0,	/* 2 */	_nts_0,	/* 3 */	_nts_0,	/* 4 */	_nts_0,	/* 5 */	_nts_0,	/* 6 */	_nts_0,	/* 7 */	_nts_0,	/* 8 */	_nts_0,	/* 9 */	_nts_0,	/* 10 */	_nts_0,	/* 11 */	_nts_0,	/* 12 */	_nts_1,	/* 13 */	_nts_1,	/* 14 */	_nts_1,	/* 15 */	_nts_1,	/* 16 */	_nts_1,	/* 17 */	_nts_1,	/* 18 */	_nts_1,	/* 19 */	_nts_1,	/* 20 */	_nts_1,	/* 21 */	_nts_1,	/* 22 */	_nts_1,	/* 23 */	_nts_1,	/* 24 */	_nts_0,	/* 25 */	_nts_0,	/* 26 */	_nts_0,	/* 27 */	_nts_0,	/* 28 */	_nts_0,	/* 29 */	_nts_0,	/* 30 */	_nts_0,	/* 31 */	_nts_0,	/* 32 */	_nts_0,	/* 33 */	_nts_0,	/* 34 */	_nts_1,	/* 35 */	_nts_2,	/* 36 */	_nts_0,	/* 37 */	_nts_3,	/* 38 */	_nts_3,	/* 39 */	_nts_3,	/* 40 */	_nts_4,	/* 41 */	_nts_1,	/* 42 */	_nts_0,	/* 43 */	_nts_0,	/* 44 */	_nts_5,	/* 45 */	_nts_0,	/* 46 */	_nts_0,	/* 47 */	_nts_0,	/* 48 */	_nts_0,	/* 49 */	_nts_0,	/* 50 */	_nts_0,	/* 51 */	_nts_0,	/* 52 */	_nts_6,	/* 53 */	_nts_6,	/* 54 */	_nts_6,	/* 55 */	_nts_6,	/* 56 */	_nts_6,	/* 57 */	_nts_6,	/* 58 */	_nts_6,	/* 59 */	_nts_5,	/* 60 */	_nts_5,	/* 61 */	_nts_5,	/* 62 */	_nts_5,	/* 63 */	_nts_5,	/* 64 */	_nts_5,	/* 65 */	_nts_5,	/* 66 */	_nts_5,	/* 67 */	_nts_5,	/* 68 */	_nts_5,	/* 69 */	_nts_5,	/* 70 */	_nts_5,	/* 71 */	_nts_5,	/* 72 */	_nts_5,	/* 73 */	_nts_5,	/* 74 */	_nts_6,	/* 75 */	_nts_6,	/* 76 */	_nts_7,	/* 77 */	_nts_7,	/* 78 */	_nts_7,	/* 79 */	_nts_7,	/* 80 */	_nts_7,	/* 81 */	_nts_7,	/* 82 */	_nts_2,	/* 83 */	_nts_1,	/* 84 */	_nts_8,	/* 85 */	_nts_8,	/* 86 */	_nts_8,	/* 87 */	_nts_8,	/* 88 */	_nts_8,	/* 89 */	_nts_8,	/* 90 */	_nts_8,	/* 91 */	_nts_8,	/* 92 */	_nts_8,	/* 93 */	_nts_8,	/* 94 */	_nts_8,	/* 95 */	_nts_8,	/* 96 */	_nts_0,	/* 97 */	_nts_1,	/* 98 */	_nts_9,	/* 99 */	_nts_9,	/* 100 */	_nts_9,	/* 101 */	_nts_9,	/* 102 */	_nts_1,	/* 103 */	_nts_1,	/* 104 */	_nts_1,	/* 105 */	_nts_1,	/* 106 */	_nts_1,	/* 107 */	_nts_1,	/* 108 */	_nts_1,	/* 109 */	_nts_1,	/* 110 */	_nts_1,	/* 111 */	_nts_1,	/* 112 */	_nts_7,	/* 113 */	_nts_7,	/* 114 */	_nts_7,	/* 115 */	_nts_7,	/* 116 */	_nts_7,	/* 117 */	_nts_7,	/* 118 */	_nts_7,	/* 119 */	_nts_7,	/* 120 */	_nts_1,	/* 121 */	_nts_1,	/* 122 */	_nts_1,	/* 123 */	_nts_1,	/* 124 */	_nts_1,	/* 125 */	_nts_1,	/* 126 */	_nts_1,	/* 127 */	_nts_1,	/* 128 */	_nts_1,	/* 129 */	_nts_1,	/* 130 */	_nts_1,	/* 131 */	_nts_1,	/* 132 */	_nts_1,	/* 133 */	_nts_0,	/* 134 */	_nts_4,	/* 135 */	_nts_1,	/* 136 */	_nts_1,	/* 137 */	_nts_7,	/* 138 */	_nts_7,	/* 139 */	_nts_7,	/* 140 */	_nts_7,	/* 141 */	_nts_7,	/* 142 */	_nts_7,	/* 143 */	_nts_7,	/* 144 */	_nts_7,	/* 145 */	_nts_7,	/* 146 */	_nts_7,	/* 147 */	_nts_7,	/* 148 */	_nts_7,	/* 149 */	_nts_7,	/* 150 */	_nts_7,	/* 151 */	_nts_7,	/* 152 */	_nts_7,	/* 153 */	_nts_7,	/* 154 */	_nts_7,	/* 155 */	_nts_7,	/* 156 */	_nts_7,	/* 157 */	_nts_7,	/* 158 */	_nts_7,	/* 159 */	_nts_7,	/* 160 */	_nts_7,	/* 161 */	_nts_0,	/* 162 */	_nts_10,	/* 163 */	_nts_10,	/* 164 */	_nts_10,	/* 165 */	_nts_10,	/* 166 */	_nts_10,	/* 167 */	_nts_10,	/* 168 */	_nts_1,	/* 169 */	_nts_0,	/* 170 */	_nts_1,	/* 171 */	_nts_1,	/* 172 */	_nts_1,	/* 173 */	_nts_1,	/* 174 */	_nts_1,	/* 175 */	_nts_1,	/* 176 */	_nts_1,	/* 177 */	_nts_1,	/* 178 */	_nts_1,	/* 179 */	_nts_1,	/* 180 */	_nts_1,	/* 181 */	_nts_1,	/* 182 */	_nts_7,	/* 183 */};static char *_templates[] = {/* 0 */	0,/* 1 */	"# read register\n",	/* reg: INDIRI1(VREGP) *//* 2 */	"# read register\n",	/* reg: INDIRU1(VREGP) *//* 3 */	"# read register\n",	/* reg: INDIRI2(VREGP) *//* 4 */	"# read register\n",	/* reg: INDIRU2(VREGP) *//* 5 */	"# read register\n",	/* reg: INDIRF4(VREGP) *//* 6 */	"# read register\n",	/* reg: INDIRI4(VREGP) *//* 7 */	"# read register\n",	/* reg: INDIRP4(VREGP) *//* 8 */	"# read register\n",	/* reg: INDIRU4(VREGP) *//* 9 */	"# read register\n",	/* reg: INDIRF8(VREGP) *//* 10 */	"# read register\n",	/* reg: INDIRI8(VREGP) *//* 11 */	"# read register\n",	/* reg: INDIRP8(VREGP) *//* 12 */	"# read register\n",	/* reg: INDIRU8(VREGP) *//* 13 */	"# write register\n",	/* stmt: ASGNI1(VREGP,reg) *//* 14 */	"# write register\n",	/* stmt: ASGNU1(VREGP,reg) *//* 15 */	"# write register\n",	/* stmt: ASGNI2(VREGP,reg) *//* 16 */	"# write register\n",	/* stmt: ASGNU2(VREGP,reg) *//* 17 */	"# write register\n",	/* stmt: ASGNF4(VREGP,reg) *//* 18 */	"# write register\n",	/* stmt: ASGNI4(VREGP,reg) *//* 19 */	"# write register\n",	/* stmt: ASGNP4(VREGP,reg) *//* 20 */	"# write register\n",	/* stmt: ASGNU4(VREGP,reg) *//* 21 */	"# write register\n",	/* stmt: ASGNF8(VREGP,reg) *//* 22 */	"# write register\n",	/* stmt: ASGNI8(VREGP,reg) *//* 23 */	"# write register\n",	/* stmt: ASGNP8(VREGP,reg) *//* 24 */	"# write register\n",	/* stmt: ASGNU8(VREGP,reg) *//* 25 */	"%a",	/* con: CNSTI1 *//* 26 */	"%a",	/* con: CNSTU1 *//* 27 */	"%a",	/* con: CNSTI2 *//* 28 */	"%a",	/* con: CNSTU2 *//* 29 */	"%a",	/* con: CNSTI4 *//* 30 */	"%a",	/* con: CNSTU4 *//* 31 */	"%a",	/* con: CNSTP4 *//* 32 */	"%a",	/* con: CNSTI8 *//* 33 */	"%a",	/* con: CNSTU8 *//* 34 */	"%a",	/* con: CNSTP8 *//* 35 */	"",	/* stmt: reg *//* 36 */	"%0",	/* acon: con *//* 37 */	"%a",	/* acon: ADDRGP4 *//* 38 */	"%1($%0)",	/* addr: ADDI4(reg,acon) *//* 39 */	"%1($%0)",	/* addr: ADDU4(reg,acon) *//* 40 */	"%1($%0)",	/* addr: ADDP4(reg,acon) *//* 41 */	"%0",	/* addr: acon *//* 42 */	"($%0)",	/* addr: reg *//* 43 */	"%a+%F($sp)",	/* addr: ADDRFP4 *//* 44 */	"%a+%F($sp)",	/* addr: ADDRLP4 *//* 45 */	"la $%c,%0\n",	/* reg: addr *//* 46 */	"# reg\n",	/* reg: CNSTI1 *//* 47 */	"# reg\n",	/* reg: CNSTI2 *//* 48 */	"# reg\n",	/* reg: CNSTI4 *//* 49 */	"# reg\n",	/* reg: CNSTU1 *//* 50 */	"# reg\n",	/* reg: CNSTU2 *//* 51 */	"# reg\n",	/* reg: CNSTU4 *//* 52 */	"# reg\n",	/* reg: CNSTP4 *//* 53 */	"sb $%1,%0\n",	/* stmt: ASGNI1(addr,reg) *//* 54 */	"sb $%1,%0\n",	/* stmt: ASGNU1(addr,reg) *//* 55 */	"sh $%1,%0\n",	/* stmt: ASGNI2(addr,reg) *//* 56 */	"sh $%1,%0\n",	/* stmt: ASGNU2(addr,reg) *//* 57 */	"sw $%1,%0\n",	/* stmt: ASGNI4(addr,reg) *//* 58 */	"sw $%1,%0\n",	/* stmt: ASGNU4(addr,reg) *//* 59 */	"sw $%1,%0\n",	/* stmt: ASGNP4(addr,reg) *//* 60 */	"lb $%c,%0\n",	/* reg: INDIRI1(addr) *//* 61 */	"lbu $%c,%0\n",	/* reg: INDIRU1(addr) *//* 62 */	"lh $%c,%0\n",	/* reg: INDIRI2(addr) *//* 63 */	"lhu $%c,%0\n",	/* reg: INDIRU2(addr) *//* 64 */	"lw $%c,%0\n",	/* reg: INDIRI4(addr) *//* 65 */	"lw $%c,%0\n",	/* reg: INDIRU4(addr) *//* 66 */	"lw $%c,%0\n",	/* reg: INDIRP4(addr) *//* 67 */	"lb $%c,%0\n",	/* reg: CVII4(INDIRI1(addr)) *//* 68 */	"lh $%c,%0\n",	/* reg: CVII4(INDIRI2(addr)) *//* 69 */	"lbu $%c,%0\n",	/* reg: CVUU4(INDIRU1(addr)) *//* 70 */	"lhu $%c,%0\n",	/* reg: CVUU4(INDIRU2(addr)) *//* 71 */	"lbu $%c,%0\n",	/* reg: CVUI4(INDIRU1(addr)) *//* 72 */	"lhu $%c,%0\n",	/* reg: CVUI4(INDIRU2(addr)) *//* 73 */	"l.s $f%c,%0\n",	/* reg: INDIRF4(addr) *//* 74 */	"l.d $f%c,%0\n",	/* reg: INDIRF8(addr) *//* 75 */	"s.s $f%1,%0\n",	/* stmt: ASGNF4(addr,reg) *//* 76 */	"s.d $f%1,%0\n",	/* stmt: ASGNF8(addr,reg) *//* 77 */	"div $%c,$%0,$%1\n",	/* reg: DIVI4(reg,reg) *//* 78 */	"divu $%c,$%0,$%1\n",	/* reg: DIVU4(reg,reg) *//* 79 */	"rem $%c,$%0,$%1\n",	/* reg: MODI4(reg,reg) *//* 80 */	"remu $%c,$%0,$%1\n",	/* reg: MODU4(reg,reg) *//* 81 */	"mul $%c,$%0,$%1\n",	/* reg: MULI4(reg,reg) *//* 82 */	"mul $%c,$%0,$%1\n",	/* reg: MULU4(reg,reg) *//* 83 */	"%0",	/* rc: con *//* 84 */	"$%0",	/* rc: reg *//* 85 */	"addu $%c,$%0,%1\n",	/* reg: ADDI4(reg,rc) *//* 86 */	"addu $%c,$%0,%1\n",	/* reg: ADDP4(reg,rc) *//* 87 */	"addu $%c,$%0,%1\n",	/* reg: ADDU4(reg,rc) *//* 88 */	"and $%c,$%0,%1\n",	/* reg: BANDI4(reg,rc) *//* 89 */	"or $%c,$%0,%1\n",	/* reg: BORI4(reg,rc) *//* 90 */	"xor $%c,$%0,%1\n",	/* reg: BXORI4(reg,rc) *//* 91 */	"and $%c,$%0,%1\n",	/* reg: BANDU4(reg,rc) *//* 92 */	"or $%c,$%0,%1\n",	/* reg: BORU4(reg,rc) *//* 93 */	"xor $%c,$%0,%1\n",	/* reg: BXORU4(reg,rc) *//* 94 */	"subu $%c,$%0,%1\n",	/* reg: SUBI4(reg,rc) *//* 95 */	"subu $%c,$%0,%1\n",	/* reg: SUBP4(reg,rc) *//* 96 */	"subu $%c,$%0,%1\n",	/* reg: SUBU4(reg,rc) *//* 97 */	"%a",	/* rc5: CNSTI4 *//* 98 */	"$%0",	/* rc5: reg *//* 99 */	"sll $%c,$%0,%1\n",	/* reg: LSHI4(reg,rc5) *//* 100 */	"sll $%c,$%0,%1\n",	/* reg: LSHU4(reg,rc5) *//* 101 */	"sra $%c,$%0,%1\n",	/* reg: RSHI4(reg,rc5) *//* 102 */	"srl $%c,$%0,%1\n",	/* reg: RSHU4(reg,rc5) *//* 103 */	"not $%c,$%0\n",	/* reg: BCOMI4(reg) *//* 104 */	"not $%c,$%0\n",	/* reg: BCOMU4(reg) *//* 105 */	"negu $%c,$%0\n",	/* reg: NEGI4(reg) *//* 106 */	"move $%c,$%0\n",	/* reg: LOADI1(reg) *//* 107 */	"move $%c,$%0\n",	/* reg: LOADU1(reg) *//* 108 */	"move $%c,$%0\n",	/* reg: LOADI2(reg) *//* 109 */	"move $%c,$%0\n",	/* reg: LOADU2(reg) *//* 110 */	"move $%c,$%0\n",	/* reg: LOADI4(reg) *//* 111 */	"move $%c,$%0\n",	/* reg: LOADP4(reg) *//* 112 */	"move $%c,$%0\n",	/* reg: LOADU4(reg) *//* 113 */	"add.s $f%c,$f%0,$f%1\n",	/* reg: ADDF4(reg,reg) *//* 114 */	"add.d $f%c,$f%0,$f%1\n",	/* reg: ADDF8(reg,reg) *//* 115 */	"div.s $f%c,$f%0,$f%1\n",	/* reg: DIVF4(reg,reg) *//* 116 */	"div.d $f%c,$f%0,$f%1\n",	/* reg: DIVF8(reg,reg) *//* 117 */	"mul.s $f%c,$f%0,$f%1\n",	/* reg: MULF4(reg,reg) *//* 118 */	"mul.d $f%c,$f%0,$f%1\n",	/* reg: MULF8(reg,reg) *//* 119 */	"sub.s $f%c,$f%0,$f%1\n",	/* reg: SUBF4(reg,reg) *//* 120 */	"sub.d $f%c,$f%0,$f%1\n",	/* reg: SUBF8(reg,reg) *//* 121 */	"mov.s $f%c,$f%0\n",	/* reg: LOADF4(reg) *//* 122 */	"mov.d $f%c,$f%0\n",	/* reg: LOADF8(reg) *//* 123 */	"neg.s $f%c,$f%0\n",	/* reg: NEGF4(reg) *//* 124 */	"neg.d $f%c,$f%0\n",	/* reg: NEGF8(reg) *//* 125 */	"sll $%c,$%0,8*(4-%a); sra $%c,$%c,8*(4-%a)\n",	/* reg: CVII4(reg) *//* 126 */	"and $%c,$%0,(1<<(8*%a))-1\n",	/* reg: CVUI4(reg) *//* 127 */	"and $%c,$%0,(1<<(8*%a))-1\n",	/* reg: CVUU4(reg) *//* 128 */	"cvt.s.d $f%c,$f%0\n",	/* reg: CVFF4(reg) *//* 129 */	"cvt.d.s $f%c,$f%0\n",	/* reg: CVFF8(reg) *//* 130 */	"mtc1 $%0,$f%c; cvt.s.w $f%c,$f%c\n",	/* reg: CVIF4(reg) *//* 131 */	"mtc1 $%0,$f%c; cvt.d.w $f%c,$f%c\n",	/* reg: CVIF8(reg) *//* 132 */	"trunc.w.s $f2,$f%0,$%c; mfc1 $%c,$f2\n",	/* reg: CVFI4(reg) *//* 133 */	"trunc.w.d $f2,$f%0,$%c; mfc1 $%c,$f2\n",	/* reg: CVFI4(reg) *//* 134 */	"%a:\n",	/* stmt: LABELV *//* 135 */	"b %0\n",	/* stmt: JUMPV(acon) *//* 136 */	".cpadd $%0\nj $%0\n",	/* stmt: JUMPV(reg) *//* 137 */	"j $%0\n",	/* stmt: JUMPV(reg) *//* 138 */	"beq $%0,$%1,%a\n",	/* stmt: EQI4(reg,reg) *//* 139 */	"beq $%0,$%1,%a\n",	/* stmt: EQU4(reg,reg) *//* 140 */	"bge $%0,$%1,%a\n",	/* stmt: GEI4(reg,reg) *//* 141 */	"bgeu $%0,$%1,%a\n",	/* stmt: GEU4(reg,reg) *//* 142 */	"bgt $%0,$%1,%a\n",	/* stmt: GTI4(reg,reg) *//* 143 */	"bgtu $%0,$%1,%a\n",	/* stmt: GTU4(reg,reg) *//* 144 */	"ble $%0,$%1,%a\n",	/* stmt: LEI4(reg,reg) *//* 145 */	"bleu $%0,$%1,%a\n",	/* stmt: LEU4(reg,reg) *//* 146 */	"blt $%0,$%1,%a\n",	/* stmt: LTI4(reg,reg) *//* 147 */	"bltu $%0,$%1,%a\n",	/* stmt: LTU4(reg,reg) *//* 148 */	"bne $%0,$%1,%a\n",	/* stmt: NEI4(reg,reg) *//* 149 */	"bne $%0,$%1,%a\n",	/* stmt: NEU4(reg,reg) *//* 150 */	"c.eq.s $f%0,$f%1; bc1t %a\n",	/* stmt: EQF4(reg,reg) *//* 151 */	"c.eq.d $f%0,$f%1; bc1t %a\n",	/* stmt: EQF8(reg,reg) *//* 152 */	"c.le.s $f%0,$f%1; bc1t %a\n",	/* stmt: LEF4(reg,reg) *//* 153 */	"c.le.d $f%0,$f%1; bc1t %a\n",	/* stmt: LEF8(reg,reg) *//* 154 */	"c.lt.s $f%0,$f%1; bc1t %a\n",	/* stmt: LTF4(reg,reg) *//* 155 */	"c.lt.d $f%0,$f%1; bc1t %a\n",	/* stmt: LTF8(reg,reg) *//* 156 */	"c.lt.s $f%0,$f%1; bc1f %a\n",	/* stmt: GEF4(reg,reg) *//* 157 */	"c.lt.d $f%0,$f%1; bc1f %a\n",	/* stmt: GEF8(reg,reg) *//* 158 */	"c.le.s $f%0,$f%1; bc1f %a\n",	/* stmt: GTF4(reg,reg) *//* 159 */	"c.le.d $f%0,$f%1; bc1f %a\n",	/* stmt: GTF8(reg,reg) *//* 160 */	"c.eq.s $f%0,$f%1; bc1f %a\n",	/* stmt: NEF4(reg,reg) *//* 161 */	"c.eq.d $f%0,$f%1; bc1f %a\n",	/* stmt: NEF8(reg,reg) *//* 162 */	"%a",	/* ar: ADDRGP4 *//* 163 */	"jal %0\n",	/* reg: CALLF4(ar) *//* 164 */	"jal %0\n",	/* reg: CALLF8(ar) *//* 165 */	"jal %0\n",	/* reg: CALLI4(ar) *//* 166 */	"jal %0\n",	/* reg: CALLP4(ar) *//* 167 */	"jal %0\n",	/* reg: CALLU4(ar) *//* 168 */	"jal %0\n",	/* stmt: CALLV(ar) *//* 169 */	"$%0",	/* ar: reg *//* 170 */	"%a",	/* ar: CNSTP4 *//* 171 */	"# ret\n",	/* stmt: RETF4(reg) *//* 172 */	"# ret\n",	/* stmt: RETF8(reg) *//* 173 */	"# ret\n",	/* stmt: RETI4(reg) *//* 174 */	"# ret\n",	/* stmt: RETU4(reg) *//* 175 */	"# ret\n",	/* stmt: RETP4(reg) *//* 176 */	"# ret\n",	/* stmt: RETV(reg) *//* 177 */	"# arg\n",	/* stmt: ARGF4(reg) *//* 178 */	"# arg\n",	/* stmt: ARGF8(reg) *//* 179 */	"# arg\n",	/* stmt: ARGI4(reg) *//* 180 */	"# arg\n",	/* stmt: ARGP4(reg) *//* 181 */	"# arg\n",	/* stmt: ARGU4(reg) *//* 182 */	"# argb %0\n",	/* stmt: ARGB(INDIRB(reg)) *//* 183 */	"# asgnb %0 %1\n",	/* stmt: ASGNB(reg,INDIRB(reg)) */};static char _isinstruction[] = {/* 0 */	0,/* 1 */	1,	/* # read register\n *//* 2 */	1,	/* # read register\n *//* 3 */	1,	/* # read register\n */

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