alpha.c

来自「基于4个mips核的noc设计」· C语言 代码 · 共 2,365 行 · 第 1/5 页

#define INTTMP ((0xff<<1)|(1<<22)|(1<<25)|(1<<27))
#define INTVAR (0x3f<<9)
#define FLTTMP ((0x3f<<10)|(0x1ff<<22))
#define FLTVAR (0xff<<2)

#define INTRET 0x00000001
#define FLTRET 0x00000003

#define readsreg(p) \
        (generic((p)->op)==INDIR && (p)->kids[0]->op==VREG+P)
#define setsrc(d) ((d) && (d)->x.regnode && \
        (d)->x.regnode->set == src->x.regnode->set && \
        (d)->x.regnode->mask&src->x.regnode->mask)

#define relink(a, b) ((b)->x.prev = (a), (a)->x.next = (b))

#include "c.h"
#define NODEPTR_TYPE Node
#define OP_LABEL(p) ((p)->op)
#define LEFT_CHILD(p) ((p)->kids[0])
#define RIGHT_CHILD(p) ((p)->kids[1])
#define STATE_LABEL(p) ((p)->x.state)
static void address(Symbol, Symbol, long);
static void blkfetch(int, int, int, int);
static void blkloop(int, int, int, int, int, int[]);
static void blkstore(int, int, int, int);
static void defaddress(Symbol);
static void defconst(int, int, Value);
static void defstring(int, char *);
static void defsymbol(Symbol);
static void doarg(Node);
static void emit2(Node);
static void export(Symbol);
static void clobber(Node);
static void function(Symbol, Symbol [], Symbol [], int);
static void global(Symbol);
static void import(Symbol);
static void local(Symbol);
static void progbeg(int, char **);
static void progend(void);
static void segment(int);
static void space(int);
static void target(Node);
static Symbol ireg[32], freg[32];
static Symbol iregw, fregw;

static int tmpregs[] = {4, 2, 3};
static Symbol blkreg;

static int cseg;

static char *currentfile;

/*
generated at Tue Dec 18 12:36:59 2007
by $Id: lburg.c,v 2.8 1997/10/30 23:41:10 drh Exp $
*/
static void _kids(NODEPTR_TYPE, int, NODEPTR_TYPE[]);
static void _label(NODEPTR_TYPE);
static int _rule(void*, int);

#define _stmt_NT 1
#define _reg_NT 2
#define _con_NT 3
#define _acon_NT 4
#define _addr_NT 5
#define _rc_NT 6
#define _rc6_NT 7
#define _ar_NT 8

static char *_ntname[] = {
	0,
	"stmt",
	"reg",
	"con",
	"acon",
	"addr",
	"rc",
	"rc6",
	"ar",
	0
};

struct _state {
	short cost[9];
	struct {
		unsigned int _stmt:7;
		unsigned int _reg:8;
		unsigned int _con:4;
		unsigned int _acon:2;
		unsigned int _addr:4;
		unsigned int _rc:2;
		unsigned int _rc6:2;
		unsigned int _ar:2;
	} rule;
};

static short _nts_0[] = { 0 };
static short _nts_1[] = { _reg_NT, 0 };
static short _nts_2[] = { _con_NT, 0 };
static short _nts_3[] = { _reg_NT, _acon_NT, 0 };
static short _nts_4[] = { _acon_NT, 0 };
static short _nts_5[] = { _addr_NT, 0 };
static short _nts_6[] = { _addr_NT, _reg_NT, 0 };
static short _nts_7[] = { _reg_NT, _rc_NT, 0 };
static short _nts_8[] = { _reg_NT, _rc6_NT, 0 };
static short _nts_9[] = { _reg_NT, _reg_NT, 0 };
static short _nts_10[] = { _ar_NT, 0 };

static short *_nts[] = {
	0,	/* 0 */
	_nts_0,	/* 1 */
	_nts_0,	/* 2 */
	_nts_0,	/* 3 */
	_nts_0,	/* 4 */
	_nts_0,	/* 5 */
	_nts_0,	/* 6 */
	_nts_0,	/* 7 */
	_nts_0,	/* 8 */
	_nts_0,	/* 9 */
	_nts_0,	/* 10 */
	_nts_0,	/* 11 */
	_nts_0,	/* 12 */
	_nts_1,	/* 13 */
	_nts_1,	/* 14 */
	_nts_1,	/* 15 */
	_nts_1,	/* 16 */
	_nts_1,	/* 17 */
	_nts_1,	/* 18 */
	_nts_1,	/* 19 */
	_nts_1,	/* 20 */
	_nts_1,	/* 21 */
	_nts_1,	/* 22 */
	_nts_1,	/* 23 */
	_nts_1,	/* 24 */
	_nts_0,	/* 25 */
	_nts_0,	/* 26 */
	_nts_0,	/* 27 */
	_nts_0,	/* 28 */
	_nts_0,	/* 29 */
	_nts_0,	/* 30 */
	_nts_0,	/* 31 */
	_nts_0,	/* 32 */
	_nts_0,	/* 33 */
	_nts_0,	/* 34 */
	_nts_1,	/* 35 */
	_nts_2,	/* 36 */
	_nts_0,	/* 37 */
	_nts_3,	/* 38 */
	_nts_3,	/* 39 */
	_nts_3,	/* 40 */
	_nts_3,	/* 41 */
	_nts_4,	/* 42 */
	_nts_1,	/* 43 */
	_nts_0,	/* 44 */
	_nts_0,	/* 45 */
	_nts_5,	/* 46 */
	_nts_0,	/* 47 */
	_nts_0,	/* 48 */
	_nts_0,	/* 49 */
	_nts_0,	/* 50 */
	_nts_0,	/* 51 */
	_nts_0,	/* 52 */
	_nts_0,	/* 53 */
	_nts_0,	/* 54 */
	_nts_0,	/* 55 */
	_nts_6,	/* 56 */
	_nts_6,	/* 57 */
	_nts_6,	/* 58 */
	_nts_6,	/* 59 */
	_nts_6,	/* 60 */
	_nts_6,	/* 61 */
	_nts_6,	/* 62 */
	_nts_6,	/* 63 */
	_nts_6,	/* 64 */
	_nts_1,	/* 65 */
	_nts_1,	/* 66 */
	_nts_5,	/* 67 */
	_nts_5,	/* 68 */
	_nts_5,	/* 69 */
	_nts_1,	/* 70 */
	_nts_1,	/* 71 */
	_nts_5,	/* 72 */
	_nts_5,	/* 73 */
	_nts_1,	/* 74 */
	_nts_1,	/* 75 */
	_nts_1,	/* 76 */
	_nts_1,	/* 77 */
	_nts_5,	/* 78 */
	_nts_1,	/* 79 */
	_nts_1,	/* 80 */
	_nts_1,	/* 81 */
	_nts_1,	/* 82 */
	_nts_5,	/* 83 */
	_nts_1,	/* 84 */
	_nts_1,	/* 85 */
	_nts_1,	/* 86 */
	_nts_1,	/* 87 */
	_nts_5,	/* 88 */
	_nts_1,	/* 89 */
	_nts_5,	/* 90 */
	_nts_5,	/* 91 */
	_nts_6,	/* 92 */
	_nts_6,	/* 93 */
	_nts_7,	/* 94 */
	_nts_7,	/* 95 */
	_nts_7,	/* 96 */
	_nts_7,	/* 97 */
	_nts_7,	/* 98 */
	_nts_7,	/* 99 */
	_nts_7,	/* 100 */
	_nts_7,	/* 101 */
	_nts_7,	/* 102 */
	_nts_7,	/* 103 */
	_nts_7,	/* 104 */
	_nts_7,	/* 105 */
	_nts_2,	/* 106 */
	_nts_1,	/* 107 */
	_nts_7,	/* 108 */
	_nts_7,	/* 109 */
	_nts_7,	/* 110 */
	_nts_7,	/* 111 */
	_nts_7,	/* 112 */
	_nts_7,	/* 113 */
	_nts_7,	/* 114 */
	_nts_7,	/* 115 */
	_nts_7,	/* 116 */
	_nts_7,	/* 117 */
	_nts_7,	/* 118 */
	_nts_7,	/* 119 */
	_nts_7,	/* 120 */
	_nts_7,	/* 121 */
	_nts_7,	/* 122 */
	_nts_7,	/* 123 */
	_nts_7,	/* 124 */
	_nts_7,	/* 125 */
	_nts_7,	/* 126 */
	_nts_7,	/* 127 */
	_nts_7,	/* 128 */
	_nts_7,	/* 129 */
	_nts_0,	/* 130 */
	_nts_0,	/* 131 */
	_nts_1,	/* 132 */
	_nts_8,	/* 133 */
	_nts_8,	/* 134 */
	_nts_8,	/* 135 */
	_nts_8,	/* 136 */
	_nts_8,	/* 137 */
	_nts_8,	/* 138 */
	_nts_8,	/* 139 */
	_nts_8,	/* 140 */
	_nts_1,	/* 141 */
	_nts_1,	/* 142 */
	_nts_1,	/* 143 */
	_nts_1,	/* 144 */
	_nts_1,	/* 145 */
	_nts_1,	/* 146 */
	_nts_1,	/* 147 */
	_nts_1,	/* 148 */
	_nts_1,	/* 149 */
	_nts_1,	/* 150 */
	_nts_1,	/* 151 */
	_nts_1,	/* 152 */
	_nts_1,	/* 153 */
	_nts_1,	/* 154 */
	_nts_1,	/* 155 */
	_nts_9,	/* 156 */
	_nts_9,	/* 157 */
	_nts_9,	/* 158 */
	_nts_9,	/* 159 */
	_nts_9,	/* 160 */
	_nts_9,	/* 161 */
	_nts_9,	/* 162 */
	_nts_9,	/* 163 */
	_nts_1,	/* 164 */
	_nts_1,	/* 165 */
	_nts_1,	/* 166 */
	_nts_1,	/* 167 */
	_nts_1,	/* 168 */
	_nts_1,	/* 169 */
	_nts_1,	/* 170 */
	_nts_1,	/* 171 */
	_nts_1,	/* 172 */
	_nts_1,	/* 173 */
	_nts_1,	/* 174 */
	_nts_1,	/* 175 */
	_nts_1,	/* 176 */
	_nts_1,	/* 177 */
	_nts_1,	/* 178 */
	_nts_5,	/* 179 */
	_nts_5,	/* 180 */
	_nts_5,	/* 181 */
	_nts_5,	/* 182 */
	_nts_1,	/* 183 */
	_nts_1,	/* 184 */
	_nts_0,	/* 185 */
	_nts_4,	/* 186 */
	_nts_1,	/* 187 */
	_nts_8,	/* 188 */
	_nts_8,	/* 189 */
	_nts_8,	/* 190 */
	_nts_8,	/* 191 */
	_nts_8,	/* 192 */
	_nts_8,	/* 193 */
	_nts_8,	/* 194 */
	_nts_8,	/* 195 */
	_nts_8,	/* 196 */
	_nts_8,	/* 197 */
	_nts_8,	/* 198 */
	_nts_8,	/* 199 */
	_nts_8,	/* 200 */
	_nts_8,	/* 201 */
	_nts_8,	/* 202 */
	_nts_8,	/* 203 */
	_nts_8,	/* 204 */
	_nts_8,	/* 205 */
	_nts_8,	/* 206 */
	_nts_8,	/* 207 */
	_nts_8,	/* 208 */
	_nts_8,	/* 209 */
	_nts_8,	/* 210 */
	_nts_8,	/* 211 */
	_nts_9,	/* 212 */
	_nts_9,	/* 213 */
	_nts_9,	/* 214 */
	_nts_9,	/* 215 */
	_nts_9,	/* 216 */
	_nts_9,	/* 217 */
	_nts_9,	/* 218 */
	_nts_9,	/* 219 */
	_nts_9,	/* 220 */
	_nts_9,	/* 221 */
	_nts_9,	/* 222 */
	_nts_9,	/* 223 */
	_nts_0,	/* 224 */
	_nts_1,	/* 225 */
	_nts_10,	/* 226 */
	_nts_10,	/* 227 */
	_nts_10,	/* 228 */
	_nts_10,	/* 229 */
	_nts_10,	/* 230 */
	_nts_10,	/* 231 */
	_nts_10,	/* 232 */
	_nts_10,	/* 233 */
	_nts_1,	/* 234 */
	_nts_1,	/* 235 */
	_nts_1,	/* 236 */
	_nts_1,	/* 237 */
	_nts_1,	/* 238 */
	_nts_1,	/* 239 */
	_nts_1,	/* 240 */
	_nts_1,	/* 241 */
	_nts_1,	/* 242 */
	_nts_1,	/* 243 */
	_nts_1,	/* 244 */
	_nts_1,	/* 245 */
	_nts_1,	/* 246 */
	_nts_1,	/* 247 */
	_nts_1,	/* 248 */
	_nts_1,	/* 249 */
	_nts_9,	/* 250 */
};

static char *_templates[] = {
/* 0 */	0,
/* 1 */	"# read register\n",	/* reg: INDIRI1(VREGP) */
/* 2 */	"# read register\n",	/* reg: INDIRU1(VREGP) */
/* 3 */	"# read register\n",	/* reg: INDIRI2(VREGP) */
/* 4 */	"# read register\n",	/* reg: INDIRU2(VREGP) */
/* 5 */	"# read register\n",	/* reg: INDIRF4(VREGP) */
/* 6 */	"# read register\n",	/* reg: INDIRI4(VREGP) */
/* 7 */	"# read register\n",	/* reg: INDIRP4(VREGP) */
/* 8 */	"# read register\n",	/* reg: INDIRU4(VREGP) */
/* 9 */	"# read register\n",	/* reg: INDIRF8(VREGP) */
/* 10 */	"# read register\n",	/* reg: INDIRI8(VREGP) */
/* 11 */	"# read register\n",	/* reg: INDIRP8(VREGP) */
/* 12 */	"# read register\n",	/* reg: INDIRU8(VREGP) */
/* 13 */	"# write register\n",	/* stmt: ASGNI1(VREGP,reg) */
/* 14 */	"# write register\n",	/* stmt: ASGNU1(VREGP,reg) */
/* 15 */	"# write register\n",	/* stmt: ASGNI2(VREGP,reg) */
/* 16 */	"# write register\n",	/* stmt: ASGNU2(VREGP,reg) */
/* 17 */	"# write register\n",	/* stmt: ASGNF4(VREGP,reg) */
/* 18 */	"# write register\n",	/* stmt: ASGNI4(VREGP,reg) */
/* 19 */	"# write register\n",	/* stmt: ASGNP4(VREGP,reg) */
/* 20 */	"# write register\n",	/* stmt: ASGNU4(VREGP,reg) */
/* 21 */	"# write register\n",	/* stmt: ASGNF8(VREGP,reg) */
/* 22 */	"# write register\n",	/* stmt: ASGNI8(VREGP,reg) */
/* 23 */	"# write register\n",	/* stmt: ASGNP8(VREGP,reg) */
/* 24 */	"# write register\n",	/* stmt: ASGNU8(VREGP,reg) */
/* 25 */	"%a",	/* con: CNSTI1 */
/* 26 */	"%a",	/* con: CNSTU1 */
/* 27 */	"%a",	/* con: CNSTI2 */
/* 28 */	"%a",	/* con: CNSTU2 */
/* 29 */	"%a",	/* con: CNSTI4 */
/* 30 */	"%a",	/* con: CNSTU4 */
/* 31 */	"%a",	/* con: CNSTP4 */
/* 32 */	"%a",	/* con: CNSTI8 */
/* 33 */	"%a",	/* con: CNSTU8 */
/* 34 */	"%a",	/* con: CNSTP8 */
/* 35 */	"",	/* stmt: reg */
/* 36 */	"%0",	/* acon: con */
/* 37 */	"%a",	/* acon: ADDRGP8 */
/* 38 */	"%1($%0)",	/* addr: ADDI4(reg,acon) */
/* 39 */	"%1($%0)",	/* addr: ADDI8(reg,acon) */
/* 40 */	"%1($%0)",	/* addr: ADDU8(reg,acon) */
/* 41 */	"%1($%0)",	/* addr: ADDP8(reg,acon) */
/* 42 */	"%0",	/* addr: acon */
/* 43 */	"($%0)",	/* addr: reg */
/* 44 */	"%a+%F($sp)",	/* addr: ADDRFP8 */
/* 45 */	"%a+%F($sp)",	/* addr: ADDRLP8 */
/* 46 */	"lda $%c,%0\n",	/* reg: addr */
/* 47 */	"# reg\n",	/* reg: CNSTI1 */
/* 48 */	"# reg\n",	/* reg: CNSTI2 */
/* 49 */	"# reg\n",	/* reg: CNSTI4 */
/* 50 */	"# reg\n",	/* reg: CNSTI8 */
/* 51 */	"# reg\n",	/* reg: CNSTU1 */
/* 52 */	"# reg\n",	/* reg: CNSTU2 */
/* 53 */	"# reg\n",	/* reg: CNSTU4 */
/* 54 */	"# reg\n",	/* reg: CNSTU8 */
/* 55 */	"# reg\n",	/* reg: CNSTP8 */
/* 56 */	"stb $%1,%0\n",	/* stmt: ASGNI1(addr,reg) */
/* 57 */	"stb $%1,%0\n",	/* stmt: ASGNU1(addr,reg) */
/* 58 */	"stw $%1,%0\n",	/* stmt: ASGNI2(addr,reg) */
/* 59 */	"stw $%1,%0\n",	/* stmt: ASGNU2(addr,reg) */
/* 60 */	"stl $%1,%0\n",	/* stmt: ASGNI4(addr,reg) */
/* 61 */	"stl $%1,%0\n",	/* stmt: ASGNU4(addr,reg) */
/* 62 */	"stq $%1,%0\n",	/* stmt: ASGNI8(addr,reg) */
/* 63 */	"stq $%1,%0\n",	/* stmt: ASGNU8(addr,reg) */
/* 64 */	"stq $%1,%0\n",	/* stmt: ASGNP8(addr,reg) */
/* 65 */	"ldb $%c,($%0)\n",	/* reg: INDIRI1(reg) */
/* 66 */	"ldw $%c,($%0)\n",	/* reg: INDIRI2(reg) */
/* 67 */	"ldl $%c,%0\n",	/* reg: INDIRI4(addr) */
/* 68 */	"ldq $%c,%0\n",	/* reg: INDIRI8(addr) */
/* 69 */	"ldq $%c,%0\n",	/* reg: INDIRP8(addr) */
/* 70 */	"ldbu $%c,($%0)\n",	/* reg: INDIRU1(reg) */
/* 71 */	"ldwu $%c,($%0)\n",	/* reg: INDIRU2(reg) */
/* 72 */	"ldl $%c,%0\nzap $%c,240,$%c\n",	/* reg: INDIRU4(addr) */
/* 73 */	"ldq $%c,%0\n",	/* reg: INDIRU8(addr) */
/* 74 */	"ldb $%c,($%0)\n",	/* reg: CVII4(INDIRI1(reg)) */
/* 75 */	"ldb $%c,($%0)\n",	/* reg: CVII8(INDIRI1(reg)) */
/* 76 */	"ldw $%c,($%0)\n",	/* reg: CVII4(INDIRI2(reg)) */
/* 77 */	"ldw $%c,($%0)\n",	/* reg: CVII8(INDIRI2(reg)) */
/* 78 */	"ldl $%c,%0\n",	/* reg: CVII8(INDIRI4(addr)) */
/* 79 */	"ldbu $%c,($%0)\n",	/* reg: CVUU4(INDIRU1(reg)) */
/* 80 */	"ldbu $%c,($%0)\n",	/* reg: CVUU8(INDIRU1(reg)) */
/* 81 */	"ldwu $%c,($%0)\n",	/* reg: CVUU4(INDIRU2(reg)) */
/* 82 */	"ldwu $%c,($%0)\n",	/* reg: CVUU8(INDIRU2(reg)) */
/* 83 */	"ldl $%c,%0\nzap $%c,240,$%c\n",	/* reg: CVUU8(INDIRU4(addr)) */
/* 84 */	"ldbu $%c,($%0)\n",	/* reg: CVUI4(INDIRU1(reg)) */
/* 85 */	"ldbu $%c,($%0)\n",	/* reg: CVUI8(INDIRU1(reg)) */
/* 86 */	"ldwu $%c,($%0)\n",	/* reg: CVUI4(INDIRU2(reg)) */
/* 87 */	"ldwu $%c,($%0)\n",	/* reg: CVUI8(INDIRU2(reg)) */
/* 88 */	"ldl $%c,%0\nzap $%c,240,$%c\n",	/* reg: CVUI8(INDIRU4(addr)) */
/* 89 */	"mov $%0,$%c\n",	/* reg: CVIU8(reg) */
/* 90 */	"lds $f%c,%0\n",	/* reg: INDIRF4(addr) */
/* 91 */	"ldt $f%c,%0\n",	/* reg: INDIRF8(addr) */
/* 92 */	"sts $f%1,%0\n",	/* stmt: ASGNF4(addr,reg) */
/* 93 */	"stt $f%1,%0\n",	/* stmt: ASGNF8(addr,reg) */
/* 94 */	"mull $%0,%1,$%c\n",	/* reg: MULI4(reg,rc) */
/* 95 */	"mulq $%0,%1,$%c\n",	/* reg: MULI8(reg,rc) */
/* 96 */	"mull $%0,%1,$%c\nzap $%c,240,$%c\n",	/* reg: MULU4(reg,rc) */
/* 97 */	"mulq $%0,%1,$%c\n",	/* reg: MULU8(reg,rc) */
/* 98 */	"divl $%0,%1,$%c\n",	/* reg: DIVI4(reg,rc) */
/* 99 */	"divq $%0,%1,$%c\n",	/* reg: DIVI8(reg,rc) */
/* 100 */	"divlu $%0,%1,$%c\n",	/* reg: DIVU4(reg,rc) */
/* 101 */	"divqu $%0,%1,$%c\n",	/* reg: DIVU8(reg,rc) */
/* 102 */	"reml $%0,%1,$%c\n",	/* reg: MODI4(reg,rc) */
/* 103 */	"remq $%0,%1,$%c\n",	/* reg: MODI8(reg,rc) */
/* 104 */	"remlu $%0,%1,$%c\n",	/* reg: MODU4(reg,rc) */
/* 105 */	"remqu $%0,%1,$%c\n",	/* reg: MODU8(reg,rc) */
/* 106 */	"%0",	/* rc: con */
/* 107 */	"$%0",	/* rc: reg */
/* 108 */	"addl $%0,%1,$%c\n",	/* reg: ADDI4(reg,rc) */