minimips.link

来自「基于4个mips核的noc设计」· LINK 代码 · 共 78 行

/**
 * Define the output architecture and format
 */
OUTPUT_ARCH(mips)
OUTPUT_FORMAT(binary)

/**
 * Define the memory layout of the system
 *
 * ROM starting at address "ROM_START_ADDR"
 * RAM starting at address "RAM_START_ADDR"
 */

/* Values used in SECTIONS definition */
"ROM_START_ADDR" = 0x00000; /* virtual machine address */ 
"ROM_LENGTH" = 16k;          /* size of rom */
"RAM_START_ADDR" = 0x05000; /* virtual machine address */
"RAM_LENGTH" = 12288;         /* size of ram */

/* The actual memory layout... */
MEMORY 
{
  rom (rx)  : ORIGIN = 0x0, LENGTH = 16k
  ram (!rx) : ORIGIN = 0x5000, l = 12288
}

/**
 * Sections:
 *
 * ROM contains the text, init and fini sections.
 * RAM contains the data and bss sections.
 * Address and length of sections defined in MEMORY section.
 */
SECTIONS
{
  	.text "ROM_START_ADDR":
  	{
    	*(.text)
  	} >rom

  	.init . : 
	{ 
		*(.init)    
	} >rom =0

  	.fini . : 
	{ 
		*(.fini)    
	} >rom =0

  	_etext = .;
  	PROVIDE(etext = .);

  	.data "RAM_START_ADDR":
  	{
        *(.data) 
		*(.rdata) 
		*(.rodata) 
		*(.sdata)
  	} >ram

  	_edata  =  .;
  	PROVIDE(edata = .);

  	_gp     = .;

  	.bss . :
  	{
    	*(.sbss) 
		*(.scommon) 
		*(.bss) 
		*(COMMON)   
  	} >ram

  	_end        = "RAM_START_ADDR"+"RAM_LENGTH";
  	PROVIDE(end = .);
}