ia64-waw.tbl

来自「基于4个mips核的noc设计」· TBL 代码 · 共 129 行

TBL
129 行
字号 
Resource Name;	Writers;	Writers;	Semantics of DependencyALAT;	IC:mem-readers-alat, IC:mem-writers, chk.a.clr, IC:invala-all;	IC:mem-readers-alat, IC:mem-writers, chk.a.clr, IC:invala-all;	noneAR[BSP];	br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi;	br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi;	impliedFAR[BSPSTORE];	alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE;	alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE;	impliedFAR[CCV];	IC:mov-to-AR-CCV;	IC:mov-to-AR-CCV;	impliedFAR[EC];	br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC;	br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC;	impliedFAR[FPSR].sf0.controls;	IC:mov-to-AR-FPSR, fsetc.s0;	IC:mov-to-AR-FPSR, fsetc.s0;	impliedFAR[FPSR].sf1.controls;	IC:mov-to-AR-FPSR, fsetc.s1;	IC:mov-to-AR-FPSR, fsetc.s1;	impliedFAR[FPSR].sf2.controls;	IC:mov-to-AR-FPSR, fsetc.s2;	IC:mov-to-AR-FPSR, fsetc.s2;	impliedFAR[FPSR].sf3.controls;	IC:mov-to-AR-FPSR, fsetc.s3;	IC:mov-to-AR-FPSR, fsetc.s3;	impliedFAR[FPSR].sf0.flags;	IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0;	IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0;	noneAR[FPSR].sf0.flags;	fclrf.s0, IC:fcmp-s0, IC:fp-arith-s0, IC:fpcmp-s0, IC:mov-to-AR-FPSR;	fclrf.s0, IC:mov-to-AR-FPSR;	impliedFAR[FPSR].sf1.flags;	IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1;	IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1;	noneAR[FPSR].sf1.flags;	fclrf.s1, IC:fcmp-s1, IC:fp-arith-s1, IC:fpcmp-s1, IC:mov-to-AR-FPSR;	fclrf.s1, IC:mov-to-AR-FPSR;	impliedFAR[FPSR].sf2.flags;	IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2;	IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2;	noneAR[FPSR].sf2.flags;	fclrf.s2, IC:fcmp-s2, IC:fp-arith-s2, IC:fpcmp-s2, IC:mov-to-AR-FPSR;	fclrf.s2, IC:mov-to-AR-FPSR;	impliedFAR[FPSR].sf3.flags;	IC:fp-arith-s3, IC:fcmp-s3, IC:fpcmp-s3;	IC:fp-arith-s3, IC:fcmp-s3, IC:fpcmp-s3;	noneAR[FPSR].sf3.flags;	fclrf.s3, IC:fcmp-s3, IC:fp-arith-s3, IC:fpcmp-s3, IC:mov-to-AR-FPSR;	fclrf.s3, IC:mov-to-AR-FPSR;	impliedFAR[FPSR].rv;	IC:mov-to-AR-FPSR;	IC:mov-to-AR-FPSR;	impliedFAR[FPSR].traps;	IC:mov-to-AR-FPSR;	IC:mov-to-AR-FPSR;	impliedFAR[ITC];	IC:mov-to-AR-ITC;	IC:mov-to-AR-ITC;	impliedFAR[K%], % in 0 - 7;	IC:mov-to-AR-K+1;	IC:mov-to-AR-K+1;	impliedFAR[LC];	IC:mod-sched-brs-counted, IC:mov-to-AR-LC;	IC:mod-sched-brs-counted, IC:mov-to-AR-LC;	impliedFAR[PFS];	br.call, brl.call;	br.call, brl.call;	noneAR[PFS];	br.call, brl.call;	IC:mov-to-AR-PFS;	impliedFAR[RNAT];	alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE;	alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE;	impliedFAR[RSC];	IC:mov-to-AR-RSC;	IC:mov-to-AR-RSC;	impliedFAR[UNAT]{%}, % in 0 - 63;	IC:mov-to-AR-UNAT, st8.spill;	IC:mov-to-AR-UNAT, st8.spill;	impliedFAR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111;	IC:none;	IC:none;	noneAR%, % in 48 - 63, 112-127;	IC:mov-to-AR-ig+1;	IC:mov-to-AR-ig+1;	impliedFBR%, % in 0 - 7;	br.call+1, brl.call+1;	IC:mov-to-BR+1;	impliedFBR%, % in 0 - 7;	IC:mov-to-BR+1;	IC:mov-to-BR+1;	impliedFBR%, % in 0 - 7;	br.call+1, brl.call+1;	br.call+1, brl.call+1;	noneCFM;	IC:mod-sched-brs, br.call, brl.call, br.ret, alloc, clrrrb, cover, rfi;	IC:mod-sched-brs, br.call, brl.call, br.ret, alloc, clrrrb, cover, rfi;	impliedFCPUID#;	IC:none;	IC:none;	noneCR[CMCV];	IC:mov-to-CR-CMCV;	IC:mov-to-CR-CMCV;	impliedFCR[DCR];	IC:mov-to-CR-DCR;	IC:mov-to-CR-DCR;	impliedFCR[EOI];	IC:mov-to-CR-EOI;	IC:mov-to-CR-EOI;	SC Section 10.8.3.4CR[GPTA];	IC:mov-to-CR-GPTA;	IC:mov-to-CR-GPTA;	impliedFCR[IFA];	IC:mov-to-CR-IFA;	IC:mov-to-CR-IFA;	impliedFCR[IFS];	IC:mov-to-CR-IFS, cover;	IC:mov-to-CR-IFS, cover;	impliedFCR[IHA];	IC:mov-to-CR-IHA;	IC:mov-to-CR-IHA;	impliedFCR[IIM];	IC:mov-to-CR-IIM;	IC:mov-to-CR-IIM;	impliedFCR[IIP];	IC:mov-to-CR-IIP;	IC:mov-to-CR-IIP;	impliedFCR[IIPA];	IC:mov-to-CR-IIPA;	IC:mov-to-CR-IIPA;	impliedFCR[IPSR];	IC:mov-to-CR-IPSR;	IC:mov-to-CR-IPSR;	impliedFCR[IRR%], % in 0 - 3;	IC:mov-from-CR-IVR;	IC:mov-from-CR-IVR;	impliedFCR[ISR];	IC:mov-to-CR-ISR;	IC:mov-to-CR-ISR;	impliedFCR[ITIR];	IC:mov-to-CR-ITIR;	IC:mov-to-CR-ITIR;	impliedFCR[ITM];	IC:mov-to-CR-ITM;	IC:mov-to-CR-ITM;	impliedFCR[ITV];	IC:mov-to-CR-ITV;	IC:mov-to-CR-ITV;	impliedFCR[IVA];	IC:mov-to-CR-IVA;	IC:mov-to-CR-IVA;	impliedFCR[IVR];	IC:none;	IC:none;	SCCR[LID];	IC:mov-to-CR-LID;	IC:mov-to-CR-LID;	SCCR[LRR%], % in 0 - 1;	IC:mov-to-CR-LRR+1;	IC:mov-to-CR-LRR+1;	impliedFCR[PMV];	IC:mov-to-CR-PMV;	IC:mov-to-CR-PMV;	impliedFCR[PTA];	IC:mov-to-CR-PTA;	IC:mov-to-CR-PTA;	impliedFCR[TPR];	IC:mov-to-CR-TPR;	IC:mov-to-CR-TPR;	impliedFCR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127;	IC:none;	IC:none;	noneDBR#;	IC:mov-to-IND-DBR+3;	IC:mov-to-IND-DBR+3;	impliedFDTC;	ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d;	ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d;	noneDTC;	ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d;	itc.i, itc.d, itr.i, itr.d;	impliedFDTC_LIMIT*;	ptc.g, ptc.ga;	ptc.g, ptc.ga;	impliedFDTR;	itr.d;	itr.d;	impliedFDTR;	itr.d;	ptr.d;	impliedFDTR;	ptr.d;	ptr.d;	noneFR%, % in 0 - 1;	IC:none;	IC:none;	noneFR%, % in 2 - 127;	IC:fr-writers+1, IC:ldf-c+1, IC:ldfp-c+1;	IC:fr-writers+1, IC:ldf-c+1, IC:ldfp-c+1;	impliedFGR0;	IC:none;	IC:none;	noneGR%, % in 1 - 127;	IC:ld-c+1, IC:gr-writers+1;	IC:ld-c+1, IC:gr-writers+1;	impliedFIBR#;	IC:mov-to-IND-IBR+3;	IC:mov-to-IND-IBR+3;	impliedFInService*;	IC:mov-to-CR-EOI, IC:mov-from-CR-IVR;	IC:mov-to-CR-EOI, IC:mov-from-CR-IVR;	SCIP;	IC:all;	IC:all;	noneITC;	ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d;	ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d;	noneITC;	ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d;	itc.i, itc.d, itr.i, itr.d;	impliedFITR;	itr.i;	itr.i, ptr.i;	impliedFITR;	ptr.i;	ptr.i;	nonememory;	IC:mem-writers;	IC:mem-writers;	noneMSR#;	IC:mov-to-IND-MSR+5;	IC:mov-to-IND-MSR+5;	SCPKR#;	IC:mov-to-IND-PKR+3;	IC:mov-to-IND-PKR+4;	nonePKR#;	IC:mov-to-IND-PKR+3;	IC:mov-to-IND-PKR+3;	impliedFPMC#;	IC:mov-to-IND-PMC+3;	IC:mov-to-IND-PMC+3;	impliedFPMD#;	IC:mov-to-IND-PMD+3;	IC:mov-to-IND-PMD+3;	impliedFPR0;	IC:pr-writers+1;	IC:pr-writers+1;	nonePR%, % in 1 - 15;	IC:pr-and-writers+1;	IC:pr-and-writers+1;	nonePR%, % in 1 - 15;	IC:pr-or-writers+1;	IC:pr-or-writers+1;	nonePR%, % in 1 - 15;	IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR-allreg+7;	IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR-allreg+7;	impliedFPR%, % in 16 - 62;	IC:pr-and-writers+1;	IC:pr-and-writers+1;	nonePR%, % in 16 - 62;	IC:pr-or-writers+1;	IC:pr-or-writers+1;	nonePR%, % in 16 - 62;	IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;	IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;	impliedFPR63;	IC:pr-and-writers+1;	IC:pr-and-writers+1;	nonePR63;	IC:pr-or-writers+1;	IC:pr-or-writers+1;	nonePR63;	IC:mod-sched-brs, IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;	IC:mod-sched-brs, IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;	impliedFPSR.ac;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.be;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.bn;	bsw, rfi;	bsw, rfi;	impliedFPSR.cpl;	epc, br.ret, rfi;	epc, br.ret, rfi;	impliedFPSR.da;	rfi;	rfi;	impliedFPSR.db;	IC:mov-to-PSR-l, rfi;	IC:mov-to-PSR-l, rfi;	impliedFPSR.dd;	rfi;	rfi;	impliedFPSR.dfh;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.dfl;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.di;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.dt;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.ed;	rfi;	rfi;	impliedFPSR.i;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.ia;	rfi;	rfi;	impliedFPSR.ic;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.id;	rfi;	rfi;	impliedFPSR.is;	br.ia, rfi;	br.ia, rfi;	impliedFPSR.it;	rfi;	rfi;	impliedFPSR.lp;	IC:mov-to-PSR-l, rfi;	IC:mov-to-PSR-l, rfi;	impliedFPSR.mc;	rfi;	rfi;	impliedFPSR.mfh;	IC:fr-writers+9;	IC:fr-writers+9;	nonePSR.mfh;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:fr-writers+9, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.mfl;	IC:fr-writers+9;	IC:fr-writers+9;	nonePSR.mfl;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:fr-writers+9, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.pk;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.pp;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.ri;	rfi;	rfi;	impliedFPSR.rt;	IC:mov-to-PSR-l, rfi;	IC:mov-to-PSR-l, rfi;	impliedFPSR.si;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.sp;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFPSR.ss;	rfi;	rfi;	impliedFPSR.tb;	IC:mov-to-PSR-l, rfi;	IC:mov-to-PSR-l, rfi;	impliedFPSR.up;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi;	impliedFRR#;	IC:mov-to-IND-RR+6;	IC:mov-to-IND-RR+6;	impliedFRSE;	IC:rse-writers+14;	IC:rse-writers+14;	impliedF

ia64-waw.tbl - 源码说明

本页面展示了「基于4个mips核的noc设计」中的 ia64-waw.tbl 源码文件，采用 TBL 编程语言编写，共 129 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

虫虫下载站收录了大量与mips相关的技术资源，包括源代码、技术文档、电路图等，是电子工程师和嵌入式开发者的专业学习平台。

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?