📄 changelog-9899
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* fr30-asm.c: New file. * fr30-dis.c: New file. * fr30-opc.c: New file. * fr30-opc.h: New file. * po/POTFILES.in: Regenerated * po/opcodes.pot: RegeneratedMon Nov 2 15:05:33 1998 Geoffrey Noer <noer@cygnus.com> * configure.in: detect cygwin* instead of cygwin32* * configure: regenerateTue Oct 27 08:58:37 1998 Gavin Romig-Koch <gavin@cygnus.com> * mips-opc.c (IS_M): Added.Mon Oct 19 13:03:19 1998 Doug Evans <devans@seba.cygnus.com> * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.Fri Oct 9 14:01:56 1998 Doug Evans <devans@seba.cygnus.com> * m32r-opc.h,m32r-opc.c: Regenerate.Sun Oct 4 21:01:44 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386-dis.c (OP_3DNowSuffix): New static function. (OPSUF): Define. (GRP14): Define. (dis386_twobyte): Add GRP14, femms, and 3DNow entries. (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow. (insn_codep): New static variable. (print_insn_x86): Init insn_codep after prefixes. (grps): Add GRP14 entries for prefetch, prefetchw. (OP_REG): Reformat. From Jeff B Epler <jepler@usgs.gov> * i386-dis.c (Suffix3DNow): New table.Wed Sep 30 10:17:50 1998 Nick Clifton <nickc@cygnus.com> * d10v-opc.c: Treat TRAP as if it were a branch type instruction.Mon Sep 28 14:35:43 1998 Martin M. Hunt <hunt@cygnus.com> * d10v-dis.c (print_operand): If num is nonzero, then add OPERAND_ACC1, not OPERAND_ACC0.Thu Sep 24 09:20:03 1998 Nick Clifton <nickc@cygnus.com> * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP insns.Tue Sep 22 17:55:14 1998 Nick Clifton <nickc@cygnus.com> * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit class.Tue Sep 15 15:14:45 1998 Doug Evans <devans@canuck.cygnus.com> * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.1998-09-09 Michael Meissner <meissner@cygnus.com> * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move to/from SPRs.Fri Sep 4 19:42:59 1998 Nick Clifton <nickc@cygnus.com> * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf object files. (print_insn_little_arm): Detect Thumb symbols in elf object files.Sat Aug 29 22:24:09 1998 Richard Henderson <rth@cygnus.com> * alpha-dis.c (print_insn_alpha): Use the machine type to decide which PALcode set to include.Sun Aug 23 02:16:18 1998 Richard Henderson <rth@cygnus.com> * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.Fri Aug 21 16:07:52 1998 Nick Clifton <nickc@cygnus.com> * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS, MSUB and MSUBS instructions.Thu Aug 13 16:23:04 1998 Ian Lance Taylor <ian@cygnus.com> * ppc-opc.c (powerpc_operands): Omit parens around additions in operand name macros.Wed Aug 12 14:00:38 1998 Ian Lance Taylor <ian@cygnus.com> From Peter Jeremy <peter.jeremy@auss2.alcatel.com.au>: * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a, +, -, and d for ColdFire. From Peter Thiemann <thiemann@informatik.uni-tuebingen.de>: * ppc-opc.c (insert_mbe): Handle wrapping bitmasks. (extract_mbe): Likewise.Wed Aug 12 11:11:34 1998 Jeffrey A Law (law@cygnus.com) * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes. * m10300-opc.c: First cut at UDF instructions.Mon Aug 10 14:08:22 1998 Doug Evans <devans@canuck.cygnus.com> * m32r-opc.c: Regenerate (remove semantic descriptions).Mon Aug 10 12:51:12 1998 Catherine Moore <clm@cygnus.com> * arm-dis.c (print_insn_big_arm): Fix indentation. (print_insn_little_arm): Likewise.Sun Aug 9 20:17:28 1998 Catherine Moore <clm@cygnus.com> * arm-dis.c (print_insn_big_arm): Check for thumb symbol attributes. (print_insn_little_arm): Likewise.Mon Aug 3 12:43:16 1998 Doug Evans <devans@seba.cygnus.com> Move all global state data into opcode table struct, and treat opcode table as something that is "opened/closed". * cgen-asm.c (all fns): New first arg of opcode table descriptor. (cgen_asm_init): Delete. (cgen_set_parse_operand_fn): New function. * cgen-dis.c (all fns): New first arg of opcode table descriptor. (cgen_dis_init): Delete. * cgen-opc.c (all fns): New first arg of opcode table descriptor. (cgen_current_{opcode_table_mach,endian}): Delete. * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.Thu Jul 30 21:41:10 1998 Frank Ch. Eigler <fche@cygnus.com> * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some instructions.Tue Jul 28 11:00:09 1998 Jeffrey A Law (law@cygnus.com) * m10300-opc.c: Add entries for "no_match_operands" field in the opcode table.Fri Jul 24 11:41:37 1998 Doug Evans <devans@canuck.cygnus.com> * m32r-asm.c,m32r-opc.c: Regenerate (-Wall cleanups).Tue Jul 21 13:41:07 1998 Doug Evans <devans@seba.cygnus.com> * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.Mon Jul 13 14:53:59 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386-dis.c (ckprefix): Handle fwait specially only when it isn't the first prefix. (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather than `fnstsw %eax'. (OP_J): Remove unnecessary subtraction when 16-bit displacement will be masked later.Thu Jul 2 17:11:27 1998 Doug Evans <devans@seba.cygnus.com> * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.Wed Jul 1 16:11:16 1998 Doug Evans <devans@seba.cygnus.com> * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.Fri Jun 26 11:08:55 1998 Jeffrey A Law (law@cygnus.com) * m10300-dis.c: Only recognize instructions from the currently selected machine. * m10300-opc.c: Add field indicating the particular variant of the mn10300 each instruction is available on.Fri Jun 26 12:04:21 1998 Ian Lance Taylor <ian@cygnus.com> * configure.in: For bfd_vax_arch, build vax-dis.lo. * Makefile.am: Rebuild dependencies. (CFILES): Add vax-dis.c. (ALL_MACHINES): Add vax-dis.lo. * aclocal.m4: Rebuild with current libtool. * configure, Makefile.in: Rebuild.Fri Jun 26 12:03:20 1998 Klaus Kaempf <kkaempf@progis.de> * vax-dis.c: New file, from work by Pauline Middelink <middelin@polyware.iaf.nl>. * disassemble.c (ARCH_vax): Define if ARCH_all. (disassembler): Add case for ARCH_vax. * makefile.vms: Support compilation on vms/vax.Tue Jun 23 19:42:18 1998 Mark Alexander <marka@cygnus.com> * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities related to sign extension and the size of ints.Tue Jun 23 10:59:26 1998 Jeffrey A Law (law@cygnus.com) * m10300-opc.c: Support one operand "asr", "lsr" and "asl" instructions. Support (sp) addressing mode by expanding it into (0,sp).Sat Jun 20 14:46:20 1998 Frank Ch. Eigler <fche@cygnus.com> * mips-dis.c (_print_insn_mips): Fix argument interchange typo.Fri Jun 19 09:16:42 1998 Mark Alexander <marka@cygnus.com> * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.1998-06-18 Ulrich Drepper <drepper@cygnus.com> * i386-dis.c: Add support for fxsave, fxrstor, sysenter and sysexit.Thu Jun 18 10:22:24 1998 John Metzler <jmetzler@cygnus.com> * mips-dis.c (print_insn_little_mips): Previously, instruction printing references the symbol table to determine whether the instruction resides in a block regular instructions or mips16 instructions. However, when the disassembler gets used in other environments where the symbol table is not present, we no longer rely in the symbol table, rather, use the low bit of the instructions address to guess. There should be no change for usage of the disassembler in host based programs, gdb, objdump. (print_insn_big_mips): ditto. (print_insn_mips): dittoWed Jun 17 21:19:01 1998 Mark Alexander <marka@cygnus.com> * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.Wed Jun 17 17:49:23 1998 Jeffrey A Law (law@cygnus.com) * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".Tue Jun 16 13:10:51 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386-dis.c (index16): Add '%' to register names. Use ',' instead of '+'.Sat Jun 13 11:33:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386-dis.c: Don't print opcode suffix when we can figure out the size (and gas can!) by register operands, or from the default size. (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C' macro to 'E'. (dis386, dis386_twobyte, grps): Use new suffix macros. (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse order of cmps operands to agree with Intel docs. Correct operand of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to agree with Intel docs. (print_insn_x86): Print orphan fwait before other prefixes. Return correct byte count for orphan fwait with prefixes. Don't print `bound' operands in reverse order. (ckprefix): Stop accumulating prefixes if we get fwait. (OP_DIR): Print `$' before Ap operands of ljmp, lcall.Fri Jun 12 13:40:38 1998 Tom Tromey <tromey@cygnus.com> * po/Make-in (all-yes): If maintainer mode, depend on .pot file. ($(PACKAGE).pot): Unconditionally depend on POTFILES.Fri Jun 12 11:04:06 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> Fix problems when bfd_vma is wider than long. * i386-dis.c: Make op_address and start_pc unsigned. (set_op): Make parameter unsigned. (print_insn_x86): Cast to bfd_vma when passing a value to print_address_func. * ns32k-dis.c (CORE_ADDR): Don't define. (print_insn_ns32k): Change type of addr to bfd_vma. Use bfd_scan_vma to read back address. (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma to format it. * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow. (NEXTULONG): New definition. (print_insn_m68k): Avoid overflow when computing third argument of print_insn_arg. (print_insn_arg): Use NEXTULONG to fetch 32 bit address values. Use disp instead of val to store offset values. (print_indexed): Use base_disp instead of word to store base displacement, to avoid overflow. * m10300-dis.c (disassemble): Cast value to long when computing pc-relative address, to get correct sign extension.Wed Jun 10 15:58:37 1998 Doug Evans <devans@canuck.cygnus.com> * m32r-opc.c: Regenerate.Tue Jun 9 14:27:57 1998 Nick Clifton <nickc@cygnus.com> * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as 'mov rX, rY'. Patch courtesy of Tony Thompson <Tony.Thompson@arm.com>Mon Jun 8 18:17:21 1998 Nick Clifton <nickc@cygnus.com> * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.Fri Jun 5 23:47:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_* functions to void. (OP_DSreg): Rename from OP_DSSI. (OP_ESreg): Rename from OP_ESDI. (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode. (DSBX): Define. (append_seg): Rename from append_prefix. (ptr_reg): New function. (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave. Add DSBX for xlat. (PREFIX_ADDR): Rename from PREFIX_ADR. (float_reg): Add non-broken opcodes for people who don't want UNIXWARE_COMPAT.Fri Jun 5 19:15:04 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on 68000/68008/68010.Wed Jun 3 18:56:22 1998 H.J. Lu <hjl@gnu.org> * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".Tue Jun 2 15:06:46 1998 Geoff Keating <geoffk@ozemail.com.au> * ppc-opc.c (powerpc_macros): Support shifts and rotates of size 0; produce error message for shifts of size 32 (or 64 for 64-bit shifts), because the hardware doesn't support them.Wed May 27 15:29:13 1998 Nick Clifton <nickc@cygnus.com> * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b, LONG_2, LONG_2b formats to use this new operand.Tue May 26 20:47:48 1998 Stan Cox <scox@cygnus.com> * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.Tue May 26 20:45:33 1998 Mark Alexander <marka@cygnus.com> * sparc-dis.c (print_insn_sparc): big endian instruction / little endian data support.Tue May 26 16:14:39 1998 Nick Clifton <nickc@cygnus.com> * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3 and SHORT_B3b formats to use Rb instead of Ra. Add FLAG_MUL16 to MUL2XH opcode. Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension to existing 1.1.1 parallelisation prohibition procedure.Fri May 22 16:00:00 1998 Doug Evans <devans@canuck.cygnus.com> * m32r-asm.c,m32r-dis.c: Regenerate.Tue May 19 17:36:08 1998 Ian Lance Taylor <ian@cygnus.com> * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly with a shift count of 0.Fri May 15 14:58:31 1998 Doug Evans <devans@seba.cygnus.com> * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup. (cgen_hw_lookup_by_num): New function.Wed May 13 17:03:59 1998 Doug Evans <devans@canuck.cygnus.com> * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).Wed May 13 14:34:31 1998 Mark Alexander <marka@cygnus.com> * sparc-dis.c (print_insn_sparc): Always fetch instructions as big-endian on SPARClite.Tue May 12 11:46:31 1998 Richard Henderson <rth@cygnus.com> * d30v-opc.c (pre_defined_register): Remove alias for r0.Sun May 10 22:37:22 1998 Jeffrey A Law (law@cygnus.com) * po/Make-in (install-info): New target.Thu May 7 17:15:59 1998 Ian Lance Taylor <ian@cygnus.com> * configure.in (WIN32LIBADD): Add -lintl on cygwin32. * configure: Rebuild.Thu May 7 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com> * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand variety of ISA2 instructions to set bottom ten bits of trap code.Thu May 7 11:54:25 1998 Ian Lance Taylor <ian@cygnus.com> * Makefile.am (config.status): Add explicit target so that config.status depends upon bfd/configure.in. * Makefile.in: Rebuild.Thu May 7 09:33:02 1998 Frank Ch. Eigler <fche@cygnus.com> * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1 instructions to set bottom ten bits of break code. * mips-dis.c (print_insn_arg): Implement 'q' operand format used for above optional argument.Wed May 6 15:30:06 1998 Klaus Kaempf <kkaempf@progis.de> * makefile.vms: Run dec c with /nodebug.
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