changelog-9297

来自「基于4个mips核的noc设计」· 代码 · 共 1,888 行 · 第 1/5 页

Tue Sep 10 16:12:39 1996  Fred Fish  <[e-mail]>

	* mips-dis.c (print_insn_arg): Add prototype.
	(_print_insn_mips): Ditto.

Mon Sep  9 14:26:26 1996  Ian Lance Taylor  <[e-mail]>

	* mips-dis.c (print_insn_arg): Print condition code registers as
	$fccN.

Tue Sep  3 12:09:46 1996  Doug Evans  <[e-mail]>

	* sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.

Tue Sep  3 12:05:25 1996  Jeffrey A Law  ([e-mail])

	* v850-dis.c (disassemble): Make static.  Provide prototype.

Sun Sep  1 22:30:40 1996  Jeffrey A Law  ([e-mail])

	* v850-opc.c (insert_d9, insert_d22): Fix boundary case
	in range checks.

Sat Aug 31 01:27:26 1996  Jeffrey A Law  ([e-mail])

	* v850-dis.c (disassemble): Handle insertion of ',', '[' and
	']' characters into the output stream.
	* v850-opc.c (v850_opcodes: Remove size field from all opcodes.
	Add "memop" field to all opcodes (for the disassembler).
	Reorder opcodes so that "nop" comes before "mov" and "jr"
	comes before "jarl".

	* v850-dis.c (print_insn_v850): Fix typo in last change.

	* v850-dis.c (print_insn_v850): Properly handle disassembling
	a two byte insn at the end of a memory region when the memory
	region's size is only two byte aligned.

	* v850-dis.c (v850_cc_names): Fix stupid thinkos.

	* v850-dis.c (v850_reg_names): Define.
	(v850_sreg_names, v850_cc_names): Likewise.
	(disassemble): Very rough cut at printing operands (unformatted).

	* v850-opc.c (BOP_MASK): Fix.
	(v850_opcodes): Fix mask for jarl and jr.

	* v850-dis.c: New file.  Skeleton for disassembler support.
	* Makefile.in Remove v850 references, they're not needed here.
	* configure.in: Add v850-dis.o when building v850 toolchains.
	* configure: Rebuilt.
	* disassemble.c (disassembler): Call v850 disassembler.

	* v850-opc.c (insert_d8_7, extract_d8_7): New functions.
	(insert_d8_6, extract_d8_6): New functions.
	(v850_operands): Rename D7S to D7; operand for D7 is unsigned.
	Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
	Add D8_6.
	(IF4A, IF4B): Use "D7" instead of "D7S".
	(IF4C, IF4D): Use "D8_7" instead of "D8".
	(IF4E, IF4F): New.  Use "D8_6".
	(v850_opcodes): Use IF4A/IF4B for sld.b/sst.b.  Use IF4C/IF4D for
	sld.h/sst.h.  Use IF4E/IF4F for sld.w/sst.w.

	* v850-opc.c (insert_d16_15, extract_d16_15): New functions.
	(v850_operands): Change D16 to D16_15, use special insert/extract
	routines.  New new D16 that uses the generic insert/extract code.
	(IF7A, IF7B): Use D16_15.
	(IF7C, IF7D): New.  Use D16.
	(v850_opcodes): Use IF7C and IF7D for ld.b and st.b.

	* v850-opc.c (insert_d9, insert_d22): Slightly improve error
	message.  Issue an error if the branch offset is odd.

	* v850-opc.c: Add notes about needing special insert/extract
	for all the load/store insns, except "ld.b" and "st.b".

	* v850-opc.c (insert_d22, extract_d22): New functions.
	(v850_operands): Use insert_d22 and extract_d22 for
	D22 operands.
	(insert_d9): Fix range check.

Fri Aug 30 18:01:02 1996  J.T. Conklin  <[e-mail]>

	* v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
	and set bits field to D9 and D22 operands.

Thu Aug 29 11:10:46 1996  Jeffrey A Law  ([e-mail])

	* v850-opc.c (v850_operands): Define SR2 operand.
	(v850_opcodes): "ldsr" uses R1,SR2.

	* v850-opc.c (v850_opcodes): Fix opcode specs for
	sld.w, sst.b, sst.h, sst.w, and nop.

Wed Aug 28 15:55:43 1996  Jeffrey A Law  ([e-mail])

	* v850-opc.c (v850_opcodes): Add null opcode to mark the
	end of the opcode table.

Mon Aug 26 13:35:53 1996  Martin M. Hunt  <[e-mail]>

	* d10v-opc.c (pre_defined_registers): Added register pairs,
	"r0-r1", "r2-r3", etc.

Fri Aug 23 00:27:01 1996  Jeffrey A Law  ([e-mail])

	* v850-opc.c (v850_operands): Make I16 be a signed operand.
	Create I16U for an unsigned 16bit mmediate operand.
	(v850_opcodes): Use I16U for "ori", "andi" and "xori".

	* v850-opc.c (v850_operands): Define EP operand.
	(IF4A, IF4B, IF4C, IF4D): Use EP.

	* v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
	with immediate operand, "movhi".  Tweak "ldsr".

	* v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
	correct.  Get sld.[bhw] and sst.[bhw] closer.

	* v850-opc.c (v850_operands): "not" is a two byte insn

	* v850-opc.c (v850_opcodes): Correct bit pattern for setf.

	* v850-opc.c (v850_operands): D16 inserts at offset 16!

	* v850-opc.c (two): Get order of words correct.

	* v850-opc.c (v850_operands): I16 inserts at offset 16!

	* v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
	register source and destination operands.
	(v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".

	* v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode.  Fix
	same thinko in "trap" opcode.

	* v850-opc.c (v850_opcodes): Add initializer for size field
	on all opcodes.

	* v850-opc.c (v850_operands): D6 -> DS7.  References changed.
	Add D8 for 8-bit unsigned field in short load/store insns.
	(IF4A, IF4D): These both need two registers.
	(IF4C, IF4D): Define.  Use 8-bit unsigned field.
	(v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
	IF4C & IF4D.  For "trap" use I5U, not I5.  Add IF1 operand
	for "ldsr" and "stsr".
	* v850-opc.c (v850_operands): 3-bit immediate for bit insns
	is unsigned.

	* v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
	short store word (sst.w).

Thu Aug 22 16:57:27 1996  J.T. Conklin  <[e-mail]>

	* v850-opc.c (v850_operands): Added insert and extract fields,
	pointers to functions that handle unusual operand encodings.

Thu Aug 22 01:05:24 1996  Jeffrey A Law  ([e-mail])

	* v850-opc.c (v850_opcodes): Enable "trap".

	* v850-opc.c (v850_opcodes): Fix order of displacement
	and register for "set1", "clr1", "not1", and "tst1".

Wed Aug 21 18:46:26 1996  Jeffrey A Law  ([e-mail])

	* v850-opc.c (v850_operands): Add "B3" support.
	(v850_opcodes): Fix and enable "set1", "clr1", "not1"
	and "tst1".

	* v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.

	* v850-opc.c: Close unterminated comment.

Wed Aug 21 17:31:26 1996  J.T. Conklin  <[e-mail]>

	* v850-opc.c (v850_operands): Add flags field.
	(v850_opcodes): add move opcodes.

Tue Aug 20 14:41:03 1996  J.T. Conklin  <[e-mail]>

	* Makefile.in (ALL_MACHINES): Add v850-opc.o.
	* configure: (bfd_v850v_arch) Add new case.
	* configure.in: (bfd_v850_arch) Add new case.
	* v850-opc.c: New file.

Mon Aug 19 15:21:38 1996  Doug Evans  <[e-mail]>

	* sparc-dis.c (print_insn_sparc): Handle little endian sparcs.

Thu Aug 15 13:14:43 1996  Martin M. Hunt  <[e-mail]>

	* d10v-opc.c: Add additional information to the opcode
	table to help determinine which instructions can be done
	in parallel.

Thu Aug 15 13:11:13 1996  Stan Shebs  <[e-mail]>

	* mpw-make.sed: Update editing of include pathnames to be
	more general.

Thu Aug 15 16:28:41 1996  James G. Smith  <[e-mail]>

	* arm-opc.h: Added "bx" instruction definition.

Wed Aug 14 17:00:04 1996  Richard Henderson  <[e-mail]>

	* alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.

Mon Aug 12 14:30:37 1996  Martin M. Hunt  <[e-mail]>

	* d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.

Fri Aug  9 13:21:59 1996  Martin M. Hunt  <[e-mail]>

	* d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.

Thu Aug  8 12:43:52 1996  Klaus Kaempf  <[e-mail]>

	* makefile.vms: Update for alpha-opc changes.

Wed Aug  7 11:55:10 1996  Ian Lance Taylor  <[e-mail]>

	* i386-dis.c (print_insn_i386): Actually return the correct value.
	(ONE, OP_ONE): #ifdef out; not used.

Fri Aug  2 17:47:03 1996  Martin M. Hunt  <[e-mail]>

	* d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
	Changed subi operand type to treat 0 as 16.

Wed Jul 31 16:21:41 1996  Ian Lance Taylor  <[e-mail]>

	* m68k-opc.c: Add cpushl for the mcf5200.  From Ken Rose
	<[e-mail]>.

Wed Jul 31 14:39:27 1996  James G. Smith  <[e-mail]>

	* arm-opc.h: (arm_opcodes): Added halfword and sign-extension
	memory transfer instructions. Add new format string entries %h and %s.
	* arm-dis.c: (print_insn_arm): Provide decoding of the new
	formats %h and %s.

Fri Jul 26 11:45:04 1996  Martin M. Hunt  <[e-mail]>

	* d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
	(d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.

Fri Jul 26 14:01:43 1996  Ian Lance Taylor  <[e-mail]>

	* alpha-dis.c (print_insn_alpha_osf): Remove.
	(print_insn_alpha_vms): Remove.
	(print_insn_alpha): Make globally visible.  Chose the register
	names based on info->flavour.
	* disassemble.c: Always return print_insn_alpha for the alpha.

Thu Jul 25 15:24:17 1996  Martin M. Hunt  <[e-mail]>

	* d10v-dis.c (dis_long): Handle unknown opcodes.

Thu Jul 25 12:08:09 1996  Martin M. Hunt  <[e-mail]>

	* d10v-opc.c: Changes to support signed and unsigned numbers.
	All instructions with the same name that have long and short forms
	now end in ".l" or ".s".  Divs added.
	* d10v-dis.c: Changes to support signed and unsigned numbers.

Tue Jul 23 11:02:53 1996  Martin M. Hunt  <[e-mail]>

	* d10v-dis.c: Change all functions to use info->print_address_func.

Mon Jul 22 15:38:53 1996  Andreas Schwab  <[e-mail]>

	* m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
	move ccr/sr insns more strict so that the disassembler only
	selects them when the addressing mode is data register.

Mon Jul 22 11:25:24 1996  Martin M. Hunt  <[e-mail]>
	* d10v-opc.c (pre_defined_registers):  Declare.
	* d10v-dis.c (print_operand): Now uses pre_defined_registers
	to pick a better name for the registers.

Mon Jul 22 13:47:23 1996  Ian Lance Taylor  <[e-mail]>

	* sparc-opc.c: Fix opcode values for fpack16, and fpackfix.  Fix
	operands for fexpand and fpmerge.  From Christian Kuehnke
	<[e-mail]>.

Mon Jul 22 13:17:06 1996  Richard Henderson  <[e-mail]>

	* alpha-dis.c (print_insn_alpha): No longer the user-visible
	print routine.  Take new regnames and cpumask arguments.
	Kill the environment variable nonsense.
	(print_insn_alpha_osf): New function.  Do OSF/1 style regnames.
	(print_insn_alpha_vms): New function.  Do VMS style regnames.
	* disassemble.c (disassembler): Test bfd flavour to pick
	between OSF and VMS routines.  Default to OSF.

Thu Jul 18 17:19:34 1996  Ian Lance Taylor  <[e-mail]>

	* configure.in: Call AC_SUBST (INSTALL_SHLIB).
	* configure: Rebuild.
	* Makefile.in (install): Use @INSTALL_SHLIB@.

Wed Jul 17 14:39:05 1996  Martin M. Hunt  <[e-mail]>

	* configure: (bfd_d10v_arch) Add new case.
	* configure.in: (bfd_d10v_arch) Add new case.
	* d10v-dis.c: New file.
	* d10v-opc.c: New file.
	* disassemble.c (disassembler) Add entry for d10v.

Wed Jul 17 10:12:05 1996  J.T. Conklin  <[e-mail]>

	* m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
	to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.

Mon Jul 15 16:59:55 1996  Stu Grossman  ([e-mail])

	* i386-dis.c:  Get rid of print_insn_i8086.  Use info.mach to
	distinguish between variants of the instruction set.
	* sparc-dis.c:  Get rid of print_insn_sparclite.  Use info.mach to
	distinguish between variants of the instruction set.

Fri Jul 12 10:12:01 1996  Stu Grossman  ([e-mail])

	* i386-dis.c (print_insn_i8086):  New routine to disassemble using
	the 8086 instruction set.
	* i386-dis.c:  General cleanups.  Make most things static.  Add
	prototypes.  Get rid of static variables aflags and dflags.  Pass
	them as args (to almost everything).

Thu Jul 11 11:58:44 1996  Jeffrey A Law  ([e-mail])

	* h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.

	* h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".

	* h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
	if the next arg is marked with SRC_IN_DST.  Gross.

	* h8300-dis.c (bfd_h8_disassemble): Print "exr" when
	we're looking for and find EXR.

	* h8300-dis.c (bfd_h8_disassemble): We don't have a match
	if we're looking for KBIT and we don't find it.

	* h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
	for L_3 and L_2.

	* h8300-dis.c (bfd_h8_disassemble): Don't set plen for
	3bit immediate operands.

Tue Jul  9 10:55:20 1996  Ian Lance Taylor  <[e-mail]>

	* Released binutils 2.7.

	* alpha-opc.c: Add new case of "mov".  From Klaus Kaempf
	<[e-mail]>.

Thu Jul  4 11:42:51 1996  Ian Lance Taylor  <[e-mail]>

	* alpha-opc.c: Correct second case of "mov" to use OPRL.

Wed Jul  3 16:03:47 1996  Stu Grossman  ([e-mail])

	* sparc-dis.c (print_insn_sparclite):  New routine to print
	sparclite instructions.

Wed Jul  3 14:21:18 1996  J.T. Conklin  <[e-mail]>

	* m68k-opc.c (m68k_opcodes): Add coldfire support.

Fri Jun 28 15:53: