changelog-9297

来自「基于4个mips核的noc设计」· 代码 · 共 1,888 行 · 第 1/5 页

	* tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.

Wed Feb 26 15:34:48 1997  Michael Meissner  <[e-mail]>

	* tic80-opc.c (tic80_predefined_symbols): Define r25 properly.

Wed Feb 26 13:38:30 1997  Andreas Schwab  <[e-mail]>

	* m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
	floatformat_to_double to make portable.
	(print_insn_arg): Use NEXTEXTEND macro when extracting extended
	precision float.

Mon Feb 24 19:26:12 1997  Dawn Perchik  <[e-mail]>

	* mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
	and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.

Mon Feb 24 15:19:01 1997  Martin M. Hunt  <[e-mail]>

	* d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
	d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.

Mon Feb 24 14:33:26 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (LSI_SCALED): Renamed from this ...
	(OFF_SL_BR_SCALED): ... to this, and added the flag
	TIC80_OPERAND_BASEREL to the flags word.
	(tic80_opcodes): Replace all occurances of LSI_SCALED with
	OFF_SL_BR_SCALED.

Sat Feb 22 21:25:00 1997  Dawn Perchik  <[e-mail]>

	* mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
	Change mips_opcodes from const array to a pointer,
	and change bfd_mips_num_opcodes from const int to int,
	so that we can increase the size of the mips opcodes table
	dynamically.

Sat Feb 22 21:03:47 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_predefined_symbols): Revert change to
	store BITNUM values in the table in one's complement form
	to match behavior when assembler is given a raw numeric
	value for a BITNUM operand.
	* tic80-dis.c (print_operand_bitnum): Ditto.

Fri Feb 21 16:31:18 1997  Martin M. Hunt  <[e-mail]>

	* d30v-opc.c: Removed references to FLAG_X.

Wed Feb 19 14:51:20 1997  Ian Lance Taylor  <[e-mail]>

	* Makefile.in: Add dependencies on ../bfd/bfd.h as required.

Tue Feb 18 17:43:43 1997  Martin M. Hunt  <[e-mail]>

	* Makefile.in: Added d30v object files.
	* configure: (bfd_d30v_arch) Rebuilt.
	* configure.in: (bfd_d30v_arch) Added new case.
	* d30v-dis.c: New file.
	* d30v-opc.c: New file.
	* disassemble.c (disassembler) Add entry for d30v.

Tue Feb 18 16:32:08 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_predefined_symbols): Add symbolic
	representations for the floating point BITNUM values.

Fri Feb 14 12:14:05 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
	in the table in one's complement form, as they appear in the
	actual instruction.
	(tic80_symbol_to_value): Use macros to access predefined
	symbol fields.
	(tic80_value_to_symbol): Ditto.
	(tic80_next_predefined_symbol): New function.
	* tic80-dis.c (print_operand_bitnum): Remove code that did
	one's complement for BITNUM values.

Thu Feb 13 21:56:51 1997  Klaus Kaempf  <[e-mail]>

	* makefile.vms: Remove 8 bit characters.  Update to latest
	gcc release.

Thu Feb 13 20:41:22 1997  Philippe De Muyter  <[e-mail]>

	* m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.

Thu Feb 13 16:30:02 1997  Jeffrey A Law  ([e-mail])

	* mn10200-opc.c (IMM16_PCREL): This is a signed operand.
	(IMM24_PCREL): Likewise.

Thu Feb 13 13:28:43 1997  Ian Lance Taylor  <[e-mail]>

	* mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
	address for an extended PC relative instruction that is not a
	branch.

Wed Feb 12 12:27:40 1997  Andreas Schwab  <[e-mail]>

	* m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
	bytes_per_line.

Tue Feb 11 16:36:31 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
	(tic80_opcodes): Sort entries so that long immediate forms
	come after short immediate forms, making it easier for
	assembler to select the right one for a given operand.

Tue Feb 11 15:26:47 1997  Ian Lance Taylor  <[e-mail]>

	* mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
	display_endian.
	(print_insn_mips16): Likewise.

Mon Feb 10 10:12:41 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_symbol_to_value): Changed to accept
	a symbol class that restricts translation to just that
	class (general register, condition code, etc).

Thu Feb  6 17:34:09 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
	and REG_DEST_E for register operands that have to be
	an even numbered register.  Add REG_FPA for operands that
	are one of the floating point accumulator registers.
	Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
	(tic80_opcodes): Change entries that need even numbered
	register operands to use the new operand table entries.
	Add "or" entries that are identical to "or.tt" entries.

Wed Feb  5 11:12:44 1997  Ian Lance Taylor  <[e-mail]>

	* mips16-opc.c: Add new cases of exit instruction for
	disassembler.
	* mips-dis.c (print_mips16_insn_arg): Display floating point
	registers in operands of exit instruction.  Print `$' before
	register names in operands of entry and exit instructions.

Thu Jan 30 14:09:03 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_predefined_symbols): Table of name/value
	pairs for all predefined symbols recognized by the assembler.
	Also used by the disassembling routines.
	(tic80_symbol_to_value): New function.
	(tic80_value_to_symbol): New function.
	* tic80-dis.c (print_operand_control_register,
	print_operand_condition_code, print_operand_bitnum):
	Remove private tables and use tic80_value_to_symbol function.

Thu Jan 30 11:30:45 1997  Martin M. Hunt  <[e-mail]>

	* d10v-dis.c (print_operand): Change address printing
	to correctly handle PC wrapping.  Fixes PR11490.

Wed Jan 29 09:39:17 1997  Jeffrey A Law  ([e-mail])

	* mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
	branches relaxable.

Tue Jan 28 15:57:34 1997  Ian Lance Taylor  <[e-mail]>

	* mips-dis.c (print_insn_mips16): Set insn_info information.
	(print_mips16_insn_arg): Likewise.

	* mips-dis.c (print_insn_mips16): Better handling of an extend
	opcode followed by an instruction which can not be extended.

Fri Jan 24 12:08:21 1997  J.T. Conklin  <[e-mail]>

	* m68k-opc.c (m68k_opcodes): Changed operand specifier for the
	coldfire moveb instruction to not allow an address register as
	destination.  Although the documentation does not indicate that
	this is invalid, experiments uncovered unexpected behavior.
	Added a comment explaining the situation.  Thanks to Andreas
	Schwab for pointing this out to me.

Wed Jan 22 20:13:51 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_opcodes): Expand comment to note that the
	entries are presorted so that entries with the same mnemonic are
	adjacent to each other in the table.  Sort the entries for each
	instruction so that this is true.

Mon Jan 20 12:48:57 1997  Andreas Schwab  <[e-mail]>

	* m68k-dis.c: Include <libiberty.h>.
	(print_insn_m68k): Sort the opcode table on the most significant
	nibble of the opcode.

Sat Jan 18 15:15:05 1997  Fred Fish  <[e-mail]>

	* tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
	"vsub", "vst", "xnor", and "xor" instructions.
	(V_a1): Renamed from V_a, msb of accumulator reg number.
	(V_a0): Add macro, lsb of accumulator reg number.

Fri Jan 17 18:24:31 1997  Fred Fish  <[e-mail]>

	* tic80-dis.c (print_insn_tic80): Broke excessively long
	function up into several smaller ones and arranged for
	the instruction printing function to be callable recursively
	to print vector instructions that have both a load and a
	math instruction packed into a single opcode.
	* tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
	to explain why it comes after the other vector opcodes.

Fri Jan 17 16:19:15 1997  J.T. Conklin  <[e-mail]>

	* m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
	move insns to handle immediate operands.

Thu Jan 17 16:19:00 1997  Andreas Schwab  <[e-mail]>

	* m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
	fix operand mask in the "moveml" entries for the coldfire.

Thu Jan 16 20:54:40 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
	New macros for building vector instruction opcodes.
	(tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
	FMT_LI, which were unused.  The field is now a flags field.
	Remove some opcodes that are possible, but illegal, such
	as long immediate instructions with doubles for immediate
	values.  Add "vadd" and "vld" instructions.

Wed Jan 15 18:59:51 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_operands): Reorder some table entries to make
	the order more logical.  Move the shift alias instructions ("rotl",
	"shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
	interspersed with the regular sr.x and sl.x instructions.  Add
	and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
	"sub", "subu", "swcr", and "trap".

Tue Jan 14 19:42:50 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
	(OFF_SL_PC): Renamed from OFF_SL.
	(OFF_SS_BR): New operand type for base relative operand.
	(OFF_SL_BR): New operand type for base relative operand.
	(REG_BASE): New operand type for base register operand.
	(tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
	"frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
	"ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
	instructions.
	* tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
	10 char field, padded with spaces on rhs, rather than a string
	followed by a tab.  Use renamed TIC80_OPERAND_PCREL flag bit rather
	than old TIC80_OPERAND_RELATIVE.  Add support for new
	TIC80_OPERAND_BASEREL flag bit.

Mon Jan 13 15:58:56 1997  Fred Fish  <[e-mail]>

	* tic80-dis.c (print_insn_tic80): Print floating point operands
	as floats.
	* tic80-opc.c (SPFI): Add single precision floating point
	immediate operand type.
	(ROTATE): Add rotate operand type for shifts.
	(ENDMASK): Add for shifts.
	(n): Macro for the 'n' bit.
	(i): Macro for the 'i' bit.
	(PD): Macro for the 'PD' field.
	(P2): Macro for the 'P2' field.
	(P1): Macro for the 'P1' field.
	(tic80_opcodes): Add entries for "exts", "extu", "fadd",
	"fcmp", and "fdiv".

Mon Jan  6 15:06:55 1997  Jeffrey A Law  ([e-mail])

	* mn10200-dis.c (disassemble): Mask off unwanted bits after
	adding in current address for pc-relative operands.

Mon Jan  6 10:56:25 1997  Fred Fish  <[e-mail]>

	* tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
	(print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
	* tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
	changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
	(SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
	REG_BASE_M_SI, REG_BASE_M_LI respectively.
	(REG_SCALED, LSI_SCALED): New operand types.
	(E): New macro for 'E' bit at bit 27.
	(tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
	opcodes, including the various size flavors (b,h,w,d) for
	the direct load and store instructions.

Sun Jan  5 12:18:14 1997  Fred Fish  <[e-mail]>

	* tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
	in an instruction.
	* tic80-dis.c (print_insn_tic80): Change comma and paren handling.
	Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
	* tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
	(F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New	bit-twiddlers.
	(MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
	masks with "MASK_* & ~M_*" to get the M bit reset.
	(tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.

Sat Jan  4 19:05:05 1997  Fred Fish  <[e-mail]>

	* tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
	correctly.  Add support for printing TIC80_OPERAND_BITNUM and
	TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
	form.
	* tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
	CC, SICR, and LICR table entries.
	(tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
	"bcnd", and "brcr" opcodes.

Fri Jan  3 18:32:11 1997  Fred Fish  <[e-mail]>

	* ppc-opc.c (powerpc_operands): Make comment match the
	actual fields (no shift field).
	* sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
	* tic80-dis.c (print_insn_tic80): Replace abort stub with a
	partial implementation, work in progress.
	* tic80-opc.c (tic80_operands): Begin construction operands table.
	(tic80_opcodes): Continue populating opcodes table and start
	filling in the operand indices.
	(tic80_num_opcodes): Add this.

Fri Jan  3 12:13:52 1997  Ian Lance Taylor  <[e-mail]>

	* m68k-opc.c: Add #B case for moveq.

Thu Jan  2 12:14:29 1997  Jeffrey A Law  ([e-mail])

	* mn10300-dis.c (disassemble): Make sure all variables are initialized
	before they are used.

Tue Dec 31 12:20:38 1996  Jeffrey A Law  ([e-mail])

	* v850-opc.c (v850_opcodes): Put curly-braces around operands
	for "breakpoint" instruction.

Tue Dec 31 15:38:13 1996  Ian Lance Taylor  <[e-mail]>

	* Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
	(dep): Use ALL_CFLAGS rather than CFLAGS.

Tue Dec 31 15:09:16 1996  Michael Meissner  <[e-mail]>

	* v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
	flag.

Mon Dec 30 17:02:11 1996  Fred Fish  <[e-mail]>

	* Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
	(tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.

Mon Dec 30 11:38:01 1996  Ian Lance Taylor  <[e-mail]>

	* mips16-opc.c: Add "abs".

Sun Dec 29 10:58:22 1996  Fred Fish  <[e-mail]>

	* Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
	* disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
	(disassembler): Add bfd_arch_tic80 support to set disassemble
	to print_insn_tic80.
	* tic80-dis.c (print_insn_tic80): Add stub.

Fri Dec 27 22:30:57 1996  Fred Fish  <[e-mail]>

	* configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
	* configure: Regenerate with autoconf.
	* tic80-dis.c: Add file.
	* tic80-opc.c: Add file.

Fri Dec 20 14:30:19 1996  Martin M. Hunt  <[e-mail]>