changelog-9297

来自「基于4个mips核的noc设计」· 代码 · 共 1,888 行 · 第 1/5 页

Mon Dec 22 12:37:06 1997  Ian Lance Taylor  <[e-mail]>

	* mips-opc.c: Add FP_D to s.d instruction flags.

Wed Dec 17 11:38:29 1997  Andreas Schwab  <[e-mail]>

	* m68k-opc.c (halt, pulse): Enable them on the 68060.

Tue Dec 16 15:22:53 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
	PC relative offset forms before the 15 bit forms.  An assembler command
	line option now chooses the default.

Tue Dec 16 15:22:51 1997  Michael Meissner  <[e-mail]>

	* d30v-opc.c (d30v_opcode_table): Set new flags bits
	FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.

1997-12-15  Brendan Kehoe  <[e-mail]>

	* configure: Only build libopcodes shared if --enable-shared's value
	was `yes', or was set to `*opcodes*'.
	* aclocal.m4: Likewise.
	* NOTE: this really needs to be fixed in libtool/libtool.m4, the
	original source of this bit of code.  It's not clear what the best fix
	would be, though.

Fri Dec 12 11:57:04 1997  Fred Fish  <[e-mail]>

	* tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
	(tic80_opcodes): Reorder table entries to put the 32 bit PC relative
	offset forms before the 15 bit forms, to default to the long forms.

Fri Dec 12 01:32:30 1997  Richard Henderson  <[e-mail]>

	* alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.

Wed Dec 10 17:42:35 1997  Nick Clifton  <[e-mail]>

	* arm-dis.c (print_insn_little_arm): Prevent examination of stored
	symbol if none is present.
	(print_insn_big_arm):  Prevent examination of stored symbol if
	none is present.

Thu Oct 23 21:13:37 1997  Fred Fish  <[e-mail]>

	* d10v-opc.c (d10v_opcodes): Correct entry for RTE.

Mon Dec  8 11:21:07 1997  Nick Clifton  <[e-mail]>

	* disassemble.c: Remove disasm_symaddr() function.

	* arm-dis.c: Use info->symbol instead of info->flags to determine
	if disassmbly should be in Thumb or Arm mode.

Tue Dec  2 09:54:27 1997  Nick Clifton  <[e-mail]>

	* arm-dis.c: Add support for disassembling Thumb opcodes.
	(print_insn_thumb): New function.

	* disassemble.c (disasm_symaddr): New function.

	* arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
	(thumb_opcodes): Table of Thumb opcodes.

Mon Dec  1 12:25:57 1997  Andreas Schwab  <[e-mail]>

	* m68k-opc.c (btst): Change Dd@s to Dd;b.

	* m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
	and 'v' as operand types.

Mon Dec  1 11:56:50 1997  Ian Lance Taylor  <[e-mail]>

	* m68k-opc.c: Add argument for lpstop.  From Olivier Carmona
	<[e-mail]>.
	* m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
	which has a two word opcode with a one word argument.

Sun Nov 23 22:25:21 1997  Michael Meissner  <[e-mail]>

	* d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
	unsigned, not signed.
	(d30v_format_table): Add SHORT_CMPU cases for cmpu.

Tue Nov 18 23:10:03 1997  J"orn Rennecke  <[e-mail]>

	* d10v-dis.c (print_operand):
	Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.

Tue Nov 18 18:45:14 1997  J"orn Rennecke  <[e-mail]>

	* d10v-opc.c (OPERAND_FLAG): Split into:
	(OPERAND_FFLAG, OPERAND_CFLAG) .
	(FSRC): Split into:
	(FFSRC, CFSRC).

Thu Nov 13 11:05:33 1997  Gavin Koch  <[e-mail]>

	* mips-opc.c: Move the INSN_MACRO ISA value to the membership
	field for all INSN_MACRO's.
	* mips16-opc.c: same

Wed Nov 12 10:16:57 1997  Gavin Koch  <[e-mail]>

	* mips-opc.c (sync,cache): These are 3900 insns.

Tue Nov 11 23:53:41 1997  J"orn Rennecke <[e-mail]>

	sh-opc.h (sh_table): Remove ftst/nan.

Tue Oct 28 17:59:32 1997  Ken Raeburn  <[e-mail]>

	* mips-opc.c (ffc, ffs): Fix mask.

Tue Oct 28 16:34:54 1997  Michael Meissner  <[e-mail]>

	* d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
	control registers.

Mon Oct 27 22:34:03 1997  Ken Raeburn  <[e-mail]>

	* mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
	(WR_HILO, RD_HILO, MOD_HILO): New macros.

Mon Oct 27 22:34:03 1997  Ken Raeburn  <[e-mail]>

	* mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
	(WR_HILO, RD_HILO, MOD_HILO): New macros.

Thu Oct 23 14:57:58 1997  Nick Clifton  <[e-mail]>

	* v850-dis.c (disassemble): Replace // with /* ... */

Wed Oct 22 17:33:21 1997  Richard Henderson  <[e-mail]>

	* sparc-opc.c: Add wr & rd for v9a asr's.
	* sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
	(v9a_asr_reg_names): New variable.
	Patch from David Miller <[e-mail]>.

Wed Oct 22 17:18:02 1997  Richard Henderson  <[e-mail]>

	* sparc-opc.c (v9notv9a): New insn type.
	(IMPDEP): Move to the end to not conflict with edge8 et al.
	Patch from David Miller <[e-mail]>.

Fri Oct 17 13:18:53 1997  Gavin Koch  <[e-mail]>

	* mips-opc.c (bnezl,beqzl): Mark these as also tx39.

Thu Oct 16 11:55:20 1997  Gavin Koch  <[e-mail]>

	* mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.

Tue Oct 14 16:10:31 1997  Nick Clifton  <[e-mail]>

	* v850-dis.c (disassemble): Use new symbol_at_address_func() field
	of disassemble_info structure to determine if an overlay address
	has a matching symbol in low memory.

	* dis-buf.c (generic_symbol_at_address): New (dummy) function for
	new symbol_at_address_func field in disassemble_info structure.

Fri Oct 10 16:44:52 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c (extract_d22): Use signed arithmatic.

Tue Oct  7 23:40:43 1997  Gavin Koch  <[e-mail]>

	* mips-opc.c: Three op mult is not an ISA insn.

Tue Oct  7 23:37:21 1997  Gavin Koch  <[e-mail]>

	* mips-opc.c: Fix formatting.

Fri Oct  3 17:26:54 1997  Ian Lance Taylor  <[e-mail]>

	* i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
	than assuming that char is signed.  Explicitly sign extend 16 bit
	values, rather than assuming that short is 16 bits.
	(OP_sI, OP_J, OP_DIR): Likewise.

Thu Oct  2 13:36:45 1997  Nick Clifton  <[e-mail]>

	* v850-dis.c (v850_sreg_names): Use symbolic names for higher
	system registers.

Wed Oct  1 16:58:54 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c: Fix typo in comment.

	* v850-dis.c (disassemble): Add test of processor type when
	determining opcodes.

Wed Oct  1 14:10:20 1997  Ian Lance Taylor  <[e-mail]>

	* configure.in: Use a diversion to set enable_shared before the
	arguments are parsed.
	* configure: Rebuild.

Thu Sep 25 13:04:59 1997  Ian Lance Taylor  <[e-mail]>

	* m68k-opc.c (TBL1): Use ! rather than `.
	* m68k-dis.c (print_insn_arg): Remove ` operand specifier.

Wed Sep 24 11:29:35 1997  Ian Lance Taylor  <[e-mail]>

	* m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.

	* m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.

	* m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
	for mcf5200.

	* configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
	* aclocal.m4: Rebuild with new libtool.
	* configure: Rebuild.

Fri Sep 19 11:45:49 1997  Andrew Cagney  <[e-mail]>

	* v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.

Thu Sep 18 11:21:43 1997  Doug Evans  <[e-mail]>

	* sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.

Tue Sep 16 15:18:20 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c (v850_opcodes): Further rearrangements.

Tue Sep 16 16:12:11 1997  Ken Raeburn  <[e-mail]>

	* d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.

Tue Sep 16 09:48:50 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c (v850_opcodes): Fields reordered to allow assembler
	parser to work.

Tue Sep 16 10:01:00 1997  Gavin Koch  <[e-mail]>

	* mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.

Mon Sep 15 18:31:52 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c: Initialise processors field of v850_opcode structure.

Wed Aug 27 21:42:39 1997  Ken Raeburn  <[e-mail]>

	Merge changes from Martin Hunt:

	* d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.

	* d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
	(d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
	rot2h, sra2h, and srl2h to use new SHORT_A5S format.

	* d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.

	* d30v-dis.c (print_insn): First operand of d*i (delayed
	branch) instructions is relative.

	* d30v-opc.c (d30v_opcode_table): Change form for repeati.
	(d30v_operand_table): Add IMM6S3 type.
	(d30v_format_table): Change SHORT_D2. Add LONG_Db.

	* d30v-dis.c: Fix bug with ".s" and ".l" extensions
	and cmp instructions.

	* d30v-opc.c: Correct entries for repeat*, and sat*.
	Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
	types. Correct several formats.

	* d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.

	* d30v-opc.c (pre_defined_registers): Change control registers.

	* d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
	SHORT_C2.  Manual was incorrect.

	* d30v-dis.c (lookup_opcode):  Return value now indicates
	if an opcode has a short and a long form.  Used for deciding
	to append a ".s" or ".l".
	(print_insn): Append a ".s" to an instruction if it is
	the short form and ".l" if it is a long form. Do not append
	anything if the instruction has only one possible size.

	* d30v-opc.c: Change mulx2h to require an even register.
	New form: SHORT_A2; a SHORT_A form that needs an even
	register as the first operand.

	* d30v-dis.c (print_insn_d30v): Fix problem where the last
	instruction was not being disassembled if there were an odd
	number of instructions.

	* d30v-opc.c (SHORT_M2, LONG_M2):  Two new forms.

Fri Sep 12 11:43:54 1997  Nick Clifton  <[e-mail]>

	* v850-dis.c (disassemble): Improved display of register lists.

Thu Sep 11 17:35:10 1997  Doug Evans  <[e-mail]>

	* sparc-opc.c (sparc_opcodes): Fix assembler args to
	fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
	fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
	fandnot1s, fandnot2s.

Tue Sep  9 10:03:49 1997  Doug Evans  <[e-mail]>

	* sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.

Mon Sep  8 14:06:59 1997  Doug Evans  <[e-mail]>

	* cgen-asm.c (cgen_parse_address): New argument resultp.
	All callers updated.
	* m32r-asm.c (parse_h_hi16): Right shift numbers by 16.

Tue Sep  2 18:39:08 1997  Jeffrey A Law  ([e-mail])

	* mn10200-dis.c (disassemble): PC relative instructions are
	relative to the next instruction, not the current instruction.

Tue Sep  2 15:41:55 1997  Nick Clifton  <[e-mail]>

	* v850-dis.c (disassemble): Only signed extend values that are not
	returned by extract functions.
	Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.

Tue Sep  2 15:39:40 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c: Update comments.  Remove use of
	V850_OPERAND_ADJUST_SHORT_MEMORY.  Fix several operand patterns.

Tue Aug 26 09:42:28 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c (MOVHI): Immediate parameter is unsigned.

Mon Aug 25 15:58:07 1997  Christopher Provenzano  <[e-mail]>

	* configure: Rebuilt with latest devo autoconf for NT support.

Fri Aug 22 10:35:15 1997  Nick Clifton  <[e-mail]>

	* v850-dis.c (disassemble): Use curly brace syntax for register
	lists.

	* v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
	where r0 is being used as a destination register.

Thu Aug 21 11:09:09 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.

Tue Aug 19 10:59:59 1997  Richard Henderson  <[e-mail]>

	* alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.

Mon Aug 18 11:10:03 1997  Nick Clifton  <[e-mail]>

	* v850-opc.c (v850_opcodes[]): Remove use of flag field.
	* v850-opc.c (v850_opcodes[]): Add support for reversed short load
	opcodes..

Mon Aug 18 11:08:25 1997  Nick Clifton  <[e-mail]>

	* configure (cgen_files): Add support for v850e target.
	* configure.in (cgen_files):  Add support for v850e target.

Mon Aug 18 11:08:25 1997  Nick Clifton  <[e-mail]>

	* configure (cgen_files): Add support for v850ea target.
	* configure.in (cgen_files):  Add support for v850ea target.

Fri Aug 15 05:17:48 1997  Doug Evans  <[e-mail]>