m68k-opc.c

来自「基于4个mips核的noc设计」· C语言 代码 · 共 1,095 行 · 第 1/5 页

{"cas2w",     two(0006374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },
{"cas2w",     two(0006374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },
{"cas2l",     two(0007374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },
{"cas2l",     two(0007374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },

{"casb",	two(0005300, 0), two(0177700, 0177070),	"D3D2~s", m68020up },
{"casw",	two(0006300, 0), two(0177700, 0177070),	"D3D2~s", m68020up },
{"casl",	two(0007300, 0), two(0177700, 0177070),	"D3D2~s", m68020up },

{"chk2b", two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
{"chk2w", two(0001300,0004000),	two(0177700,07777), "!sR1", m68020up | cpu32 },
{"chk2l", two(0002300,0004000),	two(0177700,07777), "!sR1", m68020up | cpu32 },

{"chkl",	one(0040400),		one(0170700), ";lDd", m68000up },
{"chkw",	one(0040600),		one(0170700), ";wDd", m68000up },

#define SCOPE_LINE (0x1 << 3)
#define SCOPE_PAGE (0x2 << 3)
#define SCOPE_ALL  (0x3 << 3)

{"cinva",	one(0xf400|SCOPE_ALL),  one(0xff38), "ce",   m68040up },
{"cinvl",	one(0xf400|SCOPE_LINE), one(0xff38), "ceas", m68040up },
{"cinvp",	one(0xf400|SCOPE_PAGE), one(0xff38), "ceas", m68040up },

{"cpusha",	one(0xf420|SCOPE_ALL),  one(0xff38), "ce",   m68040up },
{"cpushl",	one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up | mcf },
{"cpushp",	one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up },

#undef SCOPE_LINE
#undef SCOPE_PAGE
#undef SCOPE_ALL

{"clrb",	one(0041000),	one(0177700), "$s", m68000up | mcf },
{"clrw",	one(0041100),	one(0177700), "$s", m68000up | mcf },
{"clrl",	one(0041200),	one(0177700), "$s", m68000up | mcf },

{"cmp2b",	two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
{"cmp2w",	two(0001300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },
{"cmp2l",	two(0002300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },

{"cmpaw",	one(0130300),	one(0170700), "*wAd", m68000up },
{"cmpal",	one(0130700),	one(0170700), "*lAd", m68000up | mcf },

{"cmpib",	one(0006000),	one(0177700), "#b@s", m68000up },
{"cmpib",	one(0006000),	one(0177700), "#bDs", mcf5407 },
{"cmpiw",	one(0006100),	one(0177700), "#w@s", m68000up },
{"cmpiw",	one(0006100),	one(0177700), "#wDs", mcf5407 },
{"cmpil",	one(0006200),	one(0177700), "#l@s", m68000up },
{"cmpil",	one(0006200),	one(0177700), "#lDs", mcf },

{"cmpmb",	one(0130410),	one(0170770), "+s+d", m68000up },
{"cmpmw",	one(0130510),	one(0170770), "+s+d", m68000up },
{"cmpml",	one(0130610),	one(0170770), "+s+d", m68000up },

/* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions.  */
{"cmpb",	one(0006000),	one(0177700), "#b@s", m68000up },
{"cmpb",	one(0006000),	one(0177700), "#bDs", mcf5407 },
{"cmpb",	one(0130410),	one(0170770), "+s+d", m68000up },
{"cmpb",	one(0130000),	one(0170700), ";bDd", m68000up },
{"cmpb",	one(0130000),	one(0170700), "*bDd", mcf5407 },
{"cmpw",	one(0130300),	one(0170700), "*wAd", m68000up },
{"cmpw",	one(0006100),	one(0177700), "#w@s", m68000up },
{"cmpw",	one(0006100),	one(0177700), "#wDs", mcf5407 },
{"cmpw",	one(0130510),	one(0170770), "+s+d", m68000up },
{"cmpw",	one(0130100),	one(0170700), "*wDd", m68000up | mcf5407 },
{"cmpl",	one(0130700),	one(0170700), "*lAd", m68000up | mcf },
{"cmpl",	one(0006200),	one(0177700), "#l@s", m68000up },
{"cmpl",	one(0006200),	one(0177700), "#lDs", mcf },
{"cmpl",	one(0130610),	one(0170770), "+s+d", m68000up },
{"cmpl",	one(0130200),	one(0170700), "*lDd", m68000up | mcf },

{"dbcc",	one(0052310),	one(0177770), "DsBw", m68000up },
{"dbcs",	one(0052710),	one(0177770), "DsBw", m68000up },
{"dbeq",	one(0053710),	one(0177770), "DsBw", m68000up },
{"dbf",		one(0050710),	one(0177770), "DsBw", m68000up },
{"dbge",	one(0056310),	one(0177770), "DsBw", m68000up },
{"dbgt",	one(0057310),	one(0177770), "DsBw", m68000up },
{"dbhi",	one(0051310),	one(0177770), "DsBw", m68000up },
{"dble",	one(0057710),	one(0177770), "DsBw", m68000up },
{"dbls",	one(0051710),	one(0177770), "DsBw", m68000up },
{"dblt",	one(0056710),	one(0177770), "DsBw", m68000up },
{"dbmi",	one(0055710),	one(0177770), "DsBw", m68000up },
{"dbne",	one(0053310),	one(0177770), "DsBw", m68000up },
{"dbpl",	one(0055310),	one(0177770), "DsBw", m68000up },
{"dbt",		one(0050310),	one(0177770), "DsBw", m68000up },
{"dbvc",	one(0054310),	one(0177770), "DsBw", m68000up },
{"dbvs",	one(0054710),	one(0177770), "DsBw", m68000up },

{"divsw",	one(0100700),	one(0170700), ";wDd", m68000up | mcf5307up | mcf5206e },

{"divsl", two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
{"divsl", two(0046100,0004000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
{"divsl", two(0046100,0004000),two(0177700,0107770),"qsDD",   mcf5307up | mcf5206e },

{"divsll", two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
{"divsll", two(0046100,0004000),two(0177700,0107770),";lDD",  m68020up|cpu32 },

{"divuw",	one(0100300),		one(0170700), ";wDd", m68000up | mcf5307up | mcf5206e },

{"divul", two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
{"divul", two(0046100,0000000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
{"divul", two(0046100,0000000),two(0177700,0107770),"qsDD",   mcf5307up | mcf5206e },

{"divull", two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
{"divull", two(0046100,0000000),two(0177700,0107770),";lDD",  m68020up|cpu32 },

{"eorib",	one(0005000),	one(0177700), "#b$s", m68000up },
{"eorib",	one(0005074),	one(0177777), "#bCs", m68000up },
{"eoriw",	one(0005100),	one(0177700), "#w$s", m68000up },
{"eoriw",	one(0005174),	one(0177777), "#wSs", m68000up },
{"eoril",	one(0005200),	one(0177700), "#l$s", m68000up },
{"eoril",	one(0005200),	one(0177700), "#lDs", mcf },
{"eori",	one(0005074),	one(0177777), "#bCs", m68000up },
{"eori",	one(0005174),	one(0177777), "#wSs", m68000up },
{"eori",	one(0005100),	one(0177700), "#w$s", m68000up },

/* The eor opcode can generate the eori instruction.  */
{"eorb",	one(0005000),	one(0177700), "#b$s", m68000up },
{"eorb",	one(0005074),	one(0177777), "#bCs", m68000up },
{"eorb",	one(0130400),	one(0170700), "Dd$s", m68000up },
{"eorw",	one(0005100),	one(0177700), "#w$s", m68000up },
{"eorw",	one(0005174),	one(0177777), "#wSs", m68000up },
{"eorw",	one(0130500),	one(0170700), "Dd$s", m68000up },
{"eorl",	one(0005200),	one(0177700), "#l$s", m68000up },
{"eorl",	one(0005200),	one(0177700), "#lDs", mcf },
{"eorl",	one(0130600),	one(0170700), "Dd$s", m68000up | mcf },
{"eor",		one(0005074),	one(0177777), "#bCs", m68000up },
{"eor",		one(0005174),	one(0177777), "#wSs", m68000up },
{"eor",		one(0005100),	one(0177700), "#w$s", m68000up },
{"eor",		one(0130500),	one(0170700), "Dd$s", m68000up },

{"exg",		one(0140500),	one(0170770), "DdDs", m68000up },
{"exg",		one(0140510),	one(0170770), "AdAs", m68000up },
{"exg",		one(0140610),	one(0170770), "DdAs", m68000up },
{"exg",		one(0140610),	one(0170770), "AsDd", m68000up },

{"extw",	one(0044200),	one(0177770), "Ds", m68000up|mcf },
{"extl",	one(0044300),	one(0177770), "Ds", m68000up|mcf },
{"extbl",	one(0044700),	one(0177770), "Ds", m68020up|cpu32|mcf },

/* float stuff starts here */

{"fabsb",	two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"fabsd",	two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
{"fabsl",	two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
{"fabsp",	two(0xF000, 0x4C18), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fabss",	two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
{"fabsw",	two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
{"fabsx",	two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fabsx",	two(0xF000, 0x4818), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fabsx",	two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt",   mfloat },

{"fsabsb",	two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fsabsd",	two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
{"fsabsl",	two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fsabsp",	two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsabss",	two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
{"fsabsw",	two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fsabsx",	two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsabsx",	two(0xF000, 0x4858), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fsabsx",	two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt",   m68040up },

{"fdabsb",	two(0xF000, 0x585c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up},
{"fdabsd",	two(0xF000, 0x545c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up},
{"fdabsl",	two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up},
{"fdabsp",	two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up},
{"fdabss",	two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up},
{"fdabsw",	two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up},
{"fdabsx",	two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up},
{"fdabsx",	two(0xF000, 0x485c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up},
{"fdabsx",	two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiFt",   m68040up},

{"facosb",	two(0xF000, 0x581C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"facosd",	two(0xF000, 0x541C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
{"facosl",	two(0xF000, 0x401C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
{"facosp",	two(0xF000, 0x4C1C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"facoss",	two(0xF000, 0x441C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
{"facosw",	two(0xF000, 0x501C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
{"facosx",	two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"facosx",	two(0xF000, 0x481C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"facosx",	two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiFt",   mfloat },

{"faddb",	two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"faddd",	two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
{"faddl",	two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
{"faddp",	two(0xF000, 0x4C22), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fadds",	two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
{"faddw",	two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
{"faddx",	two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"faddx",	two(0xF000, 0x4822), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },

{"fsaddb",	two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fsaddd",	two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
{"fsaddl",	two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fsaddp",	two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsadds",	two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
{"fsaddw",	two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fsaddx",	two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsaddx",	two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },

{"fdaddb",	two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fdaddd",	two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
{"fdaddl",	two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdaddp",	two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdadds",	two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
{"fdaddw",	two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fdaddx",	two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdaddx",	two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },

{"fasinb",	two(0xF000, 0x580C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"fasind",	two(0xF000, 0x540C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
{"fasinl",	two(0xF000, 0x400C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
{"fasinp",	two(0xF000, 0x4C0C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fasins",	two(0xF000, 0x440C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
{"fasinw",	two(0xF000, 0x500C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
{"fasinx",	two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fasinx",	two(0xF000, 0x480C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fasinx",	two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiFt",   mfloat },