changelog
来自「基于4个mips核的noc设计」· 代码 · 共 1,275 行 · 第 1/3 页
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2001-06-11 Alan Modra <amodra@bigpond.net.au> Merge from mainline. 2001-06-06 Peter Jakubek <pjak@snafu.de> * m68k-dis.c (print_insn_m68k): Fix typo. * m68k-opc.c (m68k_opcodes): Correct allowed operands for mcf (ColdFire) div, rem and moveb instructions. 2001-06-06 Alan Modra <amodra@bigpond.net.au> * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define. (cond_jump_mode, loop_jcxz_mode): Define. (dis386_att): Add cond_jump_flag and loop_jcxz_flag as appropriate, and 'F' suffix to loop insns. (disx86_64_att): Likewise. (dis386_twobyte_att): Likewise. (print_insn_i386): Don't output addr prefix for loop, jcxz insns. Output data size prefix for long conditional jumps. Output cs and ds branch hints. (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'. (OP_J): Don't make PREFIX_DATA used. 2001-05-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * mips-dis.c (mips_isa_type): Add MIPS r12k support. 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * mips-dis.c (INSNLEN): Rename MAXLEN. (std_reg_names): Replace by mips32_reg_names and mips64_reg_names. (print_insn_arg): Remove $ prefix of register names. (set_mips_isa_type): Remove. (mips_isa_type): New function. (get_mips_isa): New Function. (print_insn_mips): Rename _print_insn_mips. (_print_insn_mips): New function, contains code which was duplicated in print_insn_big_mips and print_insn_little_mips. (print_insn_big_mips): Moved code to _print_insn_mips. (print_insn_little_mips): Likewise. (print_mips16_insn_arg): Remove $ prefix of register names. Print error message before abort. 2001-05-14 J.T. Conklin <jtc@redback.com> * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of simplified mnemonics used for setting PPC750-specific special purpose registers. 2001-03-23 Nick Clifton <nickc@redhat.com> * mips-opc.c: Remove extraneous whitespace. * mips-dis.c: Remove extraneous whitespace. 2001-03-06 Igor Shevlyakov <igor@windriver.com> * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs so command line switches will work. 2001-02-28 Igor Shevlyakov <igor@windriver.com> * m68k-opc.c: fix cpushl according to Motorola. Enable bunch of instructions for Coldfire 5407 and add all new. 2001-02-27 Alan Modra <alan@linuxcare.com.au> * configure.in (BFD_VERSION): Do without grep. * configure: Regenerate. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. 2001-02-20 H.J. Lu <hjl@gnu.org> * Makefile.am (ia64-ic.tbl): Remove the target. (ia64-raw.tbl): Likewise. (ia64-waw.tbl): Likewise. (ia64-war.tbl): Likewise. (ia64-asmtab.c): Generate it in the source directory. * Makefile.in: Regenerated. 2001-02-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl> * mips-dis.c (print_insn_arg): Use top four bits of the address of the following instruction not of the jump itself for the jump target. (print_mips16_insn_arg): Likewise. 2001-02-11 Michael Sokolov <msokolov@ivan.Harhan.ORG> * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build directory. * Makefile.in: Regenerate.2001-06-07 Alan Modra <amodra@bigpond.net.au> * Many files: Update copyright notices.2001-05-23 Alan Modra <amodra@one.net.au> * arc-opc.c: Whitespace changes. Merge from mainline 2001-05-12 Peter Targett <peter.targett@arccores.com> * arc-opc.c (arc_reg_names): Correct attribute for lp_count register to r/w. Formatting fixes throughout file.2001-05-12 Alan Modra <amodra@one.net.au> * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and movq operands. (twobyte_has_modrm): Update table. (need_modrm): Give it file scope. (MODRM_CHECK): Define. (dofloat): Use MODRM_CHECK. (OP_E): Likewise. (OP_EM): Likewise. (OP_EX): Likewise.2001-05-04 Alan Modra <amodra@one.net.au> * i386-dis.c (Ev, Ed): Remove duplicate define. (Gd): Define. (XS): Define. (OP_XS): New function. (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and movmskp operands. (dis386_twobyte_intel): Likewise. (prefix_user_table): Use MS for maskmovq operand. Merge mainline: 2001-04-06 Andreas Jaeger <aj@suse.de> * i386-dis.c: Add ffreep instruction.2001-03-30 Alexandre Oliva <aoliva@redhat.com> * ppc-opc.c (insert_mbe): Shift mask initializer as long.2001-03-24 Alan Modra <alan@linuxcare.com.au> * i386-dis.c (PREGRP25): Define. (dis386_twobyte_att): Use here in place of "movntq" entry. (dis386_twobyte_intel): Likewise. (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq". (PREGRP26): Define. (dis386_twobyte_att): Use here. (dis386_twobyte_intel): Likewise. (prefix_user_table): Add PREGRP26 entry for "punpcklqdq". (prefix_user_table <maskmovdqu>): XM operand, not MX. (prefix_user_table): Cosmetic changes to "bad" entries.2001-03-22 Alan Modra <alan@linuxcare.com.au> * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq. (dis386_twobyte_intel): Likewise. (twobyte_has_modrm): Set entry for paddq, psubq.2001-03-19 Jim Wilson <wilson@redhat.com> * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and notestr if larger than xsect. (in_class): Handle format M5. * ia64-asmtab.c: Regnerate.2001-03-19 John David Anglin <dave@hiauly1.hia.nrc.ca> * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer has more than one byte left to read.2001-02-23 David Mosberger <davidm@hpl.hp.com> * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4". * ia64-asmtab.c: Regenerate.2001-02-21 David Mosberger <davidm@hpl.hp.com> * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two separate variants: one for IMM22 and the other for IMM14. * ia64-asmtab.c: Regenerate. 2001-02-14 Jim Wilson <wilson@redhat.com> * ia64-ic.tbl: Update from Intel. Add setf to fr-writers. * ia64-asmtab.c: Regenerate.Mon Feb 12 17:38:59 CET 2001 Jan Hubicka <jh@suse.cz> * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison instructions. (putop): Handle 'Y'2001-02-05 Jim Wilson <wilson@redhat.com> * ia64-asmtab.c: Revert 2000-12-16 change.Thu Feb 1 16:41:58 MET 2001 Jan Hubicka <jh@suse.cz> * i387-dis.c (dis386_att, grps): Use 'T' for push/pop (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax2001-01-14 Alan Modra <alan@linuxcare.com.au> * hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types.2001-01-13 Nick Clifton <nickc@redhat.com> * disassemble.c: Remove spurious white space.Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz> * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret templates.2001-01-11 Peter Targett <peter.targett@arccores.com> * configure.in: Add arc-ext.lo for bfd_arc_arch selection. * Makefile.am (C_FILES): Add arc-ext.c. (ALL_MACHINES) Add arc-ext.lo. (INCLUDES) Add opcode directory to list. New dependency entry for arc-ext.lo. * disassemble.c (disassembler): Correct call to arc_get_disassembler. * arc-opc.c: New update for ARC, including full base instructions for ARC variants. * arc-dis.h, arc-dis.c: New update for ARC, including extensibility functionality. * arc-ext.h, arc-ext.c: New files for handling extensibility.2001-01-10 Jan Hubicka <jh@suse.cz> * i386-dis.c (PREGRP15 - PREGRP24): New. (dis386_twobyt): Add SSE2 instructions. (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions. (twobyte_uses_f3_prefix): ... this one. (grps): Add SSE instructions. (prefix_user_table): Add two new slots; add SSE2 instructions. (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix; Handle the REPNZ and Data16 prefixes as well; do proper lookup to prefix_user_table. (OP_E): Accept mfence and lfence as well. (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions. (OP_XMM): Support REX extensions. (OP_EM): Likewise. (OP_EX): Likewise.2001-01-09 Nick Clifton <nickc@redhat.com> * arm-dis.c (print_insn): Set pc to zero for instructions with a reloc associated with them.2001-01-09 Jeff Johnston <jjohnstn@redhat.com> * cgen-asm.in (parse_insn_normal): Changed syn to be CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn as character to use CGEN_SYNTAX_CHAR macro and all comparisons to '\0' to use 0 instead. * cgen-dis.in (print_insn_normal): Ditto. * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.2001-01-05 Jan Hubicka <jh@suse.cz> * i386-dis.c: Add x86_64 support. (rex): New static variable. (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants. (USED_REX): New macro. (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros. (OP_I64, OP_OFF64, OP_IMREG): New functions. (OP_REG, OP_OFF): Declare. (get64, get32, get32s): New functions. (r??_reg): New constants. (dis386_att): Change templates of instruction implicitly promoted to 64bit; change e?? to RMe?? for unwind RM byte instructions. (grps): Likewise. (dis386_intel): Likewise. (dixx86_64_att): New table based on dis386_att. (dixx86_64_intel): New table based on dis386_intel. (names64, names8rex): New global variable. (names32, names16): Add extended registers. (prefix_user_t): Recognize rex prefixes. (prefix_name): Print REX prefixes nicely. (op_riprel): New global variable. (start_pc): Set type to bfd_vma. (print_insn_i386): Detect the 64bit mode and use proper table; move ckprefix after initializing the buffer; output unused rex prefixes; output information about target of RIP relative addresses. (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S'; (print_operand_value): New function. (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for REX prefix and new modes. (get64, get32s): New. (get32): Return bfd_signed_vma type. (set_op): Initialize the op_riprel. * disassemble.c (disassembler): Recognize the x86-64 disassembly.2001-01-03 Richard Sandiford <r.sandiford@redhat.com> cgen-dis.in (read_insn): Use bfd_get_bits()2001-01-02 Richard Sandiford <rsandifo@redhat.com> * cgen-dis.c (hash_insn_array): Use bfd_put_bits(). (hash_insn_list): Likewise * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits(). (extract_1): Use bfd_get_bits(). (extract_normal): Apply sign extension to both extraction methods. * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits() (cgen_put_insn_value): Use bfd_put_bits()2000-12-28 Frank Ch. Eigler <fche@redhat.com> * cgen-asm.in (parse_insn_normal): Print better error message for instructions with missing operands.2000-12-21 Santeri Paavolainen <santtu@ssh.com> * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.2000-12-16 Nick Clifton <nickc@redhat.com> * Makefile.in: Regenerate. * aclocal.m4: Regenerate. * config.in: Regenerate. * configure.in: Add spacing. * configure: Regenerate. * ia64-asmtab.c: Regenerate. * po/opcodes.pot: Regenerate.2000-12-12 Frank Ch. Eigler <fche@redhat.com> * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time error messages over later parse-time ones.2000-12-12 Jim Wilson <wilson@redhat.com> * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode argument. * ia64-gen.c (insert_deplist): Cast sizeof result to int. (print_dependency_table): Print NULL if semantics field not set. (insert_opcode_dependencies): Mark cmp parameter as unused. (print_main_table): Use fprintf_vma to print long long fields. (main): Mark argv paramter as unused. Convert to old style definition. * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int. * ia64-asmtab.c: Regnerate.2000-12-09 Nick Clifton <nickc@redhat.com> * m32r-dis.c (print_insn): Prevent re-read of instruction from wrong address. * fr30-dis.c: Regenerate.2000-12-08 Peter Targett <peter.targett@arccores.com> * configure.in: Add arc-ext.lo for bfd_arc_arch selection. * Makefile.am (C_FILES): Add arc-ext.c. (ALL_MACHINES) Add arc-ext.lo. (INCLUDES) Add opcode directory to list. New dependency entry for arc-ext.lo. * disassemble.c (disassembler): Correct call to arc_get_disassembler. * arc-opc.c: New update for ARC, including full base instructions for ARC variants. * arc-dis.h, arc-dis.c: New update for ARC, including extensibility functionality. * arc-ext.h, arc-ext.c: New files for handling extensibility.2000-12-03 Chris Demetriou cgd@sibyte.com * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO, MOD_HILO, and MOD_LO macros. * mips-opc.c (M1, M2): Delete. (mips_builtin_opcodes): Remove all uses of M1. * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2 instructions take "G" format second operands and use the correct flags. There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to match. Delete "sel" code operands from mfc1 and mtc1. Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants for dm[ft]c[023].2000-12-03 Ed Satterthwaite ehs@sibyte.com and Chris Demetriou cgd@sibyte.com * mips-opc.c (mips_builtin_opcodes): Finish additions for MIPS32 support, and clean up existing entries for aesthetics, consistency with the MIPS32 ISA, and with consistency the rest of the table.2000-12-01 Nick Clifton <nickc@redhat.com> * mips16-opc.c (mips16_opcodes): Add initialiser for membership field.2000-12-01 Chris Demetriou <cgd@sibyte.com> mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument specifiers. Update 'B' for new constant names, and remove 'm'. mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop" near the top of the array, so they are disassembled properly. Enable "ssnop" for MIPS32. Add "break" variant with 20 bit code for MIPS32. Update "clo" and "clz" to use 'U' operand specifier. Add 'H' format specifier variants for "mfc1," "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32 "wait" variant which uses 'J' operand specifier. * mips-dis.c (set_mips_isa_type): Update to use CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case. Replace bfd_mach_mips4K with bfd_mach_mips32_4k case. * mips-opc.c (I32): New constant for instructions added in MIPS32. (P4): Delete. (mips_builtin_opcodes) Replace all uses of P4 with I32. * mips-dis.c (set_mips_isa_type): Add cases for bfd_mach_mips5 and bfd_mach_mips64. * mips-opc.c (I64): New definitions. * mips-dis.c (set_mips_isa_type): Add case for bfd_mach_mips_sb1.2000-11-28 Hans-Peter Nilsson <hp@bitrange.com> * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned. (print_insn_ppi): Make nib1, nib2, nib3 unsigned. Initialize variable dc to NULL. (print_insn_shx): Remove unused label d_reg_n.2000-11-24 Nick Clifton <nickc@redhat.com> * arm-opc.h: Add new opcode formatting parameter 'B'. (arm_opcodes): Add XScale, v5, and v5te instructions. (thumb_opcodes): Add v5t instructions.
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