fr30-opc.c

来自「基于4个mips核的noc设计」· C语言 代码 · 共 1,370 行 · 第 1/3 页

    { { MNEM, ' ', OP (LABEL9), 0 } },
    & ifmt_brad, { 0xec00 }
  },
/* bgt:d $label9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (LABEL9), 0 } },
    & ifmt_brad, { 0xfd00 }
  },
/* bgt $label9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (LABEL9), 0 } },
    & ifmt_brad, { 0xed00 }
  },
/* bls:d $label9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (LABEL9), 0 } },
    & ifmt_brad, { 0xfe00 }
  },
/* bls $label9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (LABEL9), 0 } },
    & ifmt_brad, { 0xee00 }
  },
/* bhi:d $label9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (LABEL9), 0 } },
    & ifmt_brad, { 0xff00 }
  },
/* bhi $label9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (LABEL9), 0 } },
    & ifmt_brad, { 0xef00 }
  },
/* dmov $R13,@$dir10 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (R13), ',', '@', OP (DIR10), 0 } },
    & ifmt_dmovr13, { 0x1800 }
  },
/* dmovh $R13,@$dir9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (R13), ',', '@', OP (DIR9), 0 } },
    & ifmt_dmovr13h, { 0x1900 }
  },
/* dmovb $R13,@$dir8 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (R13), ',', '@', OP (DIR8), 0 } },
    & ifmt_dmovr13b, { 0x1a00 }
  },
/* dmov @$R13+,@$dir10 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR10), 0 } },
    & ifmt_dmovr13, { 0x1c00 }
  },
/* dmovh @$R13+,@$dir9 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR9), 0 } },
    & ifmt_dmovr13h, { 0x1d00 }
  },
/* dmovb @$R13+,@$dir8 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR8), 0 } },
    & ifmt_dmovr13b, { 0x1e00 }
  },
/* dmov @$R15+,@$dir10 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (R15), '+', ',', '@', OP (DIR10), 0 } },
    & ifmt_dmovr13, { 0x1b00 }
  },
/* dmov @$dir10,$R13 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (DIR10), ',', OP (R13), 0 } },
    & ifmt_dmovr13, { 0x800 }
  },
/* dmovh @$dir9,$R13 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (DIR9), ',', OP (R13), 0 } },
    & ifmt_dmovr13h, { 0x900 }
  },
/* dmovb @$dir8,$R13 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (DIR8), ',', OP (R13), 0 } },
    & ifmt_dmovr13b, { 0xa00 }
  },
/* dmov @$dir10,@$R13+ */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (DIR10), ',', '@', OP (R13), '+', 0 } },
    & ifmt_dmovr13, { 0xc00 }
  },
/* dmovh @$dir9,@$R13+ */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (DIR9), ',', '@', OP (R13), '+', 0 } },
    & ifmt_dmovr13h, { 0xd00 }
  },
/* dmovb @$dir8,@$R13+ */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (DIR8), ',', '@', OP (R13), '+', 0 } },
    & ifmt_dmovr13b, { 0xe00 }
  },
/* dmov @$dir10,@-$R15 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (DIR10), ',', '@', '-', OP (R15), 0 } },
    & ifmt_dmovr13, { 0xb00 }
  },
/* ldres @$Ri+,$u4 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (RI), '+', ',', OP (U4), 0 } },
    & ifmt_addi, { 0xbc00 }
  },
/* stres $u4,@$Ri+ */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U4), ',', '@', OP (RI), '+', 0 } },
    & ifmt_addi, { 0xbd00 }
  },
/* copop $u4c,$ccc,$CRj,$CRi */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (CRI), 0 } },
    & ifmt_copop, { 0x9fc0 }
  },
/* copld $u4c,$ccc,$Rjc,$CRi */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (RJC), ',', OP (CRI), 0 } },
    & ifmt_copld, { 0x9fd0 }
  },
/* copst $u4c,$ccc,$CRj,$Ric */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
    & ifmt_copst, { 0x9fe0 }
  },
/* copsv $u4c,$ccc,$CRj,$Ric */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
    & ifmt_copst, { 0x9ff0 }
  },
/* nop */
  {
    { 0, 0, 0, 0 },
    { { MNEM, 0 } },
    & ifmt_div3, { 0x9fa0 }
  },
/* andccr $u8 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U8), 0 } },
    & ifmt_int, { 0x8300 }
  },
/* orccr $u8 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U8), 0 } },
    & ifmt_int, { 0x9300 }
  },
/* stilm $u8 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U8), 0 } },
    & ifmt_int, { 0x8700 }
  },
/* addsp $s10 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (S10), 0 } },
    & ifmt_addsp, { 0xa300 }
  },
/* extsb $Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (RI), 0 } },
    & ifmt_div0s, { 0x9780 }
  },
/* extub $Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (RI), 0 } },
    & ifmt_div0s, { 0x9790 }
  },
/* extsh $Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (RI), 0 } },
    & ifmt_div0s, { 0x97a0 }
  },
/* extuh $Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (RI), 0 } },
    & ifmt_div0s, { 0x97b0 }
  },
/* ldm0 ($reglist_low_ld) */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '(', OP (REGLIST_LOW_LD), ')', 0 } },
    & ifmt_ldm0, { 0x8c00 }
  },
/* ldm1 ($reglist_hi_ld) */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '(', OP (REGLIST_HI_LD), ')', 0 } },
    & ifmt_ldm1, { 0x8d00 }
  },
/* stm0 ($reglist_low_st) */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '(', OP (REGLIST_LOW_ST), ')', 0 } },
    & ifmt_stm0, { 0x8e00 }
  },
/* stm1 ($reglist_hi_st) */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '(', OP (REGLIST_HI_ST), ')', 0 } },
    & ifmt_stm1, { 0x8f00 }
  },
/* enter $u10 */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (U10), 0 } },
    & ifmt_enter, { 0xf00 }
  },
/* leave */
  {
    { 0, 0, 0, 0 },
    { { MNEM, 0 } },
    & ifmt_div3, { 0x9f90 }
  },
/* xchb @$Rj,$Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
    & ifmt_add, { 0x8a00 }
  },
};

#undef A
#undef MNEM
#undef OPERAND
#undef OP

/* Formats for ALIAS macro-insns.  */

#define F(f) & fr30_cgen_ifld_table[CONCAT2 (FR30_,f)]

static const CGEN_IFMT ifmt_ldi8m = {
  16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
};

static const CGEN_IFMT ifmt_ldi20m = {
  16, 32, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RI) }, { F (F_I20) }, { 0 } }
};

static const CGEN_IFMT ifmt_ldi32m = {
  16, 48, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { F (F_I32) }, { 0 } }
};

#undef F

/* Each non-simple macro entry points to an array of expansion possibilities.  */

#define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
#define OPERAND(op) CONCAT2 (FR30_OPERAND_,op)
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))

/* The macro instruction table.  */

static const CGEN_IBASE fr30_cgen_macro_insn_table[] =
{
/* ldi8 $i8,$Ri */
  {
    -1, "ldi8m", "ldi8", 16,
    { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE) } }
  },
/* ldi20 $i20,$Ri */
  {
    -1, "ldi20m", "ldi20", 32,
    { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE) } }
  },
/* ldi32 $i32,$Ri */
  {
    -1, "ldi32m", "ldi32", 48,
    { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE) } }
  },
};

/* The macro instruction opcode table.  */

static const CGEN_OPCODE fr30_cgen_macro_insn_opcode_table[] =
{
/* ldi8 $i8,$Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (I8), ',', OP (RI), 0 } },
    & ifmt_ldi8m, { 0xc000 }
  },
/* ldi20 $i20,$Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (I20), ',', OP (RI), 0 } },
    & ifmt_ldi20m, { 0x9b00 }
  },
/* ldi32 $i32,$Ri */
  {
    { 0, 0, 0, 0 },
    { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
    & ifmt_ldi32m, { 0x9f80 }
  },
};

#undef A
#undef MNEM
#undef OPERAND
#undef OP

#ifndef CGEN_ASM_HASH_P
#define CGEN_ASM_HASH_P(insn) 1
#endif

#ifndef CGEN_DIS_HASH_P
#define CGEN_DIS_HASH_P(insn) 1
#endif

/* Return non-zero if INSN is to be added to the hash table.
   Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */

static int
asm_hash_insn_p (insn)
     const CGEN_INSN *insn;
{
  return CGEN_ASM_HASH_P (insn);
}

static int
dis_hash_insn_p (insn)
     const CGEN_INSN *insn;
{
  /* If building the hash table and the NO-DIS attribute is present,
     ignore.  */
  if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
    return 0;
  return CGEN_DIS_HASH_P (insn);
}

#ifndef CGEN_ASM_HASH
#define CGEN_ASM_HASH_SIZE 127
#ifdef CGEN_MNEMONIC_OPERANDS
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
#else
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
#endif
#endif

/* It doesn't make much sense to provide a default here,
   but while this is under development we do.
   BUFFER is a pointer to the bytes of the insn, target order.
   VALUE is the first base_insn_bitsize bits as an int in host order.  */

#ifndef CGEN_DIS_HASH
#define CGEN_DIS_HASH_SIZE 256
#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
#endif

/* The result is the hash value of the insn.
   Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */

static unsigned int
asm_hash_insn (mnem)
     const char * mnem;
{
  return CGEN_ASM_HASH (mnem);
}

/* BUF is a pointer to the bytes of the insn, target order.
   VALUE is the first base_insn_bitsize bits as an int in host order.  */

static unsigned int
dis_hash_insn (buf, value)
     const char * buf;
     CGEN_INSN_INT value;
{
  return CGEN_DIS_HASH (buf, value);
}

/* Set the recorded length of the insn in the CGEN_FIELDS struct.  */

static void
set_fields_bitsize (fields, size)
     CGEN_FIELDS *fields;
     int size;
{
  CGEN_FIELDS_BITSIZE (fields) = size;
}

/* Function to call before using the operand instance table.
   This plugs the opcode entries and macro instructions into the cpu table.  */

void
fr30_cgen_init_opcode_table (cd)
     CGEN_CPU_DESC cd;
{
  int i;
  int num_macros = (sizeof (fr30_cgen_macro_insn_table) /
		    sizeof (fr30_cgen_macro_insn_table[0]));
  const CGEN_IBASE *ib = & fr30_cgen_macro_insn_table[0];
  const CGEN_OPCODE *oc = & fr30_cgen_macro_insn_opcode_table[0];
  CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN));
  memset (insns, 0, num_macros * sizeof (CGEN_INSN));
  for (i = 0; i < num_macros; ++i)
    {
      insns[i].base = &ib[i];
      insns[i].opcode = &oc[i];
    }
  cd->macro_insn_table.init_entries = insns;
  cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
  cd->macro_insn_table.num_init_entries = num_macros;

  oc = & fr30_cgen_insn_opcode_table[0];
  insns = (CGEN_INSN *) cd->insn_table.init_entries;
  for (i = 0; i < MAX_INSNS; ++i)
    insns[i].opcode = &oc[i];

  cd->sizeof_fields = sizeof (CGEN_FIELDS);
  cd->set_fields_bitsize = set_fields_bitsize;

  cd->asm_hash_p = asm_hash_insn_p;
  cd->asm_hash = asm_hash_insn;
  cd->asm_hash_size = CGEN_ASM_HASH_SIZE;

  cd->dis_hash_p = dis_hash_insn_p;
  cd->dis_hash = dis_hash_insn;
  cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
}