📄 c-m68k.texi
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accept Motorola syntax for operands, even if @sc{mit} syntax is used forother operands in the same instruction. The two kinds of syntax arefully compatible.In the following table @var{apc} stands for any of the address registers(@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), thezero-address relative to the program counter (@samp{%zpc}), or asuppressed address register (@samp{%za0} through @samp{%za7}). The useof @var{size} means one of @samp{w} or @samp{l}, and it may always beomitted along with the leading dot. The use of @var{scale} means one of@samp{1}, @samp{2}, @samp{4}, or @samp{8}, and it may always be omittedalong with the leading asterisk.The following additional addressing modes are understood:@table @dfn@item Address Register Indirect@samp{(%a0)} through @samp{(%a7)}@* @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6}is also known as @samp{%fp}, the Frame Pointer.@item Address Register Postincrement@samp{(%a0)+} through @samp{(%a7)+}@item Address Register Predecrement@samp{-(%a0)} through @samp{-(%a7)}@item Indirect Plus Offset@samp{@var{number}(@var{%a0})} through @samp{@var{number}(@var{%a7})},or @samp{@var{number}(@var{%pc})}.The @var{number} may also appear within the parentheses, as in@samp{(@var{number},@var{%a0})}. When used with the @var{pc}, the@var{number} may be omitted (with an address register, omitting the@var{number} produces Address Register Indirect mode).@item Index@samp{@var{number}(@var{apc},@var{register}.@var{size}*@var{scale})}The @var{number} may be omitted, or it may appear within theparentheses. The @var{apc} may be omitted. The @var{register} and the@var{apc} may appear in either order. If both @var{apc} and@var{register} are address registers, and the @var{size} and @var{scale}are omitted, then the first register is taken as the base register, andthe second as the index register.@item Postindex@samp{([@var{number},@var{apc}],@var{register}.@var{size}*@var{scale},@var{onumber})}The @var{onumber}, or the @var{register}, or both, may be omitted.Either the @var{number} or the @var{apc} may be omitted, but not both.@item Preindex@samp{([@var{number},@var{apc},@var{register}.@var{size}*@var{scale}],@var{onumber})}The @var{number}, or the @var{apc}, or the @var{register}, or any two ofthem, may be omitted. The @var{onumber} may be omitted. The@var{register} and the @var{apc} may appear in either order. If both@var{apc} and @var{register} are address registers, and the @var{size}and @var{scale} are omitted, then the first register is taken as thebase register, and the second as the index register.@end table@node M68K-Float@section Floating Point@cindex floating point, M680x0@cindex M680x0 floating pointPacked decimal (P) format floating literals are not supported.Feel free to add the code!The floating point formats generated by directives are these.@table @code@cindex @code{float} directive, M680x0@item .float@code{Single} precision floating point constants.@cindex @code{double} directive, M680x0@item .double@code{Double} precision floating point constants.@cindex @code{extend} directive M680x0@cindex @code{ldouble} directive M680x0@item .extend@itemx .ldouble@code{Extended} precision (@code{long double}) floating point constants.@end table@node M68K-Directives@section 680x0 Machine Directives@cindex M680x0 directives@cindex directives, M680x0In order to be compatible with the Sun assembler the 680x0 assemblerunderstands the following directives.@table @code@cindex @code{data1} directive, M680x0@item .data1This directive is identical to a @code{.data 1} directive.@cindex @code{data2} directive, M680x0@item .data2This directive is identical to a @code{.data 2} directive.@cindex @code{even} directive, M680x0@item .evenThis directive is a special case of the @code{.align} directive; italigns the output to an even byte boundary.@cindex @code{skip} directive, M680x0@item .skipThis directive is identical to a @code{.space} directive.@end table@need 2000@node M68K-opcodes@section Opcodes@cindex M680x0 opcodes@cindex opcodes, M680x0@cindex instruction set, M680x0@c doc@cygnus.com: I don't see any point in the following@c paragraph. Bugs are bugs; how does saying this@c help anyone?@ignoreDanger: Several bugs have been found in the opcode table (andfixed). More bugs may exist. Be careful when using obscureinstructions.@end ignore@menu* M68K-Branch:: Branch Improvement* M68K-Chars:: Special Characters@end menu@node M68K-Branch@subsection Branch Improvement@cindex pseudo-opcodes, M680x0@cindex M680x0 pseudo-opcodes@cindex branch improvement, M680x0@cindex M680x0 branch improvementCertain pseudo opcodes are permitted for branch instructions.They expand to the shortest branch instruction that reach thetarget. Generally these mnemonics are made by substituting @samp{j} for@samp{b} at the start of a Motorola mnemonic.The following table summarizes the pseudo-operations. A @code{*} flagscases that are more fully described after the table:@smallexample Displacement +------------------------------------------------------------ | 68020 68000/10, not PC-relative OKPseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** +------------------------------------------------------------ jbsr |bsrs bsrw bsrl jsr jra |bras braw bral jmp* jXX |bXXs bXXw bXXl bNXs;jmp* dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp fjXX | N/A fbXXw fbXXl N/AXX: conditionNX: negative of condition XX@end smallexample@center @code{*}---see full description below@center @code{**}---this expansion mode is disallowed by @samp{--pcrel}@table @code@item jbsr@itemx jraThese are the simplest jump pseudo-operations; they always map to oneparticular machine instruction, depending on the displacement to thebranch target. This instruction will be a byte or word branch is thatis sufficient. Otherwise, a long branch will be emitted if available.If no long branches are available and the @samp{--pcrel} option is notgiven, an absolute long jump will be emitted instead. If no longbranches are available, the @samp{--pcrel} option is given, and a wordbranch cannot reach the target, an error message is generated.In addition to standard branch operands, @code{@value{AS}} allows thesepseudo-operations to have all operands that are allowed for jsr and jmp,substituting these instructions if the operand given is not valid for abranch instruction.@item j@var{XX}Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations,where @var{XX} is a conditional branch or condition-code test. The fulllist of pseudo-ops in this family is:@smallexample jhi jls jcc jcs jne jeq jvc jvs jpl jmi jge jlt jgt jle@end smallexampleUsually, each of these pseudo-operations expands to a single branchinstruction. However, if a word branch is not sufficient, no long branchesare available, and the @samp{--pcrel} option is not given, @code{@value{AS}}issues a longer code fragment in terms of @var{NX}, the opposite conditionto @var{XX}. For example, under these conditions:@smallexample j@var{XX} foo@end smallexamplegives@smallexample b@var{NX}s oof jmp foo oof:@end smallexample@item db@var{XX}The full family of pseudo-operations covered here is@smallexample dbhi dbls dbcc dbcs dbne dbeq dbvc dbvs dbpl dbmi dbge dblt dbgt dble dbf dbra dbt@end smallexampleMotorola @samp{db@var{XX}} instructions allow word displacements only. Whena word displacement is sufficient, each of these pseudo-operations expandsto the corresponding Motorola instruction. When a word displacement is notsufficient and long branches are available, when the source reads@samp{db@var{XX} foo}, @code{@value{AS}} emits@smallexample db@var{XX} oo1 bras oo2 oo1:bral foo oo2:@end smallexampleIf, however, long branches are not available and the @samp{--pcrel} option isnot given, @code{@value{AS}} emits@smallexample db@var{XX} oo1 bras oo2 oo1:jmp foo oo2:@end smallexample@item fj@var{XX}This family includes@smallexample fjne fjeq fjge fjlt fjgt fjle fjf fjt fjgl fjgle fjnge fjngl fjngle fjngt fjnle fjnlt fjoge fjogl fjogt fjole fjolt fjor fjseq fjsf fjsne fjst fjueq fjuge fjugt fjule fjult fjun@end smallexampleEach of these pseudo-operations always expands to a single Motorolacoprocessor branch instruction, word or long. All Motorola coprocessorbranch instructions allow both word and long displacements.@end table@node M68K-Chars@subsection Special Characters@cindex special characters, M680x0@cindex M680x0 immediate character@cindex immediate character, M680x0@cindex M680x0 line comment character@cindex line comment character, M680x0@cindex comments, M680x0The immediate character is @samp{#} for Sun compatibility. Theline-comment character is @samp{|} (unless the @samp{--bitwise-or}option is used). If a @samp{#} appears at the beginning of a line, itis treated as a comment unless it looks like @samp{# line file}, inwhich case it is treated normally.
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