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📄 c-m68k.texi

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@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000@c Free Software Foundation, Inc.@c This is part of the GAS manual.@c For copying conditions, see the file as.texinfo.@ifset GENERIC@page@node M68K-Dependent@chapter M680x0 Dependent Features@end ifset@ifclear GENERIC@node Machine Dependencies@chapter M680x0 Dependent Features@end ifclear@cindex M680x0 support@menu* M68K-Opts::                   M680x0 Options* M68K-Syntax::                 Syntax* M68K-Moto-Syntax::            Motorola Syntax* M68K-Float::                  Floating Point* M68K-Directives::             680x0 Machine Directives* M68K-opcodes::                Opcodes@end menu@node M68K-Opts@section M680x0 Options@cindex options, M680x0@cindex M680x0 optionsThe Motorola 680x0 version of @code{@value{AS}} has a few machinedependent options:@table @samp@cindex @samp{-l} option, M680x0@item -lYou can use the @samp{-l} option to shorten the size of references to undefinedsymbols.  If you do not use the @samp{-l} option, references to undefinedsymbols are wide enough for a full @code{long} (32 bits).  (Since@code{@value{AS}} cannot know where these symbols end up, @code{@value{AS}} canonly allocate space for the linker to fill in later.  Since @code{@value{AS}}does not know how far away these symbols are, it allocates as much space as itcan.)  If you use this option, the references are only one word wide (16 bits).This may be useful if you want the object file to be as small as possible, andyou know that the relevant symbols are always less than 17 bits away.@cindex @samp{--register-prefix-optional} option, M680x0@item --register-prefix-optionalFor some configurations, especially those where the compiler normallydoes not prepend an underscore to the names of user variables, theassembler requires a @samp{%} before any use of a register name.  Thisis intended to let the assembler distinguish between C variables andfunctions named @samp{a0} through @samp{a7}, and so on.  The @samp{%} isalways accepted, but is not required for certain configurations, notably@samp{sun3}.  The @samp{--register-prefix-optional} option may be usedto permit omitting the @samp{%} even for configurations for which it isnormally required.  If this is done, it will generally be impossible torefer to C variables and functions with the same names as registernames.@cindex @samp{--bitwise-or} option, M680x0@item --bitwise-orNormally the character @samp{|} is treated as a comment character, whichmeans that it can not be used in expressions.  The @samp{--bitwise-or}option turns @samp{|} into a normal character.  In this mode, you musteither use C style comments, or start comments with a @samp{#} characterat the beginning of a line.@cindex @samp{--base-size-default-16}@cindex @samp{--base-size-default-32}@item --base-size-default-16  --base-size-default-32 If you use an addressing mode with a base register without specifyingthe size, @code{@value{AS}} will normally use the full 32 bit value.For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to@samp{%a0@@(%d0:l)}.  You may use the @samp{--base-size-default-16}option to tell @code{@value{AS}} to default to using the 16 bit value.In this case, @samp{%a0@@(%d0)} is equivalent to @samp{%a0@@(%d0:w)}.You may use the @samp{--base-size-default-32} option to restore thedefault behaviour.@cindex @samp{--disp-size-default-16}@cindex @samp{--disp-size-default-32}@item --disp-size-default-16  --disp-size-default-32If you use an addressing mode with a displacement, and the value of thedisplacement is not known, @code{@value{AS}} will normally assume thatthe value is 32 bits.  For example, if the symbol @samp{disp} has notbeen defined, @code{@value{AS}} will assemble the addressing mode@samp{%a0@@(disp,%d0)} as though @samp{disp} is a 32 bit value.  You mayuse the @samp{--disp-size-default-16} option to tell @code{@value{AS}}to instead assume that the displacement is 16 bits.  In this case,@code{@value{AS}} will assemble @samp{%a0@@(disp,%d0)} as though@samp{disp} is a 16 bit value.  You may use the@samp{--disp-size-default-32} option to restore the default behaviour.@cindex @samp{--pcrel}@item --pcrelAlways keep branches PC-relative.  In the M680x0 architecture all branchesare defined as PC-relative.  However, on some processors they are limitedto word displacements maximum.  When @code{@value{AS}} needs a long branchthat is not available, it normally emits an absolute jump instead.  Thisoption disables this substitution.  When this option is given and no longbranches are available, only word branches will be emitted.  An errormessage will be generated if a word branch cannot reach its target.  Thisoption has no effect on 68020 and other processors that have long branches.@pxref{M68K-Branch,,Branch Improvement}.@cindex @samp{-m68000} and related options@cindex architecture options, M680x0@cindex M680x0 architecture options@item -m68000@code{@value{AS}} can assemble code for several different members of theMotorola 680x0 family.  The default depends upon how @code{@value{AS}}was configured when it was built; normally, the default is to assemblecode for the 68020 microprocessor.  The following options may be used tochange the default.  These options control which instructions andaddressing modes are permitted.  The members of the 680x0 family arevery similar.  For detailed information about the differences, see theMotorola manuals.@table @samp@item -m68000@itemx -m68ec000@itemx -m68hc000@itemx -m68hc001@itemx -m68008@itemx -m68302@itemx -m68306@itemx -m68307@itemx -m68322@itemx -m68356Assemble for the 68000. @samp{-m68008}, @samp{-m68302}, and so on are synonymsfor @samp{-m68000}, since the chips are the same from the point of viewof the assembler.@item -m68010Assemble for the 68010.@item -m68020@itemx -m68ec020Assemble for the 68020.  This is normally the default.@item -m68030@itemx -m68ec030Assemble for the 68030.@item -m68040@itemx -m68ec040Assemble for the 68040.@item -m68060@itemx -m68ec060Assemble for the 68060.@item -mcpu32@itemx -m68330@itemx -m68331@itemx -m68332@itemx -m68333@itemx -m68334@itemx -m68336@itemx -m68340@itemx -m68341@itemx -m68349@itemx -m68360Assemble for the CPU32 family of chips.@item -m5200Assemble for the ColdFire family of chips.@item -m68881@itemx -m68882Assemble 68881 floating point instructions.  This is the default for the68020, 68030, and the CPU32.  The 68040 and 68060 always supportfloating point instructions.@item -mno-68881Do not assemble 68881 floating point instructions.  This is the defaultfor 68000 and the 68010.  The 68040 and 68060 always support floatingpoint instructions, even if this option is used.@item -m68851Assemble 68851 MMU instructions.  This is the default for the 68020,68030, and 68060.  The 68040 accepts a somewhat different set of MMUinstructions; @samp{-m68851} and @samp{-m68040} should not be usedtogether.@item -mno-68851Do not assemble 68851 MMU instructions.  This is the default for the68000, 68010, and the CPU32.  The 68040 accepts a somewhat different setof MMU instructions.@end table@end table@node M68K-Syntax@section Syntax@cindex @sc{mit}This syntax for the Motorola 680x0 was developed at @sc{mit}.@cindex M680x0 syntax@cindex syntax, M680x0@cindex M680x0 size modifiers@cindex size modifiers, M680x0The 680x0 version of @code{@value{AS}} uses instructions names andsyntax compatible with the Sun assembler.  Intervening periods areignored; for example, @samp{movl} is equivalent to @samp{mov.l}.In the following table @var{apc} stands for any of the address registers(@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), thezero-address relative to the program counter (@samp{%zpc}), a suppressedaddress register (@samp{%za0} through @samp{%za7}), or it may be omittedentirely.  The use of @var{size} means one of @samp{w} or @samp{l}, andit may be omitted, along with the leading colon, unless a scale is alsospecified.  The use of @var{scale} means one of @samp{1}, @samp{2},@samp{4}, or @samp{8}, and it may always be omitted along with theleading colon.@cindex M680x0 addressing modes@cindex addressing modes, M680x0The following addressing modes are understood:@table @dfn@item Immediate@samp{#@var{number}}@item Data Register@samp{%d0} through @samp{%d7}@item Address Register@samp{%a0} through @samp{%a7}@*@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}is also known as @samp{%fp}, the Frame Pointer.@item Address Register Indirect@samp{%a0@@} through @samp{%a7@@}@item Address Register Postincrement@samp{%a0@@+} through @samp{%a7@@+}@item Address Register Predecrement@samp{%a0@@-} through @samp{%a7@@-}@item Indirect Plus Offset@samp{@var{apc}@@(@var{number})}@item Index@samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})}The @var{number} may be omitted.@item Postindex@samp{@var{apc}@@(@var{number})@@(@var{onumber},@var{register}:@var{size}:@var{scale})}The @var{onumber} or the @var{register}, but not both, may be omitted.@item Preindex@samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})@@(@var{onumber})}The @var{number} may be omitted.  Omitting the @var{register} producesthe Postindex addressing mode.@item Absolute@samp{@var{symbol}}, or @samp{@var{digits}}, optionally followed by@samp{:b}, @samp{:w}, or @samp{:l}.@end table@node M68K-Moto-Syntax@section Motorola Syntax@cindex Motorola syntax for the 680x0@cindex alternate syntax for the 680x0The standard Motorola syntax for this chip differs from the syntaxalready discussed (@pxref{M68K-Syntax,,Syntax}).  @code{@value{AS}} can

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