m68k-parse.y

基于4个mips核的noc设计

/* m68k.y -- bison grammar for m68k operand parsing
   Copyright 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
   Written by Ken Raeburn and Ian Lance Taylor, Cygnus Support

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 59 Temple Place - Suite 330, Boston, MA
   02111-1307, USA.  */

/* This file holds a bison grammar to parse m68k operands.  The m68k
   has a complicated operand syntax, and gas supports two main
   variations of it.  Using a grammar is probably overkill, but at
   least it makes clear exactly what we do support.  */

%{

#include "as.h"
#include "tc-m68k.h"
#include "m68k-parse.h"

/* Remap normal yacc parser interface names (yyparse, yylex, yyerror,
   etc), as well as gratuitiously global symbol names If other parser
   generators (bison, byacc, etc) produce additional global names that
   conflict at link time, then those parser generators need to be
   fixed instead of adding those names to this list. */

#define	yymaxdepth m68k_maxdepth
#define	yyparse	m68k_parse
#define	yylex	m68k_lex
#define	yyerror	m68k_error
#define	yylval	m68k_lval
#define	yychar	m68k_char
#define	yydebug	m68k_debug
#define	yypact	m68k_pact	
#define	yyr1	m68k_r1			
#define	yyr2	m68k_r2			
#define	yydef	m68k_def		
#define	yychk	m68k_chk		
#define	yypgo	m68k_pgo		
#define	yyact	m68k_act		
#define	yyexca	m68k_exca
#define yyerrflag m68k_errflag
#define yynerrs	m68k_nerrs
#define	yyps	m68k_ps
#define	yypv	m68k_pv
#define	yys	m68k_s
#define	yy_yys	m68k_yys
#define	yystate	m68k_state
#define	yytmp	m68k_tmp
#define	yyv	m68k_v
#define	yy_yyv	m68k_yyv
#define	yyval	m68k_val
#define	yylloc	m68k_lloc
#define yyreds	m68k_reds		/* With YYDEBUG defined */
#define yytoks	m68k_toks		/* With YYDEBUG defined */
#define yylhs	m68k_yylhs
#define yylen	m68k_yylen
#define yydefred m68k_yydefred
#define yydgoto	m68k_yydgoto
#define yysindex m68k_yysindex
#define yyrindex m68k_yyrindex
#define yygindex m68k_yygindex
#define yytable	 m68k_yytable
#define yycheck	 m68k_yycheck

#ifndef YYDEBUG
#define YYDEBUG 1
#endif

/* Internal functions.  */

static enum m68k_register m68k_reg_parse PARAMS ((char **));
static int yylex PARAMS ((void));
static void yyerror PARAMS ((const char *));

/* The parser sets fields pointed to by this global variable.  */
static struct m68k_op *op;

%}

%union
{
  struct m68k_indexreg indexreg;
  enum m68k_register reg;
  struct m68k_exp exp;
  unsigned long mask;
  int onereg;
}

%token <reg> DR AR FPR FPCR LPC ZAR ZDR LZPC CREG
%token <indexreg> INDEXREG
%token <exp> EXPR

%type <indexreg> zireg zdireg
%type <reg> zadr zdr apc zapc zpc optzapc optczapc
%type <exp> optcexpr optexprc
%type <mask> reglist ireglist reglistpair
%type <onereg> reglistreg

%%

/* An operand.  */

operand:
	  generic_operand
	| motorola_operand
	| mit_operand
	;

/* A generic operand.  */

generic_operand:
	  DR
		{
		  op->mode = DREG;
		  op->reg = $1;
		}
	| AR
		{
		  op->mode = AREG;
		  op->reg = $1;
		}
	| FPR
		{
		  op->mode = FPREG;
		  op->reg = $1;
		}
	| FPCR
		{
		  op->mode = CONTROL;
		  op->reg = $1;
		}
	| CREG
		{
		  op->mode = CONTROL;
		  op->reg = $1;
		}
	| EXPR
		{
		  op->mode = ABSL;
		  op->disp = $1;
		}
	| '#' EXPR
		{
		  op->mode = IMMED;
		  op->disp = $2;
		}
	| '&' EXPR
		{
		  op->mode = IMMED;
		  op->disp = $2;
		}
	| reglist
		{
		  op->mode = REGLST;
		  op->mask = $1;
		}
	;

/* An operand in Motorola syntax.  This includes MRI syntax as well,
   which may or may not be different in that it permits commutativity
   of index and base registers, and permits an offset expression to
   appear inside or outside of the parentheses.  */

motorola_operand:
	  '(' AR ')'
		{
		  op->mode = AINDR;
		  op->reg = $2;
		}
	| '(' AR ')' '+'
		{
		  op->mode = AINC;
		  op->reg = $2;
		}
	| '-' '(' AR ')'
		{
		  op->mode = ADEC;
		  op->reg = $3;
		}
	| '(' EXPR ',' zapc ')'
		{
		  op->reg = $4;
		  op->disp = $2;
		  if (($4 >= ZADDR0 && $4 <= ZADDR7)
		      || $4 == ZPC)
		    op->mode = BASE;
		  else
		    op->mode = DISP;
		}
	| '(' zapc ',' EXPR ')'
		{
		  op->reg = $2;
		  op->disp = $4;
		  if (($2 >= ZADDR0 && $2 <= ZADDR7)
		      || $2 == ZPC)
		    op->mode = BASE;
		  else
		    op->mode = DISP;
		}
	| EXPR '(' zapc ')'
		{
		  op->reg = $3;
		  op->disp = $1;
		  if (($3 >= ZADDR0 && $3 <= ZADDR7)
		      || $3 == ZPC)
		    op->mode = BASE;
		  else
		    op->mode = DISP;
		}
	| '(' LPC ')'
		{
		  op->mode = DISP;
		  op->reg = $2;
		}
	| '(' ZAR ')'
		{
		  op->mode = BASE;
		  op->reg = $2;
		}
	| '(' LZPC ')'
		{
		  op->mode = BASE;
		  op->reg = $2;
		}
	| '(' EXPR ',' zapc ',' zireg ')'
		{
		  op->mode = BASE;
		  op->reg = $4;
		  op->disp = $2;
		  op->index = $6;
		}
	| '(' EXPR ',' zapc ',' zpc ')'
		{
		  if ($4 == PC || $4 == ZPC)
		    yyerror (_("syntax error"));
		  op->mode = BASE;
		  op->reg = $6;
		  op->disp = $2;
		  op->index.reg = $4;
		  op->index.size = SIZE_UNSPEC;
		  op->index.scale = 1;
		}
	| '(' EXPR ',' zdireg optczapc ')'
		{
		  op->mode = BASE;
		  op->reg = $5;
		  op->disp = $2;
		  op->index = $4;
		}
	| '(' zdireg ',' EXPR ')'
		{
		  op->mode = BASE;
		  op->disp = $4;
		  op->index = $2;
		}
	| EXPR '(' zapc ',' zireg ')'
		{
		  op->mode = BASE;
		  op->reg = $3;
		  op->disp = $1;
		  op->index = $5;
		}
	| '(' zapc ',' zireg ')'
		{
		  op->mode = BASE;
		  op->reg = $2;
		  op->index = $4;
		}
	| EXPR '(' zapc ',' zpc ')'
		{
		  if ($3 == PC || $3 == ZPC)
		    yyerror (_("syntax error"));
		  op->mode = BASE;
		  op->reg = $5;
		  op->disp = $1;
		  op->index.reg = $3;
		  op->index.size = SIZE_UNSPEC;
		  op->index.scale = 1;
		}
	| '(' zapc ',' zpc ')'
		{
		  if ($2 == PC || $2 == ZPC)
		    yyerror (_("syntax error"));
		  op->mode = BASE;
		  op->reg = $4;
		  op->index.reg = $2;
		  op->index.size = SIZE_UNSPEC;
		  op->index.scale = 1;
		}
	| EXPR '(' zdireg optczapc ')'
		{
		  op->mode = BASE;
		  op->reg = $4;
		  op->disp = $1;
		  op->index = $3;
		}
	| '(' zdireg optczapc ')'
		{
		  op->mode = BASE;
		  op->reg = $3;
		  op->index = $2;
		}
	| '(' '[' EXPR optczapc ']' ',' zireg optcexpr ')'
		{
		  op->mode = POST;
		  op->reg = $4;
		  op->disp = $3;
		  op->index = $7;
		  op->odisp = $8;
		}
	| '(' '[' EXPR optczapc ']' optcexpr ')'
		{
		  op->mode = POST;
		  op->reg = $4;
		  op->disp = $3;
		  op->odisp = $6;
		}
	| '(' '[' zapc ']' ',' zireg optcexpr ')'
		{
		  op->mode = POST;
		  op->reg = $3;
		  op->index = $6;
		  op->odisp = $7;
		}
	| '(' '[' zapc ']' optcexpr ')'
		{
		  op->mode = POST;
		  op->reg = $3;
		  op->odisp = $5;
		}
	| '(' '[' EXPR ',' zapc ',' zireg ']' optcexpr ')'
		{
		  op->mode = PRE;
		  op->reg = $5;
		  op->disp = $3;
		  op->index = $7;
		  op->odisp = $9;
		}
	| '(' '[' zapc ',' zireg ']' optcexpr ')'
		{
		  op->mode = PRE;
		  op->reg = $3;
		  op->index = $5;
		  op->odisp = $7;
		}
	| '(' '[' EXPR ',' zapc ',' zpc ']' optcexpr ')'
		{
		  if ($5 == PC || $5 == ZPC)
		    yyerror (_("syntax error"));
		  op->mode = PRE;
		  op->reg = $7;
		  op->disp = $3;
		  op->index.reg = $5;
		  op->index.size = SIZE_UNSPEC;
		  op->index.scale = 1;
		  op->odisp = $9;
		}
	| '(' '[' zapc ',' zpc ']' optcexpr ')'
		{
		  if ($3 == PC || $3 == ZPC)
		    yyerror (_("syntax error"));
		  op->mode = PRE;
		  op->reg = $5;
		  op->index.reg = $3;
		  op->index.size = SIZE_UNSPEC;
		  op->index.scale = 1;
		  op->odisp = $7;
		}
	| '(' '[' optexprc zdireg optczapc ']' optcexpr ')'
		{
		  op->mode = PRE;
		  op->reg = $5;
		  op->disp = $3;
		  op->index = $4;
		  op->odisp = $7;
		}
	;

/* An operand in MIT syntax.  */

mit_operand:
	  optzapc '@'
		{
		  /* We use optzapc to avoid a shift/reduce conflict.  */
		  if ($1 < ADDR0 || $1 > ADDR7)
		    yyerror (_("syntax error"));
		  op->mode = AINDR;
		  op->reg = $1;
		}
	| optzapc '@' '+'
		{
		  /* We use optzapc to avoid a shift/reduce conflict.  */
		  if ($1 < ADDR0 || $1 > ADDR7)
		    yyerror (_("syntax error"));
		  op->mode = AINC;
		  op->reg = $1;
		}
	| optzapc '@' '-'
		{
		  /* We use optzapc to avoid a shift/reduce conflict.  */
		  if ($1 < ADDR0 || $1 > ADDR7)
		    yyerror (_("syntax error"));
		  op->mode = ADEC;
		  op->reg = $1;
		}
	| optzapc '@' '(' EXPR ')'
		{
		  op->reg = $1;
		  op->disp = $4;
		  if (($1 >= ZADDR0 && $1 <= ZADDR7)
		      || $1 == ZPC)
		    op->mode = BASE;
		  else
		    op->mode = DISP;
		}
	| optzapc '@' '(' optexprc zireg ')'
		{
		  op->mode = BASE;
		  op->reg = $1;
		  op->disp = $4;
		  op->index = $5;
		}
	| optzapc '@' '(' EXPR ')' '@' '(' optexprc zireg ')'
		{
		  op->mode = POST;
		  op->reg = $1;
		  op->disp = $4;
		  op->index = $9;
		  op->odisp = $8;
		}
	| optzapc '@' '(' EXPR ')' '@' '(' EXPR ')'
		{
		  op->mode = POST;
		  op->reg = $1;
		  op->disp = $4;
		  op->odisp = $8;
		}
	| optzapc '@' '(' optexprc zireg ')' '@' '(' EXPR ')'
		{
		  op->mode = PRE;
		  op->reg = $1;
		  op->disp = $4;
		  op->index = $5;
		  op->odisp = $9;
		}
	;

/* An index register, possibly suppressed, which need not have a size
   or scale.  */

zireg:
	  INDEXREG
	| zadr
		{
		  $$.reg = $1;
		  $$.size = SIZE_UNSPEC;
		  $$.scale = 1;
		}
	;

/* A register which may be an index register, but which may not be an
   address register.  This nonterminal is used to avoid ambiguity when
   trying to parse something like (0,d5,a6) as compared to (0,a6,d5).  */

zdireg:
	  INDEXREG
	| zdr
		{
		  $$.reg = $1;
		  $$.size = SIZE_UNSPEC;
		  $$.scale = 1;
		}
	;

/* An address or data register, or a suppressed address or data
   register.  */

zadr:
	  zdr
	| AR
	| ZAR
	;

/* A data register which may be suppressed.  */

zdr:
	  DR
	| ZDR
	;

/* Either an address register or the PC.  */

apc:
	  AR
	| LPC
	;

/* Either an address register, or the PC, or a suppressed address
   register, or a suppressed PC.  */

zapc:
	  apc
	| LZPC
	| ZAR
	;

/* An optional zapc.  */

optzapc:
	  /* empty */
		{
		  $$ = ZADDR0;
		}
	| zapc
	;

/* The PC, optionally suppressed.  */