tc-a29k.c

基于4个mips核的noc设计

/* tc-a29k.c -- Assemble for the AMD 29000.
   Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000
   Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 59 Temple Place - Suite 330, Boston, MA
   02111-1307, USA.  */

/* John Gilmore has reorganized this module somewhat, to make it easier
   to convert it to new machines' assemblers as desired.  There was too
   much bloody rewriting required before.  There still probably is.  */

#include <ctype.h>
#include "as.h"

#include "opcode/a29k.h"

/* Make it easier to clone this machine desc into another one.  */
#define	machine_opcode	a29k_opcode
#define	machine_opcodes	a29k_opcodes
#define	machine_ip	a29k_ip
#define	machine_it	a29k_it

#define	IMMEDIATE_BIT	0x01000000	/* Turns RB into Immediate */
#define	ABSOLUTE_BIT	0x01000000	/* Turns PC-relative to Absolute */
#define	CE_BIT		0x00800000	/* Coprocessor enable in LOAD */
#define	UI_BIT		0x00000080	/* Unsigned integer in CONVERT */

/* handle of the OPCODE hash table */
static struct hash_control *op_hash = NULL;

struct machine_it
  {
    char *error;
    unsigned long opcode;
    struct nlist *nlistp;
    expressionS exp;
    int pcrel;
    int reloc_offset;		/* Offset of reloc within insn */

    int reloc;
  }
the_insn;

static void machine_ip PARAMS ((char *str));
/* static void print_insn PARAMS ((struct machine_it *insn)); */
#ifndef OBJ_COFF
static void s_data1 PARAMS ((void));
static void s_use PARAMS ((int));
#endif

const pseudo_typeS
md_pseudo_table[] =
{
  {"align", s_align_bytes, 4},
  {"block", s_space, 0},
  {"cputype", s_ignore, 0},	/* CPU as 29000 or 29050 */
  {"reg", s_lsym, 0},		/* Register equate, same as equ */
  {"space", s_ignore, 0},	/* Listing control */
  {"sect", s_ignore, 0},	/* Creation of coff sections */
#ifndef OBJ_COFF
  /* We can do this right with coff.  */
  {"use", s_use, 0},
#endif
  {"word", cons, 4},
  {NULL, 0, 0},
};

#if defined(BFD_HEADERS)
#ifdef RELSZ
const int md_reloc_size = RELSZ;	/* Coff headers */
#else
const int md_reloc_size = 12;		/* something else headers */
#endif
#else
const int md_reloc_size = 12;		/* Not bfdized*/
#endif

/* This array holds the chars that always start a comment.  If the
   pre-processor is disabled, these aren't very useful */
const char comment_chars[] = ";";

/* This array holds the chars that only start a comment at the beginning of
   a line.  If the line seems to have the form '# 123 filename'
   .line and .file directives will appear in the pre-processed output */
/* Note that input_file.c hand checks for '#' at the beginning of the
   first line of the input file.  This is because the compiler outputs
   #NO_APP at the beginning of its output.  */
/* Also note that comments like this one will always work */
const char line_comment_chars[] = "#";

/* We needed an unused char for line separation to work around the
   lack of macros, using sed and such.  */
const char line_separator_chars[] = "@";

/* Chars that can be used to separate mant from exp in floating point nums */
const char EXP_CHARS[] = "eE";

/* Chars that mean this number is a floating point constant */
/* As in 0f12.456 */
/* or    0d1.2345e12 */
const char FLT_CHARS[] = "rRsSfFdDxXpP";

/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
   changed in read.c.  Ideally it shouldn't have to know about it at
   all, but nothing is ideal around here.  */

/*
 *  anull bit - causes the branch delay slot instructions to not be executed
 */
#define ANNUL       (1 << 29)

#ifndef OBJ_COFF

static void
s_use (ignore)
     int ignore;
{
  if (strncmp (input_line_pointer, ".text", 5) == 0)
    {
      input_line_pointer += 5;
      s_text (0);
      return;
    }
  if (strncmp (input_line_pointer, ".data", 5) == 0)
    {
      input_line_pointer += 5;
      s_data (0);
      return;
    }
  if (strncmp (input_line_pointer, ".data1", 6) == 0)
    {
      input_line_pointer += 6;
      s_data1 ();
      return;
    }
  /* Literals can't go in the text segment because you can't read from
     instruction memory on some 29k's.  So, into initialized data.  */
  if (strncmp (input_line_pointer, ".lit", 4) == 0)
    {
      input_line_pointer += 4;
      subseg_set (SEG_DATA, 200);
      demand_empty_rest_of_line ();
      return;
    }

  as_bad (_("Unknown segment type"));
  demand_empty_rest_of_line ();
}

static void
s_data1 ()
{
  subseg_set (SEG_DATA, 1);
  demand_empty_rest_of_line ();
}

#endif /* OBJ_COFF */

/* Install symbol definition that maps REGNAME to REGNO.
   FIXME-SOON:  These are not recognized in mixed case.  */

static void
insert_sreg (regname, regnum)
     char *regname;
     int regnum;
{
  /* FIXME-SOON, put something in these syms so they won't be output
     to the symbol table of the resulting object file.  */

  /* Must be large enough to hold the names of the special registers.  */
  char buf[80];
  int i;

  symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum,
				   &zero_address_frag));
  for (i = 0; regname[i]; i++)
    buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
  buf[i] = '\0';

  symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum,
				   &zero_address_frag));
}

/* Install symbol definitions for assorted special registers.
   See ASM29K Ref page 2-9.  */

void
define_some_regs ()
{
#define SREG	256

  /* Protected special-purpose register names */
  insert_sreg ("vab", SREG + 0);
  insert_sreg ("ops", SREG + 1);
  insert_sreg ("cps", SREG + 2);
  insert_sreg ("cfg", SREG + 3);
  insert_sreg ("cha", SREG + 4);
  insert_sreg ("chd", SREG + 5);
  insert_sreg ("chc", SREG + 6);
  insert_sreg ("rbp", SREG + 7);
  insert_sreg ("tmc", SREG + 8);
  insert_sreg ("tmr", SREG + 9);
  insert_sreg ("pc0", SREG + 10);
  insert_sreg ("pc1", SREG + 11);
  insert_sreg ("pc2", SREG + 12);
  insert_sreg ("mmu", SREG + 13);
  insert_sreg ("lru", SREG + 14);

  /* Additional protected special-purpose registers for the 29050 */
  insert_sreg ("rsn",  SREG + 15);
  insert_sreg ("rma0", SREG + 16);
  insert_sreg ("rmc0", SREG + 17);
  insert_sreg ("rma1", SREG + 18);
  insert_sreg ("rmc1", SREG + 19);
  insert_sreg ("spc0", SREG + 20);
  insert_sreg ("spc1", SREG + 21);
  insert_sreg ("spc2", SREG + 22);
  insert_sreg ("iba0", SREG + 23);
  insert_sreg ("ibc0", SREG + 24);
  insert_sreg ("iba1", SREG + 25);
  insert_sreg ("ibc1", SREG + 26);

  /* Additional registers for the 29040.  */
  insert_sreg ("dba", SREG + 27);
  insert_sreg ("dbc", SREG + 28);
  insert_sreg ("cir", SREG + 29);
  insert_sreg ("cdr", SREG + 30);

  /* Unprotected special-purpose register names */
  insert_sreg ("ipc", SREG + 128);
  insert_sreg ("ipa", SREG + 129);
  insert_sreg ("ipb", SREG + 130);
  insert_sreg ("q", SREG + 131);
  insert_sreg ("alu", SREG + 132);
  insert_sreg ("bp", SREG + 133);
  insert_sreg ("fc", SREG + 134);
  insert_sreg ("cr", SREG + 135);
  insert_sreg ("fpe", SREG + 160);
  insert_sreg ("inte", SREG + 161);
  insert_sreg ("fps", SREG + 162);
  /*  "",    SREG+163);	  Reserved */
  insert_sreg ("exop", SREG + 164);
}

/* This function is called once, at assembler startup time.  It should
   set up all the tables, etc., that the MD part of the assembler will
   need.  */
void
md_begin ()
{
  register const char *retval = NULL;
  int lose = 0;
  register int skipnext = 0;
  register unsigned int i;
  register char *strend, *strend2;

  /* Hash up all the opcodes for fast use later.  */

  op_hash = hash_new ();

  for (i = 0; i < num_opcodes; i++)
    {
      const char *name = machine_opcodes[i].name;

      if (skipnext)
	{
	  skipnext = 0;
	  continue;
	}

      /* Hack to avoid multiple opcode entries.  We pre-locate all the
	 variations (b/i field and P/A field) and handle them.  */

      if (!strcmp (name, machine_opcodes[i + 1].name))
	{
	  if ((machine_opcodes[i].opcode & 0x01000000) != 0
	      || (machine_opcodes[i + 1].opcode & 0x01000000) == 0
	      || ((machine_opcodes[i].opcode | 0x01000000)
		  != machine_opcodes[i + 1].opcode))
	    goto bad_table;
	  strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1;
	  strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1;
	  switch (*strend)
	    {
	    case 'b':
	      if (*strend2 != 'i')
		goto bad_table;
	      break;
	    case 'P':
	      if (*strend2 != 'A')
		goto bad_table;
	      break;
	    default:
	    bad_table:
	      fprintf (stderr, "internal error: can't handle opcode %s\n",
		       name);
	      lose = 1;
	    }

	  /* OK, this is an i/b or A/P pair.  We skip the
	     higher-valued one, and let the code for operand checking
	     handle OR-ing in the bit.  */
	  skipnext = 1;
	}

      retval = hash_insert (op_hash, name, (PTR) &machine_opcodes[i]);
      if (retval != NULL)
	{
	  fprintf (stderr, "internal error: can't hash `%s': %s\n",
		   machine_opcodes[i].name, retval);
	  lose = 1;
	}
    }

  if (lose)
    as_fatal (_("Broken assembler.  No assembly attempted."));

  define_some_regs ();
}

/* Assemble a single instruction.  Its label has already been handled
   by the generic front end.  We just parse opcode and operands, and
   produce the bytes of data and relocation.  */

void
md_assemble (str)
     char *str;
{
  char *toP;

  know (str);
  machine_ip (str);
  toP = frag_more (4);
  /* put out the opcode */
  md_number_to_chars (toP, the_insn.opcode, 4);

  /* put out the symbol-dependent stuff */
  if (the_insn.reloc != NO_RELOC)
    {
      fix_new_exp (frag_now,
		   (toP - frag_now->fr_literal + the_insn.reloc_offset),
		   4,		/* size */
		   &the_insn.exp,
		   the_insn.pcrel,
		   the_insn.reloc);
    }
}

char *
parse_operand (s, operandp, opt)
     char *s;
     expressionS *operandp;
     int opt;
{
  char *save = input_line_pointer;
  char *new;

  input_line_pointer = s;
  expression (operandp);
  if (operandp->X_op == O_absent && ! opt)
    as_bad (_("missing operand"));
  new = input_line_pointer;
  input_line_pointer = save;
  return new;
}

/* Instruction parsing.  Takes a string containing the opcode.
   Operands are at input_line_pointer.  Output is in the_insn.
   Warnings or errors are generated.  */

static void
machine_ip (str)
     char *str;
{
  char *s;
  const char *args;
  struct machine_opcode *insn;
  char *argsStart;
  unsigned long opcode;
  expressionS the_operand;
  expressionS *operand = &the_operand;
  unsigned int reg;

  /* Must handle `div0' opcode.  */
  s = str;
  if (isalpha (*s))
    for (; isalnum (*s); ++s)
      if (isupper (*s))
	*s = tolower (*s);

  switch (*s)
    {
    case '\0':
      break;

    case ' ':			/* FIXME-SOMEDAY more whitespace */
      *s++ = '\0';
      break;

    default:
      as_bad (_("Unknown opcode: `%s'"), str);
      return;
    }
  if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL)
    {
      as_bad (_("Unknown opcode `%s'."), str);
      return;
    }
  argsStart = s;
  opcode = insn->opcode;
  memset (&the_insn, '\0', sizeof (the_insn));
  the_insn.reloc = NO_RELOC;

  /* Build the opcode, checking as we go to make sure that the
     operands match.

     If an operand matches, we modify the_insn or opcode appropriately,