changelog
来自「基于4个mips核的noc设计」· 代码 · 共 1,990 行 · 第 1/5 页
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1,990 行
(cgen_parse_address): Update prototype.Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com> * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h (two_byte_segment_defaults): Correct base register 5 in modes 1 and 2 to be ss rather than ds. From Gabriel Paubert <paubert@iram.es>. * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert <paubert@iram.es>. * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert <paubert@iram.es>. * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again). (JUMP_ON_ECX_ZERO): Remove commented out macro.Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com> * v850.h (V850_NOT_R0): New flag.Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com> * v850.h (struct v850_opcode): Remove flags field.Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com> * v850.h (struct v850_opcode): Add flags field. (struct v850_operand): Extend meaning of 'bits' and 'shift' fields. (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags. (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com> * arc.h: New file.Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com> * sparc.h (sparc_opcodes): Declare as const.Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com) * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn uses single or double precision floating point resources. (INSN_NO_ISA, INSN_ISA1): Define. (cpu specific INSN macros): Tweak into bitmasks outside the range of INSN_ISA field.Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu> * i386.h: Fix pand opcode.Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com> * mips.h: Widen INSN_ISA and move it to a more convenient bit position. Add INSN_3900.Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com> * mips.h (struct mips_opcode): added new field membership.Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu> * i386.h (movd): only Reg32 is allowed. * i386.h: add fcomp and ud2. From Wayne Scott <wscott@ichips.intel.com>.Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Add MMX instructions.Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu> * i386.h: Remove W modifier from conditional move instructions.Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp with no arguments to match that generated by the UnixWare assembler.Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com> * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg. (cgen_parse_operand_fn): Declare. (cgen_init_parse_operand): Declare. (cgen_parse_operand): Renamed from cgen_asm_parse_operand, new argument `want'. (enum cgen_parse_operand_result): Renamed from cgen_asm_result. (enum cgen_parse_operand_type): New enum.Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com> * cgen.h: New file.Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and fdivrp.Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com) * v850.h (extract): Make unsigned.Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Add iclr.Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Change DW to W for cmpxchg and xadd, since they don't take a direction bit.Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org> * sparc.h (sparc_opcode_lookup_arch): Use full prototype.Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com> * sparc.h: Include <ansidecl.h>. Update function declarations to use prototypes, and to use const when appropriate.Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com) * mn10300.h (MN10300_OPERAND_RELAX): Define.Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com> * d10v.h: Change pre_defined_registers to d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com> * mips.h: Add macros for cop0, cop1 cop2 and cop3. Change mips_opcodes from const array to a pointer, and change bfd_mips_num_opcodes from const int to int, so that we can increase the size of the mips opcodes table dynamically.Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com> * d30v.h (FLAG_X): Remove unused flag.Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com> * d30v.h: New file.Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com> * tic80.h (PDS_NAME): Macro to access name field of predefined symbols. (PDS_VALUE): Macro to access value field of predefined symbols. (tic80_next_predefined_symbol): Add prototype.Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com> * tic80.h (tic80_symbol_to_value): Change prototype to match change in function, added class parameter.Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com> * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80 endmask fields, which are somewhat weird in that 0 and 32 are treated exactly the same.Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com> * tic80.h: Change all the OPERAND defines to use the form (1 << X) rather than a constant that is 2**X. Reorder them to put bits for operands that have symbolic names in the upper bits, so they can be packed into an int where the lower bits contain the value that corresponds to that symbolic name. (predefined_symbo): Add struct. (tic80_predefined_symbols): Declare array of translations. (tic80_num_predefined_symbols): Declare size of that array. (tic80_value_to_symbol): Declare function. (tic80_symbol_to_value): Declare function.Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com) * mn10200.h (MN10200_OPERAND_RELAX): Define.Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com> * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot be the destination register.Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com> * tic80.h (struct tic80_opcode): Change "format" field to "flags". (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete. (TIC80_VECTOR): Define a flag bit for the flags. This one means that the opcode can have two vector instructions in a single 32 bit word and we have to encode/decode both.Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com> * tic80.h (TIC80_OPERAND_PCREL): Renamed from TIC80_OPERAND_RELATIVE for PC relative. (TIC80_OPERAND_BASEREL): New flag bit for register base relative.Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com> * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com> * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional ":s" modifier for scaling.Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com> * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m". (TIC80_OPERAND_M_LI): DittoSat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com> * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ. (TIC80_OPERAND_CC): New define for condition code operand. (TIC80_OPERAND_CR): New define for control register operand.Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com> * tic80.h (struct tic80_opcode): Name changed. (struct tic80_opcode): Remove format field. (struct tic80_operand): Add insertion and extraction functions. (TIC80_OPERAND_*): Remove old bogus values, start adding new correct ones. (FMT_*): Ditto.Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com> * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust type IV instruction offsets.Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com> * tic80.h: New file.Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com) * mn10200.h (MN10200_OPERAND_NOCHECK): Define.Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com> * mn10200.h: Fix comment, mn10200_operand not powerpc_operand. * mn10300.h: Fix comment, mn10300_operand not powerpc_operand. * v850.h: Fix comment, v850_operand not powerpc_operand.Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com) * mn10200.h: Flesh out structures and definitions needed by the mn10200 assembler & disassembler.Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com> * mips.h: Add mips16 definitions.Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com> * m68k.h: Document new <, >, m, n, o and p operand specifiers.Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (MN10300_OPERAND_PCREL): Define. (MN10300_OPERAND_MEMADDR): Define.Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (MN10300_OPERAND_REG_LIST): Define.Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (MN10300_OPERAND_SPLIT): Define.Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (MN10300_OPERAND_EXTENDED): Define.Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (MN10300_OPERAND_REPEATED): Define.Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu> * alpha.h: Don't include "bfd.h"; private relocation types are now negative to minimize problems with shared libraries. Organize instruction subsets by AMASK extensions and PALcode implementation. (struct alpha_operand): Move flags slot for better packing.Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com) * v850.h (V850_OPERAND_RELAX): New operand flag.Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (FMT_*): Move operand format definitions here.Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (MN10300_OPERAND_PAREN): Define.Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com) * mn10300.h (mn10300_opcode): Add "format" field. (MN10300_OPERAND_*): Define.Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com) * mn10x00.h: Delete. * mn10200.h, mn10300.h: New files.Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com) * mn10x00.h: New file.Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com) * v850.h: Add new flag to indicate this instruction uses a PC displacement.Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com) * h8300.h (stmac): Add missing instruction.Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com) * v850.h (v850_opcode): Remove "size" field. Add "memop" field.Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com) * v850.h (V850_OPERAND_EP): Define. * v850.h (v850_opcode): Add size field.Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com> * v850.h (v850_operands): Add insert and extract fields, pointers to functions used to handle unusual operand encoding. (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC, V850_OPERAND_SIGNED): Defined.Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com> * v850.h (v850_operands): Add flags field. (OPERAND_REG, OPERAND_NUM): Defined.Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com> * v850.h: New file.Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk> * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM, OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC, OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT, OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE, OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT): Defined.Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com) * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept a 3 bit space id instead of a 2 bit space id.Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com> * d10v.h: Add some additional defines to support the assembler in determining which operations can be done in parallel.Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com) * h8300.h (SN): Define. (eepmov.b): Renamed from "eepmov" (nop, bpt, rte, rts, sleep, clrmac): These have no size associated with them.Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com> * d10v.h (OPERAND_SHIFT): New operand flag.Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com> * d10v.h: Changes for divs, parallel-only instructions, and signed numbers.
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