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📄 tx_ill.s

📁 ThreadX Library for ARM RISC microprocessor. ThreadX is a high performance RTOS that is wildly used
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;/**************************************************************************/ 
;/*                                                                        */ 
;/*            Copyright (c) 1996-2000 by Express Logic Inc.               */ 
;/*                                                                        */ 
;/*  This software is copyrighted by and is the sole property of Express   */ 
;/*  Logic, Inc.  All rights, title, ownership, or other interests         */ 
;/*  in the software remain the property of Express Logic, Inc.  This      */ 
;/*  software may only be used in accordance with the corresponding        */ 
;/*  license agreement.  Any unauthorized use, duplication, transmission,  */ 
;/*  distribution, or disclosure of this software is expressly forbidden.  */ 
;/*                                                                        */
;/*  This Copyright notice may not be removed or modified without prior    */ 
;/*  written consent of Express Logic, Inc.                                */ 
;/*                                                                        */ 
;/*  Express Logic, Inc. reserves the right to modify this software        */ 
;/*  without notice.                                                       */ 
;/*                                                                        */ 
;/*  Express Logic, Inc.                                                   */
;/*  11440 West Bernardo Court               info@expresslogic.com         */
;/*  Suite 366                               http://www.expresslogic.com   */
;/*  San Diego, CA  92127                                                  */
;/*                                                                        */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/**                                                                       */ 
;/** ThreadX Component                                                     */ 
;/**                                                                       */
;/**   Initialize (INI)                                                    */
;/**                                                                       */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define    TX_SOURCE_CODE
;
;
;/* Include necessary system files.  */
;
;#include   "tx_api.h"
;#include   "tx_ini.h"
;#include   "tx_thr.h"
;#include   "tx_tim.h"
;
SVC_MODE        EQU     0xD3                ; Disable irq,fiq SVC mode
IRQ_MODE        EQU     0xD2                ; Disable irq,fiq IRQ mode
FIQ_MODE        EQU     0xD1                ; Disable irq,fiq FIQ mode
;
;
    IMPORT      _tx_thread_system_stack_ptr
    IMPORT      _tx_initialize_unused_memory
    IMPORT      _tx_thread_context_save
    IMPORT      _tx_thread_context_restore
    IMPORT      _tx_timer_interrupt
    IMPORT      _tx_timer_stack_start
    IMPORT      _tx_timer_stack_size
    IMPORT      _tx_timer_priority
    IMPORT      __main
    IMPORT      |Image$$RO$$Limit|
    IMPORT      |Image$$RW$$Base|
    IMPORT      |Image$$ZI$$Base|
    IMPORT      |Image$$ZI$$Limit|
;
;
        AREA  Init, CODE, READONLY
;
;/* Define the ARM7 vector area.  This should be located or copied to 0.  */
;
    EXPORT  __vectors
__vectors
    LDR     pc,=__main                      ; Reset goes to startup function
    LDR     pc,=__tx_undefined              ; Undefined handler
    LDR     pc,=__tx_swi_interrupt          ; Software interrupt handler
    LDR     pc,=__tx_prefetch_handler       ; Prefetch exeception handler
    LDR     pc,=__tx_abort_handler          ; Abort exception handler
    LDR     pc,=__tx_reserved_handler       ; Reserved exception handler
    LDR     pc,=__tx_irq_handler            ; IRQ interrupt handler
    LDR     pc,=__tx_fiq_handler            ; FIQ interrupt handler

        AREA  |C$$code|, CODE, READONLY
|x$codeseg| DATA
;
;/**************************************************************************/ 
;/*                                                                        */ 
;/*  FUNCTION                                               RELEASE        */ 
;/*                                                                        */ 
;/*    _tx_initialize_low_level                             ARM7/ARM       */ 
;/*                                                           3.0g         */ 
;/*  AUTHOR                                                                */ 
;/*                                                                        */ 
;/*    William E. Lamie, Express Logic, Inc.                               */ 
;/*                                                                        */ 
;/*  DESCRIPTION                                                           */ 
;/*                                                                        */ 
;/*    This function is responsible for any low-level processor            */ 
;/*    initialization, including setting up interrupt vectors, saving the  */ 
;/*    system stack pointer, finding the first available memory address,   */ 
;/*    and setting up parameters for the system's timer thread.            */ 
;/*                                                                        */ 
;/*  INPUT                                                                 */ 
;/*                                                                        */ 
;/*    None                                                                */ 
;/*                                                                        */ 
;/*  OUTPUT                                                                */ 
;/*                                                                        */ 
;/*    None                                                                */ 
;/*                                                                        */ 
;/*  CALLS                                                                 */ 
;/*                                                                        */ 
;/*    None                                                                */ 
;/*                                                                        */ 
;/*  CALLED BY                                                             */ 
;/*                                                                        */ 
;/*    _tx_initialize_kernel_enter           ThreadX entry function        */ 
;/*                                                                        */ 
;/*  RELEASE HISTORY                                                       */ 
;/*                                                                        */ 
;/*    DATE              NAME                      DESCRIPTION             */ 
;/*                                                                        */ 
;/*  06-15-1997     William E. Lamie         Initial Version 3.0           */ 
;/*  11-11-1997     William E. Lamie         Modified comment(s),          */ 
;/*                                            resulting in version 3.0b.  */ 
;/*  03-01-1998     William E. Lamie         Modified comment(s),          */ 
;/*                                            resulting in version 3.0d.  */ 
;/*  01-01-1999     William E. Lamie         Modified comment(s),          */ 
;/*                                            resulting in version 3.0e.  */ 
;/*  03-01-2000     William E. Lamie         Modified comments(s),         */
;/*                                            modified interrupt vector,  */ 
;/*                                            added code section,         */ 
;/*                                            removed code to bypass ARM  */ 
;/*                                            C library, and changed MSR  */ 
;/*                                            instructions to use the     */ 
;/*                                            flags modifier, resulting   */ 
;/*                                            in version 3.0g.            */ 
;/*                                                                        */ 
;/**************************************************************************/ 
;VOID   _tx_initialize_low_level(VOID)
;{
    EXPORT  _tx_initialize_low_level
_tx_initialize_low_level
;
;    /* We must be in SVC mode at this point!  */
;
    LDR     a2, =|Image$$ZI$$Limit|         ; Get end of non-initialized RAM area
    LDR     a3, [pc, #FIQ_STACK_SIZE-.-8]   ; Pickup stack size
    MOV     a1, #FIQ_MODE                   ; Build FIQ mode CPSR
    MSR     CPSR_c, a1                      ; Enter FIQ mode
    ADD     a2, a2, a3                      ; Calculate start of FIQ stack
    BIC     a2, a2, #3                      ; Ensure long word alignment
    SUB     a2, a2, #4                      ; Backup one word
    MOV     sp, a2                          ; Setup FIQ stack pointer
    MOV     sl, #0                          ; Clear sl
    MOV     fp, #0                          ; Clear fp
    LDR     a3, [pc, #SYS_STACK_SIZE-.-8]   ; Pickup IRQ (system stack size)
    MOV     a1, #IRQ_MODE                   ; Build IRQ mode CPSR
    MSR     CPSR_c, a1                      ; Enter IRQ mode
    ADD     a2, a2, a3                      ; Calculate start of IRQ stack
    BIC     a2, a2, #3                      ; Ensure long word alignment
    SUB     a2, a2, #4                      ; Backup one word
    MOV     sp, a2                          ; Setup IRQ stack pointer
    MOV     a1, #SVC_MODE                   ; Build SVC mode CPSR
    MSR     CPSR_c, a1                      ; Enter SVC mode
    LDR     a4, [pc, #SYS_STACK_PTR-.-8]    ; Pickup stack pointer
    STR     a2, [a4, #0]                    ; Save the system stack
;
;    /* Save the system stack pointer.  */
;    _tx_thread_system_stack_ptr = (VOID_PTR) (sp);
;
    LDR     a2, [pc, #SYS_STACK_PTR-.-8]    ; Pickup address of system stack ptr
    LDR     a1, [a2, #0]                    ; Pickup system stack 
    ADD     a1, a1, #4                      ; Increment to next free word
;
;    /* Pickup the first available memory address.  */
;
;    /* Allocate space for the timer thread's stack.  */
;    _tx_timer_stack_start =        first_available_memory;
;    _tx_timer_stack_size =         stack_size;
;    _tx_timer_priority =           0;
;
    LDR     a2, [pc, #TIMER_STACK-.-8]      ; Pickup timer stack ptr address
    LDR     a4, [pc, #TIMER_STACK_SIZE-.-8] ; Pickup timer stack size address
    LDR     a3, [pc, #TIM_STACK_SIZE-.-8]   ; Pickup actual stack size
    STR     a1, [a2, #0]                    ; Store timer stack base
    STR     a3, [a4, #0]                    ; Store timer stack size
    ADD     a1, a1, a3                      ; New free memory address
    LDR     a2, [pc, #TIMER_PRIORITY-.-8]   ; Pickup timer priority address
    MOV     a3, #0                          ; Build timer thread priority
    STR     a3, [a2, #0]                    ; Store timer thread priority
;
;    /* Save the first available memory address.  */
;    _tx_initialize_unused_memory =  (VOID_PTR) System Stack + Timer Stack;
;
    LDR     a3, [pc, #UNUSED_MEMORY-.-8]    ; Pickup unused memory ptr address
    STR     a1, [a3, #0]                    ; Save first free memory address
;
;    /* Setup Timer for periodic interrupts.  */
;
;    /* Done, return to caller.  */
;
    MOV     pc, lr                          ; Return to caller
;}
;
;
;/* Define shells for each of the interrupt vectors.  */
;
    EXPORT  __tx_undefined
__tx_undefined
    B       __tx_undefined                  ; Undefined handler
;
    EXPORT  __tx_swi_interrupt
__tx_swi_interrupt
    B       __tx_swi_interrupt              ; Software interrupt handler
;
    EXPORT  __tx_prefetch_handler
__tx_prefetch_handler
    B       __tx_prefetch_handler           ; Prefetch exeception handler
;
    EXPORT  __tx_abort_handler
__tx_abort_handler
    B       __tx_abort_handler              ; Abort exception handler
;
    EXPORT  __tx_reserved_handler
__tx_reserved_handler
    B       __tx_reserved_handler           ; Reserved exception handler
;
    EXPORT  __tx_irq_handler
    EXPORT  __tx_irq_processing_return      
__tx_irq_handler
;
;    /* Jump to context save to save system context.  */
    B       _tx_thread_context_save
__tx_irq_processing_return
;
;    /* At this point execution is still in the IRQ mode.  The CPSR, point of
;       interrupt, and all C scratch registers are available for use.  In 
;       addition, IRQ interrupts may be re-enabled - with certain restrictions -
;       if nested IRQ interrupts are desired.  Interrupts may be re-enabled over
;       small code sequences where lr is saved before enabling interrupts and 
;       restored after interrupts are again disabled.  */
;
;    /* For debug purpose, execute the timer interrupt processing here.  In
;       a real system, some kind of status indication would have to be checked
;       before the timer interrupt handler could be called.  */
;
    BL      _tx_timer_interrupt             ; Timer interrupt handler
;
;    /* Jump to context restore to restore system context.  */
    B       _tx_thread_context_restore
;
    EXPORT  __tx_fiq_handler
__tx_fiq_handler
    B       __tx_fiq_handler                ; FIQ interrupt handler
;
;
SYS_STACK_PTR
    DCD     _tx_thread_system_stack_ptr
FIQ_STACK_SIZE
    DCD     512                             ; Keep 4-byte alignment
SYS_STACK_SIZE
    DCD     1024                            ; Keep 4-byte alignment
TIM_STACK_SIZE
    DCD     1024                            ; Timer stack size
UNUSED_MEMORY
    DCD     _tx_initialize_unused_memory
TIMER_STACK
    DCD     _tx_timer_stack_start
TIMER_STACK_SIZE
    DCD     _tx_timer_stack_size
TIMER_PRIORITY
    DCD     _tx_timer_priority
    END

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