s3c2410x_sdi.h

Windows CE documentation and examples from the Windows CE development manuals. There are lots of exa

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this sample source code is subject to the terms of the Microsoft
// license agreement under which you licensed this sample source code. If
// you did not accept the terms of the license agreement, you are not
// authorized to use this sample source code. For the terms of the license,
// please see the license agreement between you and Microsoft or, if applicable,
// see the LICENSE.RTF on your install media or the root of your tools installation.
// THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES.
//
//------------------------------------------------------------------------------
//
//  Header: s3c2410x_sdi.h
//
//  Defines the Secure Digital IO controller CPU register layout and
//  definitions.
//
#ifndef __S3C2410X_SDI_H
#define __S3C2410X_SDI_H

#if __cplusplus
    extern "C" 
    {
#endif


//------------------------------------------------------------------------------
//  Type: S3C2410X_SDI_REG    
//
//  SDI Control Registers. This register bank is located by the constant
//  CPU_BASE_REG_XX_SDI in the configuration file cpu_base_reg_cfg.h.
//

typedef struct 
{
    UINT32    SDICON;                 // control reg
    UINT32    SDIPRE;                 // baud rate prescaler reg
    UINT32    SDICARG;                // command arg reg
    UINT32    SDICCON;                // command control reg
    UINT32    SDICSTA;                // command status reg
    UINT32    SDIRSP0;                // response reg 0
    UINT32    SDIRSP1;                // response reg 1
    UINT32    SDIRSP2;                // response reg 2
    UINT32    SDIRSP3;                // response reg 3
    UINT32    SDIDTIMER;              // data/busy timer reg
    UINT32    SDIBSIZE;               // block size reg
    UINT32    SDIDCON;                // data control reg
    UINT32    SDIDCNT;                // data remain counter reg
    UINT32    SDIDSTA;                // data status reg
    UINT32    SDIFSTA;                // FIFO status reg
    UINT32    SDIDAT;                 // data reg
    UINT32    SDIIMSK;                // interrupt mask reg

} S3C2410X_SDI_REG, *PS3C2410X_SDI_REG;


#if __cplusplus
    }
#endif

#endif