📄 singt.sim.rpt
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; |singt|IncDec:Incounti|counter[5] ; |singt|IncDec:Incounti|counter[5]~95COUT1_105 ; cout1 ;
; |singt|IncDec:Incounti|counter[6] ; |singt|IncDec:Incounti|counter[6] ; regout ;
; |singt|IncDec:Incounti|counter[6] ; |singt|IncDec:Incounti|counter[6]~96COUT1_106 ; cout1 ;
; |singt|IncDec:Incounti|counter[7] ; |singt|IncDec:Incounti|counter[7] ; regout ;
; |singt|IncDec:Incounti|counter[7] ; |singt|IncDec:Incounti|counter[7]~97COUT1_107 ; cout1 ;
; |singt|IncDec:Incounti|counter[8] ; |singt|IncDec:Incounti|counter[8] ; regout ;
; |singt|IncDec:Incounti|counter[8] ; |singt|IncDec:Incounti|counter[8]~98COUT1_108 ; cout1 ;
; |singt|IncDec:Incounti|counter[9] ; |singt|IncDec:Incounti|counter[9] ; regout ;
; |singt|clock ; |singt|clock ; combout ;
+-----------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 1 during simulation.
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~61 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~61 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~61 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[0] ; regout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~61 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~62 ; cout0 ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~61 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~62COUT1_78 ; cout1 ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~63 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~63 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~63 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[1] ; regout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~65 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~65 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~65 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[2] ; regout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~65 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~66 ; cout0 ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~65 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~66COUT1_80 ; cout1 ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~67 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~67 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~67 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[3] ; regout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~69 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~69 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~69 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[4] ; regout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~69 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~70 ; cout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~71 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~71 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~71 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[5] ; regout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~71 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~72 ; cout0 ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~73 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~73 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~73 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[6] ; regout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~73 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~74 ; cout0 ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~73 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~74COUT1_82 ; cout1 ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75 ; combout ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75 ; |singt|sld_signaltap:singt|acq_trigger_in_reg[7] ; regout ;
; |singt|altera_internal_jtag~TDO ; |singt|altera_internal_jtag~TDO ; tdo ;
; |singt|altera_internal_jtag~TDO ; |singt|altera_internal_jtag~TMSUTAP ; tmsutap ;
; |singt|altera_internal_jtag~TDO ; |singt|altera_internal_jtag~TCKUTAP ; tckutap ;
; |singt|altera_internal_jtag~TDO ; |singt|altera_internal_jtag ; tdiutap ;
; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|_~15 ; |singt|AltiMult:Producti|lpm_mult:Mult0|multcore:mult_core|_~15 ; combout ;
; |singt|sld_hub:sld_hub_inst|hub_tdo ; |singt|sld_hub:sld_hub_inst|hub_tdo ; regout ;
; |singt|sld_hub:sld_hub_inst|jtag_debug_mode_usr1 ; |singt|sld_hub:sld_hub_inst|jtag_debug_mode_usr1 ; regout ;
; |singt|sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] ; |singt|sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] ; regout ;
; |singt|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] ; |singt|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] ; regout ;
; |singt|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] ; |singt|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] ; regout ;
; |singt|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 ; |singt|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 ; combout ;
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