ppc405ep

UrJTAG package is free software, covered by the GNU General Public License, and you are welcome to

signal TDI
signal TMS
signal TRST
signal TCK
signal TDO
signal SysClk
signal AVDD
signal AGND
signal SysReset
signal TesetEn
signal Halt
signal SysErr
signal MemData0
signal MemData1
signal MemData2
signal MemData3
signal MemData4
signal MemData5
signal MemData6
signal MemData7
signal MemData8
signal MemData9
signal MemData10
signal MemData11
signal MemData12
signal MemData13
signal MemData14
signal MemData15
signal MemData16
signal MemData17
signal MemData18
signal MemData19
signal MemData20
signal MemData21
signal MemData22
signal MemData23
signal MemData24
signal MemData25
signal MemData26
signal MemData27
signal MemData28
signal MemData29
signal MemData30
signal MemData31
signal MemAddr0
signal MemAddr1
signal MemAddr2
signal MemAddr3
signal MemAddr4
signal MemAddr5
signal MemAddr6
signal MemAddr7
signal MemAddr8
signal MemAddr9
signal MemAddr10
signal MemAddr11
signal MemAddr12
signal BA0
signal BA1
signal RAS
signal CAS
signal DQM0
signal DQM1
signal DQM2
signal DQM3
signal BankSel0
signal BankSel1
signal WE
signal ClkEn0
signal ClkEn1
signal MemClkOut0
signal MemClkOut1
signal PerData0
signal PerData1
signal PerData2
signal PerData3
signal PerData4
signal PerData5
signal PerData6
signal PerData7
signal PerData8
signal PerData9
signal PerData10
signal PerData11
signal PerData12
signal PerData13
signal PerData14
signal PerData15
signal PerAddr6
signal PerAddr7
signal PerAddr8
signal PerAddr9
signal PerAddr10
signal PerAddr11
signal PerAddr12
signal PerAddr13
signal PerAddr14
signal PerAddr15
signal PerAddr16
signal PerAddr17
signal PerAddr18
signal PerAddr19
signal PerAddr20
signal PerAddr21
signal PerAddr22
signal PerAddr23
signal PerAddr24
signal PerAddr25
signal PerAddr26
signal PerAddr27
signal PerAddr28
signal PerAddr29
signal PerAddr30
signal PerAddr31
signal PerWBE0
signal PerWBE1
signal PerCS0
signal PerOE
signal PerRnW
signal PerReady
signal PerClk
signal ExtReset
signal PCIAD0
signal PCIAD1
signal PCIAD2
signal PCIAD3
signal PCIAD4
signal PCIAD5
signal PCIAD6
signal PCIAD7
signal PCIAD8
signal PCIAD9
signal PCIAD10
signal PCIAD11
signal PCIAD12
signal PCIAD13
signal PCIAD14
signal PCIAD15
signal PCIAD16
signal PCIAD17
signal PCIAD18
signal PCIAD19
signal PCIAD20
signal PCIAD21
signal PCIAD22
signal PCIAD23
signal PCIAD24
signal PCIAD25
signal PCIAD26
signal PCIAD27
signal PCIAD28
signal PCIAD29
signal PCIAD30
signal PCIAD31
signal PCIC0_BE0
signal PCIC0_BE1
signal PCIC0_BE2
signal PCIC0_BE3
signal PCIParity
signal PCIFrame
signal PCIIRDY
signal PCITRDY
signal PCIStop
signal PCIDevSel
signal PCIIDSel
signal PCISErr
signal PCIPErr
signal PCIClk
signal PCIReset
signal PCIINT_PerWE
signal PCIReq0_Gnt
signal PCIReq1
signal PCIReq2
signal PCIGnt0_Req
signal PCIGnt1
signal PCIGnt2
signal UART0_Rx
signal UART0_Tx
signal UART0_CTS
signal UART0_RTS
signal IICSCL
signal IICSDA
signal PerBlast_GPIO0
signal GPIO1_TS1E
signal GPIO2_TS2E
signal GPIO3_TS1O
signal GPIO4_TS2O
signal GPIO5_TS3
signal GPIO6_TS4
signal GPIO7_TS5
signal GPIO8_TS6
signal GPIO9_TrcClk
signal PerCS1_GPIO10
signal PerCS2_GPIO11
signal PerCS3_GPIO12
signal PerCS4_GPIO13
signal PerAddr3_GPIO14
signal PerAddr4_GPIO15
signal PerAddr5_GPIO16
signal IRQ0_GPIO17
signal IRQ1_GPIO18
signal IRQ2_GPIO19
signal IRQ3_GPIO20
signal IRQ4_GPIO21
signal IRQ5_GPIO22
signal IRQ6_GPIO23
signal UART0_DCD_GPIO24UART0_DSR_GPIO25UART0_RI_GPIO26
signal UART0_DSR_GPIO25UART0_RI_GPIO26
signal UART0_RI_GPIO26
signal UART0_DTR_GPIO27UART1_Rx_GPIO28
signal UART1_Rx_GPIO28
signal UART1_Tx_GPIO29
signal RejectPkt0_GPIO3RejectPkt1_GPIO3PHY0Rx0D0
signal RejectPkt1_GPIO3PHY0Rx0D0
signal PHY0Rx0D0
signal PHY0Rx0D1
signal PHY0Rx0D2
signal PHY0Rx0D3
signal EMC0Tx0D0
signal EMC0Tx0D1
signal EMC0Tx0D2
signal EMC0Tx0D3
signal PHY0RxErr
signal PHY0Rx0Clk
signal PHY0Rx0DV
signal PHY0CrS0
signal EMC0Tx0Err
signal EMC0Tx0En
signal PHY0Tx0Clk
signal PHY0Col0
signal EMCMDIO
signal EMCMDClk
signal PHY0Rx1D0
signal PHY0Rx1D1
signal PHY0Rx1D2
signal PHY0Rx1D3
signal EMC0Tx1D0
signal EMC0Tx1D1
signal EMC0Tx1D2
signal EMC0Tx1D3
signal PHY0Rx1Err
signal PHY0Rx1Clk
signal PHY0Rx1DV
signal PHY0Col1
signal EMC0Tx1Err
signal EMC0Tx1En
signal PHY0Tx1Clk
signal PHY0CrS1
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal GND24
signal GND25
signal GND26
signal GND27
signal GND28
signal GND29
signal GND30
signal GND31
signal GND32
signal GND33
signal GND34
signal GND35
signal GND36
signal GND37
signal GND38
signal GND39
signal GND40
signal GND41
signal GND42
signal GND43
signal GND44
signal GND45
signal GND46
signal GND47
signal GND48
signal GND49
signal GND50
signal GND51
signal GND52
signal GND53
signal GND54
signal GND55
signal GND56
signal GND57
signal GND58
signal GND59
signal GND60
signal GND61
signal GND62
signal GND63
signal GND64
signal GND65
signal GND66
signal GND67
signal GND68
signal GND69
signal GND70
signal GND71
signal GND72
signal GND73
signal GND74
signal GND75
signal GND76
signal GND77
signal GND78
signal VDD1
signal VDD2
signal VDD3
signal VDD4
signal VDD5
signal VDD6
signal VDD7
signal VDD8
signal VDD9
signal VDD10
signal VDD11
signal VDD12
signal VDD13
signal VDD14
signal VDD15
signal VDD16
signal VDD17
signal VDD18
signal VDD19
signal VDD20
signal VDD21
signal VDD22
signal VDD23
signal VDD24
signal VDD25
signal VDD26
signal VDD27
signal VDD28
signal VDD29
signal VDD30
signal VDD31
signal VDD32
signal VDD33
signal VDD34
signal VDD35
signal VDD36
signal VDD37
signal VDD38
signal VDD39
signal VDD40
signal OVDD1
signal OVDD2
signal OVDD3
signal OVDD4
signal OVDD5
signal OVDD6
signal OVDD7
signal OVDD8
signal OVDD9
signal OVDD10
signal OVDD11
signal OVDD12
signal OVDD13
signal OVDD14
signal OVDD15
signal OVDD16
signal OVDD17
signal OVDD18

register	BSR	300
register	BR	1
register	DIR	32

instruction length 7

instruction EXTEST 0000000 BSR
instruction SAMPLE/PRELOAD 1111010 BSR
instruction IDCODE 1111011 DIR
instruction BYPASS 1111100 BR

bit 299 B 1 MemData20 290 0 Z
bit 298 B 1 MemData18 290 0 Z
bit 297 B 1 MemData19 290 0 Z
bit 296 C 0 *
bit 295 B 1 IICSCL 296 0 Z
bit 294 B 1 MemData17 290 0 Z
bit 293 C 0 *
bit 292 B 1 EMCMDIO 293 0 Z
bit 291 O 1 EMCMDClk
bit 290 C 0 *
bit 289 B 1 MemData16 290 0 Z
bit 288 B 1 MemData15 278 0 Z
bit 287 B 1 MemData14 278 0 Z
bit 286 B 1 MemData13 278 0 Z
bit 285 B 1 MemData12 278 0 Z
bit 284 I 1 PHY0Tx0Clk
bit 283 O 1 DQM1
bit 282 B 1 MemData11 278 0 Z
bit 281 B 1 MemData10 278 0 Z
bit 280 I 1 PHY0Col0
bit 279 B 1 MemData9 278 0 Z
bit 278 C 0 *
bit 277 B 1 MemData8 278 0 Z
bit 276 I 1 PHY0CrS0
bit 275 B 1 MemData7 264 0 Z
bit 274 I 1 PHY0Rx0DV
bit 273 B 1 MemData6 264 0 Z
bit 272 B 1 MemData5 264 0 Z
bit 271 I 1 PHY0Rx0Clk
bit 270 B 1 MemData4 264 0 Z
bit 269 O 1 DQM0
bit 268 B 1 MemData3 264 0 Z
bit 267 I 1 PHY0RxErr
bit 266 B 1 MemData2 264 0 Z
bit 265 B 1 MemData1 264 0 Z
bit 264 C 0 *
bit 263 B 1 MemData0 264 0 Z
bit 262 O 1 BankSel1
bit 261 O 1 BankSel0
bit 260 I 1 PHY0Rx0D3
bit 259 O 1 ClkEn1
bit 258 O 1 MemClkOut1
bit 257 O 1 ClkEn0
bit 256 O 1 MemClkOut0
bit 255 O 1 WE
bit 254 O 1 CAS
bit 253 O 1 MemAddr0
bit 252 O 1 RAS
bit 251 O 1 BA1
bit 250 O 1 BA0
bit 249 O 1 MemAddr1
bit 248 I 1 PHY0Rx0D2
bit 247 O 1 MemAddr2
bit 246 O 1 MemAddr3
bit 245 I 1 PHY0Rx0D0
bit 244 O 1 MemAddr4
bit 243 O 1 SysClk
bit 242 B 1 SysErr 229 0 Z
bit 241 O 1 MemAddr5
bit 240 O 1 MemAddr6
bit 239 O 1 MemAddr7
bit 238 O 1 MemAddr8
bit 237 O 1 MemAddr9
bit 236 C 0 *
bit 235 B 1 SysReset 236 0 Z
bit 234 O 1 MemAddr11
bit 233 O 1 MemAddr10
bit 232 O 1 MemAddr12
bit 231 C 0 *
bit 230 B 1 GPIO1_TS1E 231 0 Z
bit 229 C 0 *
bit 228 I 1 PHY0Rx0D1
bit 227 C 0 *
bit 226 B 1 RejectPkt0_GPIO30 227 0 Z
bit 225 C 0 *
bit 224 B 1 RejectPkt1_GPIO31 225 0 Z
bit 223 C 0 *
bit 222 B 1 GPIO2_TS2E 223 0 Z
bit 221 C 0 *
bit 220 B 1 GPIO3_TS1O 221 0 Z
bit 219 C 0 *
bit 218 B 1 GPIO4_TS2O 219 0 Z
bit 217 C 0 *
bit 216 B 1 IRQ0_GPIO17 217 0 Z
bit 215 C 0 *
bit 214 B 1 IRQ1_GPIO18 215 0 Z
bit 213 C 0 *
bit 212 B 1 IRQ2_GPIO19 213 0 Z
bit 211 C 0 *
bit 210 B 1 GPIO5_TS3 211 0 Z
bit 209 C 0 *
bit 208 B 1 IRQ3_GPIO20 209 0 Z
bit 207 C 0 *
bit 206 B 1 GPIO6_TS4 207 0 Z
bit 205 C 0 *
bit 204 B 1 GPIO7_TS5 205 0 Z
bit 203 C 0 *
bit 202 B 1 GPIO8_TS6 203 0 Z
bit 201 C 0 *
bit 200 B 1 GPIO9_TrcClk 201 0 Z
bit 199 C 0 *
bit 198 B 1 IRQ4_GPIO21 199 0 Z
bit 197 C 0 *
bit 196 B 1 IRQ5_GPIO22 197 0 Z
bit 195 C 0 *
bit 194 B 1 IRQ6_GPIO23 195 0 Z
bit 193 B 1 PCIAD31 190 0 Z
bit 192 B 1 PCIAD30 190 0 Z
bit 191 B 1 PCIAD29 190 0 Z
bit 190 C 0 *
bit 189 B 1 PCIAD28 190 0 Z
bit 188 B 1 PCIAD27 184 0 Z
bit 187 B 1 PCIC0_BE3 130 0 Z
bit 186 B 1 PCIAD26 184 0 Z
bit 185 B 1 PCIAD25 184 0 Z
bit 184 C 0 *
bit 183 B 1 PCIAD24 184 0 Z
bit 182 B 1 PCIAD23 179 0 Z
bit 181 B 1 PCIAD22 179 0 Z
bit 180 B 1 PCIAD21 179 0 Z
bit 179 C 0 *
bit 178 B 1 PCIAD20 179 0 Z
bit 177 B 1 PCIC0_BE2 130 0 Z
bit 176 B 1 PCIAD19 173 0 Z
bit 175 B 1 PCIAD18 173 0 Z
bit 174 B 1 PCIAD17 173 0 Z
bit 173 C 0 *
bit 172 B 1 PCIAD16 173 0 Z
bit 171 C 0 *
bit 170 B 1 PCIParity 171 0 Z
bit 169 C 0 *
bit 168 B 1 PCIPErr 169 0 Z
bit 167 C 0 *
bit 166 B 1 PCISErr 167 0 Z
bit 165 B 1 PCIDevSel 163 0 Z
bit 164 B 1 PCIStop 163 0 Z
bit 163 C 0 *
bit 162 B 1 PCITRDY 163 0 Z
bit 161 C 0 *
bit 160 B 1 PCIIRDY 161 0 Z
bit 159 C 0 *
bit 158 B 1 PCIFrame 159 0 Z
bit 157 O 1 PCIReset
bit 156 O 1 PCIGnt2 152 0 Z
bit 155 O 1 PCIGnt1 152 0 Z
bit 154 I 1 PCIReq2
bit 153 I 1 PCIReq1
bit 152 C 0 *
bit 151 O 1 PCIGnt0_Req 152 0 Z
bit 150 B 1 PCIAD15 142 0 Z
bit 149 B 1 PCIAD14 142 0 Z
bit 148 I 1 PCIReq0_Gnt
bit 147 I 1 Halt
bit 146 B 1 PCIAD13 142 0 Z
bit 145 I 1 PCIIDSel
bit 144 I 1 PCIClk
bit 143 B 1 PCIC0_BE1 130 0 Z
bit 142 C 0 *
bit 141 B 1 PCIAD12 142 0 Z
bit 140 B 1 PCIAD11 137 0 Z
bit 139 B 1 PCIAD10 137 0 Z
bit 138 B 1 PCIAD9 137 0 Z
bit 137 C 0 *
bit 136 B 1 PCIAD8 137 0 Z
bit 135 B 1 PCIAD7 132 0 Z
bit 134 B 1 PCIAD6 132 0 Z
bit 133 B 1 PCIAD5 132 0 Z
bit 132 C 0 *
bit 131 B 1 PCIAD4 132 0 Z
bit 130 C 0 *
bit 129 B 1 PCIC0_BE0 130 0 Z
bit 128 B 1 PCIAD3 125 0 Z
bit 127 B 1 PCIAD2 125 0 Z
bit 126 B 1 PCIAD1 125 0 Z
bit 125 C 0 *
bit 124 B 1 PCIAD0 125 0 Z
bit 123 C 0 *
bit 122 O 1 PCIINT_PerWE 123 0 Z
bit 121 O 1 EMC0Tx1En
bit 120 O 1 EMC0Tx1Err
bit 119 O 1 EMC0Tx1D0
bit 118 O 1 EMC0Tx1D3
bit 117 O 1 EMC0Tx1D2
bit 116 O 1 EMC0Tx1D1
bit 115 O 1 PerAddr31
bit 114 O 1 PerAddr30
bit 113 O 1 PerAddr29
bit 112 O 1 PerAddr28
bit 111 O 1 PerAddr27
bit 110 O 1 PerAddr26
bit 109 O 1 PerAddr25
bit 108 O 1 PerAddr24
bit 107 O 1 PerAddr23
bit 106 O 1 PerAddr22
bit 105 O 1 PerAddr21
bit 104 O 1 PerAddr20
bit 103 O 1 PerAddr19
bit 102 O 1 PerAddr18
bit 101 C 0 *
bit 100 B 1 PerBlast_GPIO0 101 0 Z
bit 99 O 1 PerAddr17
bit 98 O 1 PerAddr16
bit 97 O 1 PerAddr15
bit 96 O 1 PerAddr14
bit 95 O 1 PerAddr13
bit 94 O 1 PerAddr12
bit 93 O 1 PerAddr11
bit 92 O 1 PerAddr10
bit 91 O 1 PerAddr9
bit 90 O 1 PerAddr8
bit 89 O 1 PerAddr7
bit 88 O 1 PerAddr6
bit 87 I 1 PHY0Tx1Clk
bit 86 C 0 *
bit 85 B 1 PerAddr5_GPIO16 86 0 Z
bit 84 I 1 PHY0CrS1
bit 83 I 1 PHY0Rx1DV
bit 82 I 1 PHY0Col1
bit 81 C 0 *
bit 80 B 1 PerAddr4_GPIO15 81 0 Z
bit 79 C 0 *
bit 78 B 1 PerAddr3_GPIO14 79 0 Z
bit 77 O 1 PerClk
bit 76 C 0 *
bit 75 B 1 PerCS4_GPIO13 76 0 Z
bit 74 I 1 PerReady
bit 73 O 1 ExtReset
bit 72 I 1 PHY0Rx1Err
bit 71 C 0 *
bit 70 B 1 PerCS1_GPIO10 71 0 Z
bit 69 O 1 PerCS0
bit 68 C 0 *
bit 67 B 1 PerCS3_GPIO12 68 0 Z
bit 66 O 1 PerRnW
bit 65 C 0 *
bit 64 B 1 PerData15 43 0 Z
bit 63 B 1 PerCS2_GPIO11 65 0 Z
bit 62 O 1 PerOE
bit 61 I 1 PHY0Rx1Clk
bit 60 O 1 PerWBE1
bit 59 O 1 PerWBE0
bit 58 B 1 PerData12 43 0 Z
bit 57 I 1 PHY0Rx1D3
bit 56 B 1 PerData14 43 0 Z
bit 55 B 1 PerData13 43 0 Z
bit 54 I 1 PHY0Rx1D2
bit 53 B 1 PerData11 43 0 Z
bit 52 I 1 PHY0Rx1D1
bit 51 B 1 PerData10 43 0 Z
bit 50 B 1 PerData9 43 0 Z
bit 49 C 0 *
bit 48 B 1 UART1_Tx_GPIO29 49 0 Z
bit 47 C 0 *
bit 46 B 1 UART1_Rx_GPIO28 47 0 Z
bit 45 C 0 *
bit 44 B 1 UART0_DTR_GPIO27 45 0 Z
bit 43 C 0 *
bit 42 B 1 PerData8 43 0 Z
bit 41 B 1 PerData7 25 0 Z
bit 40 C 0 *
bit 39 B 1 UART0_RI_GPIO26 40 0 Z
bit 38 C 0 *
bit 37 B 1 UART0_DSR_GPIO25 38 0 Z
bit 36 B 1 PerData6 25 0 Z
bit 35 B 1 PerData5 25 0 Z
bit 34 O 1 EMC0Tx0D2
bit 33 B 1 PerData4 25 0 Z
bit 32 B 1 PerData3 25 0 Z
bit 31 C 0 *
bit 30 B 1 UART0_DCD_GPIO24 31 0 Z
bit 29 B 1 UART0_RTS 229 0 Z
bit 28 O 1 EMC0Tx0D1
bit 27 B 1 PerData2 25 0 Z
bit 26 B 1 PerData1 25 0 Z
bit 25 C 0 *
bit 24 B 1 PerData0 25 0 Z
bit 23 O 1 EMC0Tx0D3
bit 22 I 1 PHY0Rx1D0
bit 21 B 1 UART0_Tx 229 0 Z
bit 20 B 1 MemData31 7 0 Z
bit 19 B 1 MemData30 7 0 Z
bit 18 I 1 UART0_Rx
bit 17 B 1 MemData29 7 0 Z
bit 16 B 1 MemData28 7 0 Z
bit 15 I 1 UART0_CTS
bit 14 O 1 DQM3
bit 13 O 1 EMC0Tx0D0
bit 12 B 1 MemData27 7 0 Z
bit 11 B 1 MemData26 7 0 Z
bit 10 B 1 MemData25 7 0 Z
bit 9 O 1 EMC0Tx0Err
bit 8 O 1 EMC0Tx0En
bit 7 C 0 *
bit 6 B 1 MemData24 7 0 Z
bit 5 B 1 MemData23 290 0 Z
bit 4 B 1 MemData22 290 0 Z
bit 3 C 0 *
bit 2 B 1 IICSDA 3 0 Z
bit 1 B 1 MemData21 290 0 Z
bit 0 O 1 DQM2

initbus ppc405ep
endian big