hd64465

UrJTAG package is free software, covered by the GNU General Public License, and you are welcome to

#
# $Id: hd64465 581 2003-10-20 11:11:06Z telka $
#
# JTAG declarations for Hitachi HD64465BP/HD64465BQ
# Copyright (C) 2003 Elcom s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <[e-mail]>, 2003.
#
# Documentation:
# [1] Hitachi Ltd., "Windows CE Intelligent Peripheral Controller
#     HD64465 User's Manual", 03/08/01, Rev. 3.0, ADE-602-168B
#

# Test Mode (see Table 4.3 in [1])
signal	TST
signal	TDI
signal	TDO
signal	TMS
signal	TCK
signal	TRST

# CPU interface (see Table 4.4 in [1])
signal	CKIO
signal	A0
signal	A1
signal	A2
signal	A3
signal	A4
signal	A5
signal	A6
signal	A7
signal	A8
signal	A9
signal	A10
signal	A11
signal	A12
signal	A13
signal	A14
signal	A15
signal	A16
signal	A17
signal	A18
signal	A19
signal	A20
signal	A21
signal	A22
signal	A23
signal	A24
signal	A25
signal	D0
signal	D1
signal	D2
signal	D3
signal	D4
signal	D5
signal	D6
signal	D7
signal	D8
signal	D9
signal	D10
signal	D11
signal	D12
signal	D13
signal	D14
signal	D15
signal	D16
signal	D17
signal	D18
signal	D19
signal	D20
signal	D21
signal	D22
signal	D23
signal	D24
signal	D25
signal	D26
signal	D27
signal	D28
signal	D29
signal	D30
signal	D31
signal	nCS4
signal	nWE0
signal	nWE1
signal	nWE2
signal	nWE3
signal	nRDWR
signal	nRD
signal	nRDY
signal	nBS
signal	nDREQ0
signal	nDREQ1
signal	DRAK0
signal	DRAK1
signal	nIRQ0
signal	SH_MODE
signal	nCE1B
signal	nCE2B
signal	nCE1A
signal	nCE2A
signal	nIOIS16

# PCMCIA 0 (see Table 4.5 in [1])
signal	PCC0A0
signal	PCC0A1
signal	PCC0A2
signal	PCC0A3
signal	PCC0A4
signal	PCC0A5
signal	PCC0A6
signal	PCC0A7
signal	PCC0A8
signal	PCC0A9
signal	PCC0A10
signal	PCC0A11
signal	PCC0A12
signal	PCC0A13
signal	PCC0A14
signal	PCC0A15
signal	PCC0A16
signal	PCC0A17
signal	PCC0A18
signal	PCC0A19
signal	PCC0A20
signal	PCC0A21
signal	PCC0A22
signal	PCC0A23
signal	PCC0A24
signal	PCC0A25
signal	PCC0D0
signal	PCC0D1
signal	PCC0D2
signal	PCC0D3
signal	PCC0D4
signal	PCC0D5
signal	PCC0D6
signal	PCC0D7
signal	PCC0D8
signal	PCC0D9
signal	PCC0D10
signal	PCC0D11
signal	PCC0D12
signal	PCC0D13
signal	PCC0D14
signal	PCC0D15
signal	nPCC0CE1B
signal	nPCC0CE2B
signal	nRDB
signal	nWEB
signal	nPCC0ICIORDB
signal	nPCC0ICIOWRB
signal	PCC0RESET
signal	nPCC0WAIT
signal	nPCC0WP
signal	PCC0RDY
signal	PCC0BVD1
signal	PCC0BVD2
signal	nPCC0CD1
signal	nPCC0CD2
signal	nPCC0VS1
signal	nPCC0VS2
signal	nPCC0REG
signal	VCC0SEL1
signal	VCC0SEL0
signal	VCC0VPP1
signal	VCC0VPP0

# PCMCIA 1 (see Table 4.6 in [1])
signal	PCC1A0
signal	PCC1A1
signal	PCC1A2
signal	PCC1A3
signal	PCC1A4
signal	PCC1A5
signal	PCC1A6
signal	PCC1A7
signal	PCC1A8
signal	PCC1A9
signal	PCC1A10
signal	PCC1A11
signal	PCC1A12
signal	PCC1A13
signal	PCC1A14
signal	PCC1A15
signal	PCC1A16
signal	PCC1A17
signal	PCC1A18
signal	PCC1A19
signal	PCC1A20
signal	PCC1A21
signal	PCC1A22
signal	PCC1A23
signal	PCC1A24
signal	PCC1A25
signal	PCC1D0
signal	PCC1D1
signal	PCC1D2
signal	PCC1D3
signal	PCC1D4
signal	PCC1D5
signal	PCC1D6
signal	PCC1D7
signal	PCC1D8
signal	PCC1D9
signal	PCC1D10
signal	PCC1D11
signal	PCC1D12
signal	PCC1D13
signal	PCC1D14
signal	PCC1D15
signal	nPCC1CE1A
signal	nPCC1CE2A
signal	nRDA
signal	nWEA
signal	nPCC1ICIORDA
signal	nPCC1ICIOWRA
signal	PCC1RESET
signal	nPCC1WAIT
signal	nPCC1WP
signal	PCC1RDY
signal	PCC1BVD1
signal	PCC1BVD2
signal	nPCC1CD1
signal	nPCC1CD2
signal	nPCC1VS1
signal	nPCC1VS2
signal	nPCC1REG
signal	VCC1SEL1
signal	VCC1SEL0
signal	VCC1VPP1
signal	VCC1VPP0

# UART 0 (see Table 4.7 in [1])
signal	TXD0
signal	RXD0
signal	nRTS0
signal	nCTS0
signal	nDTR0
signal	nDSR0
signal	nDCD0
signal	nRI0

# IrDA (see Table 4.8 in [1])
signal	MODSEL
signal	TXD
signal	nRX

# Printer Interface (see Table 4.9 in [1])
signal	nSTB
signal	nAFD
signal	nERR
signal	nINIT
signal	nSLIN
signal	nACK
signal	BUSY
signal	PE
signal	SLCT
signal	PPD0
signal	PPD1
signal	PPD2
signal	PPD3
signal	PPD4
signal	PPD5
signal	PPD6
signal	PPD7

# AFE Interface (see Table 4.10 in [1])
signal	DOUT
signal	DIN
signal	SCLK
signal	HC1
signal	FS
signal	nAFERST
signal	nAFEPDN
signal	MCLKO
signal	OFFHOOK
signal	RING

# CODEC Interface (see Table 4.11 in [1])
signal	ACCLK
signal	nACRST
signal	nACPD
signal	SIBDIN
signal	SIBCLK
signal	SIBDOUT
signal	SIBSYNC

# USB Interface (see Table 4.12 in [1])
signal	nUSBPEN
signal	nUSBOVR
signal	USBD1P
signal	USBD1M
signal	USBD2P
signal	USBD2M

# Keyboard Interface (see Table 4.13 in [1])
signal	nKBCS
signal	nXIOW
signal	nXIOR
signal	KBIRQ0
signal	KBIRQ1

# IO Port A (see Table 4.14 in [1])
signal	PA0
signal	PA1
signal	PA2
signal	PA3
signal	PA4
signal	PA5
signal	PA6
signal	PA7

# IO Port B (see Table 4.15 in [1])
signal	PB0
signal	PB1
signal	PB2
signal	PB3
signal	PB4
signal	PB5
signal	PB6
signal	PB7

# IO Port C (see Table 4.16 in [1])
signal	PC0
signal	PC1
signal	PC2
signal	PC3
signal	PC4
signal	PC5
signal	PC6
signal	PC7

# IO Port D (see Table 4.17 in [1])
signal	PD0
signal	PD1
signal	PD2
signal	PD3
signal	PD4
signal	PD5
signal	PD6
signal	PD7

# IO Port E (see Table 4.18 in [1])
signal	PE0
signal	PE1
signal	PE2
signal	PE3
signal	PE4
signal	PE5
signal	PE6
signal	PE7

# 10-bit ADC Interface (see Table 4.19 in [1])
signal	TSMX
signal	TSMY
signal	TSPX
signal	TSPY

# PS/2 Interface (see Table 4.20 in [1])
signal	KBCK
signal	KBDATA
signal	MSCK
signal	MSDATA

# System Reset Interface (see Table 4.21 in [1])
signal	nRESETPI
signal	nRESETMI
signal	nRESETPO
signal	nRESETMO

# Crystal Interface (see Table 4.22 in [1])
signal	AFECK
signal	AFECKE
signal	UCK
signal	UCKE

# Miscellaneous Interface (see Table 4.23 in [1])
signal	PWM0
signal	PWM1
signal	P80LE

# No Connected Pins (see Table 4.24 in [1])
signal	NC(1)
signal	NC(2)
signal	NC(3)
signal	NC(4)
signal	NC(5)
signal	NC(6)
signal	NC(7)
signal	NC(8)
signal	NC(9)
signal	NC(10)
signal	NC(11)
signal	NC(12)
signal	NC(13)
signal	NC(14)

# Power/Ground (see Tabe 4.25 in [1])
signal	VSS
signal	VCC
signal	VCC5
signal	VCCA
signal	VCCB
signal	AVCC1
signal	AVSS1
signal	AVCC2
signal	AVSS2
signal	AVCC3
signal	AVSS3
signal	AVCC4
signal	AVSS4
signal	AVCC5
signal	AVCC6
signal	AVSS6

# mandatory data registers
register	BSR	550
register	BR	1

# instructions
instruction length 3
# mandatory instructions
instruction BYPASS		111	BR
instruction EXTEST		000	BSR
instruction SAMPLE/PRELOAD	001	BSR

# boundary scan register
bit 549 I ? nBS
bit 548 I ? RING
bit 547 I ? FS
bit 546 I ? SCLK
bit 545 I ? DIN
bit 544 O ? nAFERST
bit 543 O ? nAFEPDN
bit 542 O ? HC1 541 0 Z
bit 541 C 0 .
bit 540 O ? OFFHOOK 541 0 Z
bit 539 O ? MCLKO 541 0 Z
bit 538 O ? DOUT 541 0 Z
bit 537 O ? PA0 535 0 Z
bit 536 I ? PA0
bit 535 C 0 .
bit 534 O ? PA1 532 0 Z
bit 533 I ? PA1
bit 532 C 0 .
bit 531 O ? PA2 529 0 Z
bit 530 I ? PA2
bit 529 C 0 .
bit 528 O ? PA3 526 0 Z
bit 527 I ? PA3
bit 526 C 0 .
bit 525 O ? PA4 523 0 Z
bit 524 I ? PA4
bit 523 C 0 .
bit 522 O ? PA5 520 0 Z
bit 521 I ? PA5
bit 520 C 0 .
bit 519 O ? PA6 517 0 Z
bit 518 I ? PA6
bit 517 C 0 .
bit 516 O ? PA7 514 0 Z
bit 515 I ? PA7
bit 514 C 0 .
bit 513 O ? nXIOW
bit 512 O ? nXIOR
bit 511 O ? nKBCS
bit 510 I ? KBIRQ0
bit 509 I ? KBIRQ1
bit 508 O ? P80LE
bit 507 I ? CKIO
bit 506 I ? nRESETPI
bit 505 I ? SH_MODE
bit 504 I ? A12
bit 503 I ? A11
bit 502 I ? A10
bit 501 I ? A9
bit 500 I ? A8
bit 499 I ? A7
bit 498 I ? A6
bit 497 I ? A5
bit 496 I ? A4
bit 495 I ? A3