counter10.v

数字钟 可实现正常计数校准 还有方电台报时功能 四低一高 闹钟功能

module counter10 (Q,nCR,EN,CP);
	input CP,nCR,EN;
	output [3:0] Q;
	reg [3:0] Q;
	always@(posedge CP or negedge nCR)
	begin
	if(~nCR) Q<=4'b0000;
	else if(~EN) Q<=Q;
	else if(Q==4'b1001) Q<=4'b0000;
	else Q<=Q+1'b1;
	end
endmodule