reserv.fit.qmsg

采用高速A_D的存储示波器设计 在quartus2 中用的 用vhdl语言写的

{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "3.292 ns register register " "Info: Estimated most critical path is register to register delay of 3.292 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[5\] 1 REG LAB_X15_Y5 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X15_Y5; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[5\]'" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[5] } "NODE_NAME" } } } { "e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.901 ns) + CELL(0.442 ns) 1.343 ns sld_hub:sld_hub_inst\|HUB_TDO~497 2 COMB LAB_X16_Y7 1 " "Info: 2: + IC(0.901 ns) + CELL(0.442 ns) = 1.343 ns; Loc. = LAB_X16_Y7; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~497'" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "1.343 ns" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[5] sld_hub:sld_hub_inst|HUB_TDO~497 } "NODE_NAME" } } } { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.516 ns) + CELL(0.114 ns) 1.973 ns sld_hub:sld_hub_inst\|HUB_TDO~498 3 COMB LAB_X16_Y7 1 " "Info: 3: + IC(0.516 ns) + CELL(0.114 ns) = 1.973 ns; Loc. = LAB_X16_Y7; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~498'" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "0.630 ns" { sld_hub:sld_hub_inst|HUB_TDO~497 sld_hub:sld_hub_inst|HUB_TDO~498 } "NODE_NAME" } } } { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(-0.013 ns) + CELL(0.590 ns) 2.550 ns sld_hub:sld_hub_inst\|HUB_TDO~517 4 COMB LAB_X16_Y7 1 " "Info: 4: + IC(-0.013 ns) + CELL(0.590 ns) = 2.550 ns; Loc. = LAB_X16_Y7; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~517'" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "0.577 ns" { sld_hub:sld_hub_inst|HUB_TDO~498 sld_hub:sld_hub_inst|HUB_TDO~517 } "NODE_NAME" } } } { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.135 ns) + CELL(0.607 ns) 3.292 ns sld_hub:sld_hub_inst\|HUB_TDO~reg0 5 REG LAB_X16_Y7 0 " "Info: 5: + IC(0.135 ns) + CELL(0.607 ns) = 3.292 ns; Loc. = LAB_X16_Y7; Fanout = 0; REG Node = 'sld_hub:sld_hub_inst\|HUB_TDO~reg0'" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "0.742 ns" { sld_hub:sld_hub_inst|HUB_TDO~517 sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } } { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 937 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.753 ns 53.25 % " "Info: Total cell delay = 1.753 ns ( 53.25 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.539 ns 46.75 % " "Info: Total interconnect delay = 1.539 ns ( 46.75 % )" {  } {  } 0}  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "3.292 ns" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[5] sld_hub:sld_hub_inst|HUB_TDO~497 sld_hub:sld_hub_inst|HUB_TDO~498 sld_hub:sld_hub_inst|HUB_TDO~517 sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PLACER_ESTIMATED_PERCENT_ROUTING_RESOURCE_USAGE" "5 " "Info: Estimated interconnect usage is 5% of the available device resources" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "1 " "Info: Fitter placement operations ending: elapsed time = 1 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "2 " "Info: Fitter routing operations ending: elapsed time = 2 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|clear_signal " "Info: Node sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|clear_signal uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[3\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[3\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[3] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[3\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" 59 -1 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[1\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[1\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[1] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[1\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" 59 -1 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[0\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[0\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[0] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[0\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" 59 -1 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[2\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[2\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[2] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|WORD_SR\[2\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" 59 -1 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[2] } "NODE_NAME" } }  } 0}  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|clear_signal } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_rom_sr:crc_rom_sr\|clear_signal" } } } } { "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" 36 -1 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|clear_signal } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "sld_signaltap:rsv1\|reset_all " "Info: Node sld_signaltap:rsv1\|reset_all uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[3\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[3\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[3] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[3\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[1\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[1\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[1] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[1\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[4\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[4\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[4] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[4\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[52\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[52\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[52] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[52\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[52] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[5\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[5\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[5] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[5\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[51\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[51\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[51] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[51\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[51] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[53\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[53\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[53] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|lpm_shiftreg:trigger_condition_deserialize\|dffs\[53\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[53] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[2\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[2\] -- routed using non-global resources" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[2] } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|sld_ela_control:ela_control\|lpm_shiftreg:trigger_config_deserialize\|dffs\[2\]" } } } } { "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 60 7 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[2] } "NODE_NAME" } }  } 0}  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { sld_signaltap:rsv1|reset_all } "NODE_NAME" } } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:rsv1\|reset_all" } } } } { "e:/altera/quartus41/libraries/megafunctions/sld_signaltap.vhd" "" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_signaltap.vhd" 412 -1 0 } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { sld_signaltap:rsv1|reset_all } "NODE_NAME" } }  } 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "2 " "Warning: Following 2 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "DOUT\[1\] GND " "Info: Pin DOUT\[1\] has GND driving its datain port" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.VHD" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.VHD" 7 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "DOUT\[1\]" } } } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { DOUT[1] } "NODE_NAME" } } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { DOUT[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "DOUT\[0\] GND " "Info: Pin DOUT\[0\] has GND driving its datain port" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.VHD" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.VHD" 7 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "DOUT\[0\]" } } } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" "" "" { Report "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV_cmp.qrpt" Compiler "RESERV" "UNKNOWN" "V1" "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/db/RESERV.quartus_db" { Floorplan "" "" "" { DOUT[0] } "NODE_NAME" } } } { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { Floorplan "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_5_RSV/RESERV.fld" "" "" { DOUT[0] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1  " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Sep 17 10:15:49 2005 " "Info: Processing ended: Sat Sep 17 10:15:49 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:19 " "Info: Elapsed time: 00:00:19" {  } {  } 0}  } {  } 0}